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From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Joey Gouly <joey.gouly@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	Mark Brown <broonie@kernel.org>
Subject: [PATCH v7 00/28] arm64/sysreg: More system register generation
Date: Mon,  4 Jul 2022 18:02:34 +0100	[thread overview]
Message-ID: <20220704170302.2609529-1-broonie@kernel.org> (raw)

This series continues on with the conversion of the system registers to
automatic generation, together with a few cleanups and improvements that
were identified as part of looking through all the register definitions
and bringing them into line with the conventions we've been using.

v7: 
 - Rather than guarding macros in sysreg.h minimise the set of headers
   included in cache.h when used for assembly.
 - Fix more indentation in icache_policy_str().
 - Fix preexisting whitespace damage in idreg-override.c
v6:
 - Fix indentation in icache_policy_str().
 - Assume aliasing for unknown cache type.
v5:
 - Remove definition of AIVIVT cache type entirely, no longer
   referencing the constant.
 - Allow leading blanks on comments in the input file.
v4:
 - Rebase onto v5.19-rc3.
v3:
 - Fix value for ID_AA64ISAR2_EL1.WFxT IMP enumeration value.
 - Add conversions of LOR*_EL1, ID_AA64SMFR0_EL1 and ID_AA64ZFR0_EL1.
 - Rebase onto for-next/fixes due to the ID_AA64SMFR0_EL1 conversion.
v2:
 - Rework handling of AIVIVT so we just update the define to reflect the
   naming but don't change the user visible decode, the type was removed
   from v8 rather than being added in v9.

Mark Brown (28):
  arm64/cpuinfo: Remove references to reserved cache type
  arm64/idreg: Fix tab/space damage
  arm64/sysreg: Allow leading blanks on comments in sysreg file
  arm64/sysreg: Add SYS_FIELD_GET() helper
  arm64/cache: Restrict which headers are included in __ASSEMBLY__
  arm64/sysreg: Standardise naming for CTR_EL0 fields
  arm64/sysreg: Standardise naming for DCZID_EL0 field names
  arm64/mte: Standardise GMID field name definitions
  arm64/sysreg: Align pointer auth enumeration defines with architecture
  arm64/sysreg: Make BHB clear feature defines match the architecture
  arm64/sysreg: Standardise naming for WFxT defines
  arm64/sysreg: Standardise naming for ID_AA64SMFR0_EL1 enums
  arm64/sysreg: Standardise naming for ID_AA64ZFR0_EL1 fields
  arm64/sysreg: Remove defines for RPRES enumeration
  arm64/sysreg: Add _EL1 into ID_AA64ISAR1_EL1 definition names
  arm64/sysreg: Add _EL1 into ID_AA64ISAR2_EL1 definition names
  arm64/sysreg: Convert CTR_EL0 to automatic generation
  arm64/sysreg: Convert DCZID_EL0 to automatic generation
  arm64/sysreg: Convert GMID to automatic generation
  arm64/sysreg: Convert ID_AA64ISAR1_EL1 to automatic generation
  arm64/sysreg: Convert ID_AA64ISAR2_EL1 to automatic generation
  arm64/sysreg: Convert LORSA_EL1 to automatic generation
  arm64/sysreg: Convert LOREA_EL1 to automatic generation
  arm64/sysreg: Convert LORN_EL1 to automatic generation
  arm64/sysreg: Convert LORC_EL1 to automatic generation
  arm64/sysreg: Convert LORID_EL1 to automatic generation
  arm64/sysreg: Convert ID_AA64SMFR0_EL1 to automatic generation
  arm64/sysreg: Convert ID_AA64ZFR0_EL1 to automatic generation

 arch/arm64/include/asm/asm_pointer_auth.h     |   4 +-
 arch/arm64/include/asm/cache.h                |  41 +--
 arch/arm64/include/asm/cpufeature.h           |   2 +-
 arch/arm64/include/asm/el2_setup.h            |   2 +-
 arch/arm64/include/asm/sysreg.h               | 124 +-------
 arch/arm64/kernel/alternative.c               |   2 +-
 arch/arm64/kernel/cpu_errata.c                |   2 +-
 arch/arm64/kernel/cpufeature.c                | 220 +++++++--------
 arch/arm64/kernel/cpuinfo.c                   |  29 +-
 arch/arm64/kernel/idreg-override.c            |  14 +-
 arch/arm64/kernel/traps.c                     |   6 +-
 .../arm64/kvm/hyp/include/nvhe/fixed_config.h |  32 +--
 arch/arm64/kvm/hyp/nvhe/sys_regs.c            |  12 +-
 arch/arm64/kvm/sys_regs.c                     |  14 +-
 arch/arm64/lib/mte.S                          |   2 +-
 arch/arm64/tools/gen-sysreg.awk               |   2 +-
 arch/arm64/tools/sysreg                       | 264 ++++++++++++++++++
 17 files changed, 457 insertions(+), 315 deletions(-)


base-commit: a111daf0c53ae91e71fd2bfe7497862d14132e3e
-- 
2.30.2


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             reply	other threads:[~2022-07-04 17:04 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-04 17:02 Mark Brown [this message]
2022-07-04 17:02 ` [PATCH v7 01/28] arm64/cpuinfo: Remove references to reserved cache type Mark Brown
2022-07-04 17:02 ` [PATCH v7 02/28] arm64/idreg: Fix tab/space damage Mark Brown
2022-07-04 17:02 ` [PATCH v7 03/28] arm64/sysreg: Allow leading blanks on comments in sysreg file Mark Brown
2022-07-04 17:02 ` [PATCH v7 04/28] arm64/sysreg: Add SYS_FIELD_GET() helper Mark Brown
2022-07-04 17:02 ` [PATCH v7 05/28] arm64/cache: Restrict which headers are included in __ASSEMBLY__ Mark Brown
2022-07-04 17:02 ` [PATCH v7 06/28] arm64/sysreg: Standardise naming for CTR_EL0 fields Mark Brown
2022-07-04 17:02 ` [PATCH v7 07/28] arm64/sysreg: Standardise naming for DCZID_EL0 field names Mark Brown
2022-07-04 17:02 ` [PATCH v7 08/28] arm64/mte: Standardise GMID field name definitions Mark Brown
2022-07-04 17:02 ` [PATCH v7 09/28] arm64/sysreg: Align pointer auth enumeration defines with architecture Mark Brown
2022-07-04 17:02 ` [PATCH v7 10/28] arm64/sysreg: Make BHB clear feature defines match the architecture Mark Brown
2022-07-04 17:02 ` [PATCH v7 11/28] arm64/sysreg: Standardise naming for WFxT defines Mark Brown
2022-07-04 17:02 ` [PATCH v7 12/28] arm64/sysreg: Standardise naming for ID_AA64SMFR0_EL1 enums Mark Brown
2022-07-04 17:02 ` [PATCH v7 13/28] arm64/sysreg: Standardise naming for ID_AA64ZFR0_EL1 fields Mark Brown
2022-07-04 17:02 ` [PATCH v7 14/28] arm64/sysreg: Remove defines for RPRES enumeration Mark Brown
2022-07-04 17:02 ` [PATCH v7 15/28] arm64/sysreg: Add _EL1 into ID_AA64ISAR1_EL1 definition names Mark Brown
2022-07-04 17:02 ` [PATCH v7 16/28] arm64/sysreg: Add _EL1 into ID_AA64ISAR2_EL1 " Mark Brown
2022-07-04 17:02 ` [PATCH v7 17/28] arm64/sysreg: Convert CTR_EL0 to automatic generation Mark Brown
2022-07-04 17:02 ` [PATCH v7 18/28] arm64/sysreg: Convert DCZID_EL0 " Mark Brown
2022-07-04 17:02 ` [PATCH v7 19/28] arm64/sysreg: Convert GMID " Mark Brown
2022-07-04 17:02 ` [PATCH v7 20/28] arm64/sysreg: Convert ID_AA64ISAR1_EL1 " Mark Brown
2022-07-04 17:02 ` [PATCH v7 21/28] arm64/sysreg: Convert ID_AA64ISAR2_EL1 " Mark Brown
2022-07-04 17:02 ` [PATCH v7 22/28] arm64/sysreg: Convert LORSA_EL1 " Mark Brown
2022-07-04 17:02 ` [PATCH v7 23/28] arm64/sysreg: Convert LOREA_EL1 " Mark Brown
2022-07-04 17:02 ` [PATCH v7 24/28] arm64/sysreg: Convert LORN_EL1 " Mark Brown
2022-07-04 17:02 ` [PATCH v7 25/28] arm64/sysreg: Convert LORC_EL1 " Mark Brown
2022-07-04 17:03 ` [PATCH v7 26/28] arm64/sysreg: Convert LORID_EL1 " Mark Brown
2022-07-04 17:03 ` [PATCH v7 27/28] arm64/sysreg: Convert ID_AA64SMFR0_EL1 " Mark Brown
2022-07-04 17:03 ` [PATCH v7 28/28] arm64/sysreg: Convert ID_AA64ZFR0_EL1 " Mark Brown
2022-07-05 13:31 ` [PATCH v7 00/28] arm64/sysreg: More system register generation Will Deacon

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