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From: Katsuhiro Suzuki <katsuhiro@katsuster.net>
To: Mark Brown <broonie@kernel.org>
Cc: David Yang <yangxiaohua@everest-semi.com>,
	Daniel Drake <drake@endlessm.com>,
	Hans de Goede <hdegoede@redhat.com>,
	alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/3] ASoC: es8316: judge PCM rate at later timing
Date: Tue, 3 Sep 2019 04:19:10 +0900	[thread overview]
Message-ID: <1a3c5934-4731-d474-e9d5-795e8337b180@katsuster.net> (raw)
In-Reply-To: <20190902120248.GA5819@sirena.co.uk>

Hello Mark,

Thanks a lot for your comments.

On 2019/09/02 21:02, Mark Brown wrote:
> On Sun, Sep 01, 2019 at 01:26:48AM +0900, Katsuhiro Suzuki wrote:
>> This patch change the judge timing about playing/capturing PCM rate.
>>
>> Original code set constraints list of PCM rate limits at set_sysclk.
>> This strategy works well if system is using fixed rate clock.
>>
>> But some boards and SoC (such as RockPro64 and RockChip I2S) has
>> connected SoC MCLK out to ES8316 MCLK in. In this case, SoC side I2S
>> will choose suitable frequency of MCLK such as fs * mclk-fs when
>> user starts playing or capturing.
> 
> The best way to handle this is to try to support both fixed and variable
> clock rates, some other drivers do this by setting constraints based on
> MCLK only if the MCLK has been set to a non-zero value.  They have the
> machine drivers reset the clock rate to 0 when it goes idle so that no
> constraints are applied then.  This means that if the machine has a
> fixed clock there will be constraints, and that constraints get applied
> if one direction has started and fixed the clock, but still allows the
> clock to be varied where possible.
> 

In my understanding, fixed and variable clock both use set_sysclk() for 
telling their MCLK to codec driver. For fixed MCLK cases we need to
apply constraint but for variable MCLK cases we should not set
constraints at set_sysclk(). How can we identify these two cases...?

For example, if machine sets very low MCLK once, the driver applies low
Fs constraints which I2S driver cannot support to. After that this sound
card cannot play/capture any Fs rate. It seems set_sysclk() is not
called if Fs does not match constraints. So we have no chance to
reconfigure MCLK by set_sysclk().


Best Regards,
Katsuhiro Suzuki

WARNING: multiple messages have this Message-ID (diff)
From: Katsuhiro Suzuki <katsuhiro@katsuster.net>
To: Mark Brown <broonie@kernel.org>
Cc: Hans de Goede <hdegoede@redhat.com>,
	alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org,
	David Yang <yangxiaohua@everest-semi.com>,
	Daniel Drake <drake@endlessm.com>
Subject: Re: [alsa-devel] [PATCH v2 1/3] ASoC: es8316: judge PCM rate at later timing
Date: Tue, 3 Sep 2019 04:19:10 +0900	[thread overview]
Message-ID: <1a3c5934-4731-d474-e9d5-795e8337b180@katsuster.net> (raw)
In-Reply-To: <20190902120248.GA5819@sirena.co.uk>

Hello Mark,

Thanks a lot for your comments.

On 2019/09/02 21:02, Mark Brown wrote:
> On Sun, Sep 01, 2019 at 01:26:48AM +0900, Katsuhiro Suzuki wrote:
>> This patch change the judge timing about playing/capturing PCM rate.
>>
>> Original code set constraints list of PCM rate limits at set_sysclk.
>> This strategy works well if system is using fixed rate clock.
>>
>> But some boards and SoC (such as RockPro64 and RockChip I2S) has
>> connected SoC MCLK out to ES8316 MCLK in. In this case, SoC side I2S
>> will choose suitable frequency of MCLK such as fs * mclk-fs when
>> user starts playing or capturing.
> 
> The best way to handle this is to try to support both fixed and variable
> clock rates, some other drivers do this by setting constraints based on
> MCLK only if the MCLK has been set to a non-zero value.  They have the
> machine drivers reset the clock rate to 0 when it goes idle so that no
> constraints are applied then.  This means that if the machine has a
> fixed clock there will be constraints, and that constraints get applied
> if one direction has started and fixed the clock, but still allows the
> clock to be varied where possible.
> 

In my understanding, fixed and variable clock both use set_sysclk() for 
telling their MCLK to codec driver. For fixed MCLK cases we need to
apply constraint but for variable MCLK cases we should not set
constraints at set_sysclk(). How can we identify these two cases...?

For example, if machine sets very low MCLK once, the driver applies low
Fs constraints which I2S driver cannot support to. After that this sound
card cannot play/capture any Fs rate. It seems set_sysclk() is not
called if Fs does not match constraints. So we have no chance to
reconfigure MCLK by set_sysclk().


Best Regards,
Katsuhiro Suzuki
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  reply	other threads:[~2019-09-02 19:19 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-31 16:26 [PATCH v2 1/3] ASoC: es8316: judge PCM rate at later timing Katsuhiro Suzuki
2019-08-31 16:26 ` [alsa-devel] " Katsuhiro Suzuki
2019-08-31 16:26 ` [PATCH v2 2/3] ASoC: es8316: Add clock control of MCLK Katsuhiro Suzuki
2019-08-31 16:26   ` [alsa-devel] " Katsuhiro Suzuki
2019-08-31 16:26 ` [PATCH v2 3/3] ASoC: es8316: add DT-bindings Katsuhiro Suzuki
2019-08-31 16:26   ` [alsa-devel] " Katsuhiro Suzuki
2019-09-02 12:02 ` [PATCH v2 1/3] ASoC: es8316: judge PCM rate at later timing Mark Brown
2019-09-02 12:02   ` [alsa-devel] " Mark Brown
2019-09-02 19:19   ` Katsuhiro Suzuki [this message]
2019-09-02 19:19     ` Katsuhiro Suzuki
2019-09-03 11:11     ` Mark Brown
2019-09-03 11:11       ` [alsa-devel] " Mark Brown
2019-09-03 16:03       ` Katsuhiro Suzuki
2019-09-03 16:03         ` [alsa-devel] " Katsuhiro Suzuki

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