Re: [PATCH v2 1/3] ASoC: es8316: judge PCM rate at later timing

From: Mark Brown <broonie@kernel.org>
To: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Cc: David Yang <yangxiaohua@everest-semi.com>,
	Daniel Drake <drake@endlessm.com>,
	Hans de Goede <hdegoede@redhat.com>,
	alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/3] ASoC: es8316: judge PCM rate at later timing
Date: Tue, 3 Sep 2019 12:11:38 +0100	[thread overview]
Message-ID: <20190903111138.GA6247@sirena.co.uk> (raw)
In-Reply-To: <1a3c5934-4731-d474-e9d5-795e8337b180@katsuster.net>

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On Tue, Sep 03, 2019 at 04:19:10AM +0900, Katsuhiro Suzuki wrote:
> On 2019/09/02 21:02, Mark Brown wrote:

> > The best way to handle this is to try to support both fixed and variable
> > clock rates, some other drivers do this by setting constraints based on
> > MCLK only if the MCLK has been set to a non-zero value.  They have the
> > machine drivers reset the clock rate to 0 when it goes idle so that no
> > constraints are applied then.  This means that if the machine has a

> In my understanding, fixed and variable clock both use set_sysclk() for
> telling their MCLK to codec driver. For fixed MCLK cases we need to
> apply constraint but for variable MCLK cases we should not set
> constraints at set_sysclk(). How can we identify these two cases...?

Like I say it's usually done by settingthe MCLK to 0 when not in use and
then not applying any constraints if there's no MCLK set.

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