All of lore.kernel.org
 help / color / mirror / Atom feed
From: Shawn Guo <shawn.guo@freescale.com>
To: Rob Herring <robherring2@gmail.com>
Cc: marc.zyngier@arm.com, devicetree-discuss@lists.ozlabs.org,
	Rob Herring <rob.herring@calxeda.com>,
	grant.likely@secretlab.ca, thomas.abraham@linaro.org,
	jamie@jamieiles.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC PATCH 0/3] Yet another GIC OF binding series
Date: Tue, 30 Aug 2011 11:26:33 +0800	[thread overview]
Message-ID: <20110830032633.GB19294@S2100-06.ap.freescale.net> (raw)
In-Reply-To: <1312921020-6820-1-git-send-email-robherring2@gmail.com>

On Tue, Aug 09, 2011 at 03:16:57PM -0500, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
> 
> Grant,
> 
> Here's yet another patch series for GIC binding and init. 
> 
> You keep saying we should have a common DT function scanning for interrupt
> controller nodes and calling their initialization functions. But that will
> not work until we have dynamic assignment of linux irq numbers. So either
> everyone should just stop trying to do DT bindings for GIC/VIC until that
> is in place, or we need an interim solution.

Yes, we need a way out.  I based my i.MX6Q series on this patch set.
With the v2 of "ARM: gic: add OF based initialization" in,

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>

Regards,
Shawn

> This is another attempt at
> the latter. I reworked gic_of_init intending for it to be the interrupt
> controller specific initialization function that DT interrupt controller
> scanning code would call. For now, it is just called by the platform code.
> The platform initialization looks something like this:
> 
> struct of_intc_desc desc;
> memset(&desc, 0, sizeof(desc));
> desc.controller = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic");
> gic_of_init(&desc);
> 
> I've addressed your previous comments and in particular initializing more
> than 1 GIC is supported now.
> 
> Rob
> 
> Rob Herring (3):
>   dt: irq: add interrupt controller descriptor struct
>   ARM: gic: allow irq_start to be 0
>   ARM: gic: add OF based initialization
> 
>  Documentation/devicetree/bindings/arm/gic.txt |   28 +++++++++++++++++++
>  arch/arm/common/gic.c                         |   36 ++++++++++++++++++++++++-
>  arch/arm/include/asm/hardware/gic.h           |    2 +
>  include/linux/of_irq.h                        |    6 ++++
>  4 files changed, 71 insertions(+), 1 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/arm/gic.txt
> 
> -- 
> 1.7.4.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 

WARNING: multiple messages have this Message-ID (diff)
From: shawn.guo@freescale.com (Shawn Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 0/3] Yet another GIC OF binding series
Date: Tue, 30 Aug 2011 11:26:33 +0800	[thread overview]
Message-ID: <20110830032633.GB19294@S2100-06.ap.freescale.net> (raw)
In-Reply-To: <1312921020-6820-1-git-send-email-robherring2@gmail.com>

On Tue, Aug 09, 2011 at 03:16:57PM -0500, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
> 
> Grant,
> 
> Here's yet another patch series for GIC binding and init. 
> 
> You keep saying we should have a common DT function scanning for interrupt
> controller nodes and calling their initialization functions. But that will
> not work until we have dynamic assignment of linux irq numbers. So either
> everyone should just stop trying to do DT bindings for GIC/VIC until that
> is in place, or we need an interim solution.

Yes, we need a way out.  I based my i.MX6Q series on this patch set.
With the v2 of "ARM: gic: add OF based initialization" in,

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>

Regards,
Shawn

> This is another attempt at
> the latter. I reworked gic_of_init intending for it to be the interrupt
> controller specific initialization function that DT interrupt controller
> scanning code would call. For now, it is just called by the platform code.
> The platform initialization looks something like this:
> 
> struct of_intc_desc desc;
> memset(&desc, 0, sizeof(desc));
> desc.controller = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic");
> gic_of_init(&desc);
> 
> I've addressed your previous comments and in particular initializing more
> than 1 GIC is supported now.
> 
> Rob
> 
> Rob Herring (3):
>   dt: irq: add interrupt controller descriptor struct
>   ARM: gic: allow irq_start to be 0
>   ARM: gic: add OF based initialization
> 
>  Documentation/devicetree/bindings/arm/gic.txt |   28 +++++++++++++++++++
>  arch/arm/common/gic.c                         |   36 ++++++++++++++++++++++++-
>  arch/arm/include/asm/hardware/gic.h           |    2 +
>  include/linux/of_irq.h                        |    6 ++++
>  4 files changed, 71 insertions(+), 1 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/arm/gic.txt
> 
> -- 
> 1.7.4.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 

  parent reply	other threads:[~2011-08-30  3:26 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-08-09 20:16 [RFC PATCH 0/3] Yet another GIC OF binding series Rob Herring
2011-08-09 20:16 ` Rob Herring
     [not found] ` <1312921020-6820-1-git-send-email-robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2011-08-09 20:16   ` [RFC PATCH 1/3] dt: irq: add interrupt controller descriptor struct Rob Herring
2011-08-09 20:16     ` Rob Herring
     [not found]     ` <1312921020-6820-2-git-send-email-robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2011-08-10 13:14       ` Jamie Iles
2011-08-10 13:14         ` Jamie Iles
2011-08-10 13:23         ` Rob Herring
2011-08-10 13:23           ` Rob Herring
2011-08-09 20:16   ` [RFC PATCH 2/3] ARM: gic: allow irq_start to be 0 Rob Herring
2011-08-09 20:16     ` Rob Herring
2011-08-09 20:17   ` [RFC PATCH 3/3] ARM: gic: add OF based initialization Rob Herring
2011-08-09 20:17     ` Rob Herring
2011-08-10  8:08     ` Marc Zyngier
2011-08-10  8:08       ` Marc Zyngier
     [not found]       ` <4E423C98.3040305-5wv7dgnIgG8@public.gmane.org>
2011-08-10 18:30         ` Rob Herring
2011-08-10 18:30           ` Rob Herring
2011-09-03 13:34   ` [RFC PATCH 0/3] Yet another GIC OF binding series Thomas Abraham
2011-09-03 13:34     ` Thomas Abraham
2011-08-25 21:49 ` [PATCH v2] ARM: gic: add OF based initialization Rob Herring
2011-08-25 21:49   ` Rob Herring
2011-08-26  2:37   ` Rob Herring
2011-08-26  2:37     ` Rob Herring
2011-08-30  3:26 ` Shawn Guo [this message]
2011-08-30  3:26   ` [RFC PATCH 0/3] Yet another GIC OF binding series Shawn Guo

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20110830032633.GB19294@S2100-06.ap.freescale.net \
    --to=shawn.guo@freescale.com \
    --cc=devicetree-discuss@lists.ozlabs.org \
    --cc=grant.likely@secretlab.ca \
    --cc=jamie@jamieiles.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=marc.zyngier@arm.com \
    --cc=rob.herring@calxeda.com \
    --cc=robherring2@gmail.com \
    --cc=thomas.abraham@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.