Re: [PATCH 6/6] x86: Use clwb in drm_clflush_virt_range

From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Borislav Petkov <bp@alien8.de>
Cc: Andy Lutomirski <luto@amacapital.net>,
	intel-gfx@lists.freedesktop.org, X86 ML <x86@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	DRI <dri-devel@lists.freedesktop.org>,
	Ingo Molnar <mingo@kernel.org>,
	Ross Zwisler <ross.zwisler@linux.intel.com>,
	H Peter Anvin <h.peter.anvin@intel.com>,
	Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [PATCH 6/6] x86: Use clwb in drm_clflush_virt_range
Date: Thu, 13 Nov 2014 20:14:11 +0200	[thread overview]
Message-ID: <20141113181411.GU10649@intel.com> (raw)
In-Reply-To: <20141113174734.GF14070@pd.tnic>

On Thu, Nov 13, 2014 at 06:47:34PM +0100, Borislav Petkov wrote:
> On Thu, Nov 13, 2014 at 07:33:54PM +0200, Ville Syrjälä wrote:
> > We use it both ways in i915. So please don't break it.
> 
> Haha, we started from Intel with Ross' patch and made a full circle
> back. Maybe you guys should talk about it.
> 
> LOL. :-)

Indeed. The problem I see with these patches is that they don't actually
tell what the new instruction does, so a casual glance doesn't really
raise any red flags. Another excuse I can use is that I just got used
to the fact that the x86 hasn't historically bothered separating
invalidate and writeback and just does both. In my previous life on the
dark^Warm side I did actually know the difference :)

But there's plenty of blame to go around to the other side of the fence
too. We should have documented what we expect from these functions.
Currently you just have to know/guess, and that's just not good enough.

-- 
Ville Syrjälä
Intel OTC