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From: Vinod Koul <vinod.koul@intel.com>
To: Mark Brown <broonie@kernel.org>
Cc: alsa-devel@alsa-project.org, tiwai@suse.de,
	liam.r.girdwood@linux.intel.com, patches.audio@intel.com, "Kp,
	Jeeja" <jeeja.kp@intel.com>,
	"Subhransu S. Prusty" <subhransu.s.prusty@intel.com>
Subject: Re: [PATCH v2 1/6] ASoC: Intel: Add helper to poll register for DSP status
Date: Thu, 9 Jul 2015 16:23:27 +0530	[thread overview]
Message-ID: <20150709105327.GQ836@localhost> (raw)
In-Reply-To: <20150709104855.GJ11162@sirena.org.uk>


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On Thu, Jul 09, 2015 at 11:48:55AM +0100, Mark Brown wrote:
> On Thu, Jul 09, 2015 at 09:57:41AM +0530, Vinod Koul wrote:
> > On Wed, Jul 08, 2015 at 07:36:21PM +0100, Mark Brown wrote:
> 
> > > > +	for (time = 0; time < timeout; time++) {
> > > > +		if ((sst_dsp_shim_read_unlocked(ctx, offset) & mask) == expected_value)
> > > > +			break;
> > > > +
> > > > +		mdelay(1);
> > > > +	}
> 
> > > mdelay() not msleep()?  If we're waiting for multiple miliseconds that
> > > could be lots of busy waiting.
> 
> > Usually this should get reflected in 1st iteration as the register update
> > would get updated farrily quickly. msleep will add up lots of latency to
> > this.
> 
> A common approach for that is to do a busy wait for say the first
> milisecond (perhaps polling more often too) and then fall back to
> something sleepy if things are slow.
Yes that sounds sensible to me, will add

Thanks
-- 
~Vinod

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  reply	other threads:[~2015-07-09 10:51 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-03 10:34 [PATCH v2 0/6] ASoC: Intel: Sklyake - add IPC routines Vinod Koul
2015-07-03 10:34 ` [PATCH v2 1/6] ASoC: Intel: Add helper to poll register for DSP status Vinod Koul
2015-07-08 18:36   ` Mark Brown
2015-07-09  4:27     ` Vinod Koul
2015-07-09 10:48       ` Mark Brown
2015-07-09 10:53         ` Vinod Koul [this message]
2015-07-03 10:34 ` [PATCH v2 2/6] ASoC: Intel: Define SKL ADSP IPC and general purpose registers Vinod Koul
2015-07-03 10:34 ` [PATCH v2 3/6] ASoC: Intel: Reorganize the common dsp structure Vinod Koul
2015-07-08 18:38   ` Mark Brown
2015-07-09  4:32     ` Vinod Koul
2015-07-03 10:34 ` [PATCH v2 4/6] ASoC: Intel: Add helper to update register bits with attr RWC Vinod Koul
2015-07-08 18:47   ` Mark Brown
2015-07-09  4:44     ` Vinod Koul
2015-07-03 10:34 ` [PATCH v2 5/6] ASoC: Intel: Add Skylake IPC library Vinod Koul
2015-07-08 18:46   ` Mark Brown
2015-07-09  5:26     ` Vinod Koul
2015-07-09 13:18       ` Vinod Koul
2015-07-03 10:34 ` [PATCH v2 6/6] ASoC: Intel: Add DSP init and boot up functionality for SKL Vinod Koul

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