From: Christoffer Dall <christoffer.dall@linaro.org>
To: Pavel Fedin <p.fedin@samsung.com>
Cc: 'Andre Przywara' <andre.przywara@arm.com>,
marc.zyngier@arm.com, kvmarm@lists.cs.columbia.edu,
eric.auger@linaro.org, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org, 'Peter Maydell' <peter.maydell@linaro.org>
Subject: Re: [PATCH v2 11/15] KVM: arm64: handle pending bit for LPIs in ITS emulation
Date: Wed, 7 Oct 2015 21:53:18 +0200 [thread overview]
Message-ID: <20151007195318.GB14315@cbox> (raw)
In-Reply-To: <017701d100db$b003c550$100b4ff0$@samsung.com>
On Wed, Oct 07, 2015 at 11:39:30AM +0300, Pavel Fedin wrote:
> Hello!
>
> > +/* Called with the distributor lock held by the caller. */
> > +void vits_unqueue_lpi(struct kvm_vcpu *vcpu, int lpi)
> > +{
> > + struct vgic_its *its = &vcpu->kvm->arch.vgic.its;
> > + struct its_itte *itte;
> > +
> > + spin_lock(&its->lock);
> > +
> > + /* Find the right ITTE and put the pending state back in there */
> > + itte = find_itte_by_lpi(vcpu->kvm, lpi);
> > + if (itte)
> > + __set_bit(vcpu->vcpu_id, itte->pending);
> > +
> > + spin_unlock(&its->lock);
> > +}
>
> I am working on implementing live migration for the ITS. And here i have one fundamental problem.
> vits_unqueue_lpi() processes only PENDING state. And looks like this corresponds to the HW
> implementation, which has only bitwise pending table. But, in terms of migration, we can actually
> have LPI in active state, while it's being processed.
I thought LPIs had strict fire-and-forget semantics, not allowing any
active state, and that they are either pending or inactive?
> The question is - how can we handle it? Should we have one more bitwise table for active LPIs, or
> is it enough to remember only a single, currently active LPI? Can LPIs be preempted on a real
> hardware, or not?
>
Perhaps you're asking if LPIs have active state semantics on real
hardware and thus supports threaded interrupt handling for LPIs?
That is not supported on real hardware, which I think addresses your
concerns.
Thanks,
-Christoffer
WARNING: multiple messages have this Message-ID (diff)
From: christoffer.dall@linaro.org (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 11/15] KVM: arm64: handle pending bit for LPIs in ITS emulation
Date: Wed, 7 Oct 2015 21:53:18 +0200 [thread overview]
Message-ID: <20151007195318.GB14315@cbox> (raw)
In-Reply-To: <017701d100db$b003c550$100b4ff0$@samsung.com>
On Wed, Oct 07, 2015 at 11:39:30AM +0300, Pavel Fedin wrote:
> Hello!
>
> > +/* Called with the distributor lock held by the caller. */
> > +void vits_unqueue_lpi(struct kvm_vcpu *vcpu, int lpi)
> > +{
> > + struct vgic_its *its = &vcpu->kvm->arch.vgic.its;
> > + struct its_itte *itte;
> > +
> > + spin_lock(&its->lock);
> > +
> > + /* Find the right ITTE and put the pending state back in there */
> > + itte = find_itte_by_lpi(vcpu->kvm, lpi);
> > + if (itte)
> > + __set_bit(vcpu->vcpu_id, itte->pending);
> > +
> > + spin_unlock(&its->lock);
> > +}
>
> I am working on implementing live migration for the ITS. And here i have one fundamental problem.
> vits_unqueue_lpi() processes only PENDING state. And looks like this corresponds to the HW
> implementation, which has only bitwise pending table. But, in terms of migration, we can actually
> have LPI in active state, while it's being processed.
I thought LPIs had strict fire-and-forget semantics, not allowing any
active state, and that they are either pending or inactive?
> The question is - how can we handle it? Should we have one more bitwise table for active LPIs, or
> is it enough to remember only a single, currently active LPI? Can LPIs be preempted on a real
> hardware, or not?
>
Perhaps you're asking if LPIs have active state semantics on real
hardware and thus supports threaded interrupt handling for LPIs?
That is not supported on real hardware, which I think addresses your
concerns.
Thanks,
-Christoffer
next prev parent reply other threads:[~2015-10-07 19:53 UTC|newest]
Thread overview: 138+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-10 14:21 [PATCH v2 00/15] KVM: arm64: GICv3 ITS emulation Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-07-10 14:21 ` [PATCH v2 01/15] KVM: arm/arm64: VGIC: don't track used LRs in the distributor Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-08-12 9:01 ` Eric Auger
2015-08-12 9:01 ` Eric Auger
2015-08-24 16:33 ` Andre Przywara
2015-08-24 16:33 ` Andre Przywara
2015-08-31 8:42 ` Eric Auger
2015-08-31 8:42 ` Eric Auger
2015-09-02 9:00 ` Andre Przywara
2015-09-02 9:00 ` Andre Przywara
2015-10-02 9:55 ` Pavel Fedin
2015-10-02 9:55 ` Pavel Fedin
2015-10-02 10:32 ` Andre Przywara
2015-10-02 10:32 ` Andre Przywara
2015-10-02 10:39 ` Pavel Fedin
2015-10-02 10:39 ` Pavel Fedin
2015-10-02 12:39 ` Pavel Fedin
2015-10-02 12:39 ` Pavel Fedin
2015-10-02 12:49 ` Andre Przywara
2015-10-02 12:49 ` Andre Przywara
2015-07-10 14:21 ` [PATCH v2 02/15] KVM: extend struct kvm_msi to hold a 32-bit device ID Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-07-10 14:21 ` [PATCH v2 03/15] KVM: arm/arm64: add emulation model specific destroy function Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-07-10 14:21 ` [PATCH v2 04/15] KVM: arm/arm64: extend arch CAP checks to allow per-VM capabilities Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-08-12 12:26 ` Eric Auger
2015-08-12 12:26 ` Eric Auger
2015-07-10 14:21 ` [PATCH v2 05/15] KVM: arm/arm64: make GIC frame address initialization model specific Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-08-12 13:02 ` Eric Auger
2015-08-12 13:02 ` Eric Auger
2015-08-24 17:24 ` Andre Przywara
2015-08-24 17:24 ` Andre Przywara
2015-08-31 9:31 ` Eric Auger
2015-08-31 9:31 ` Eric Auger
2015-07-10 14:21 ` [PATCH v2 06/15] KVM: arm64: Introduce new MMIO region for the ITS base address Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-08-13 12:17 ` Eric Auger
2015-08-13 12:17 ` Eric Auger
2015-07-10 14:21 ` [PATCH v2 07/15] KVM: arm64: handle ITS related GICv3 redistributor registers Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-08-13 12:17 ` Eric Auger
2015-08-13 12:17 ` Eric Auger
2015-08-24 18:08 ` Andre Przywara
2015-08-24 18:08 ` Andre Przywara
2015-07-10 14:21 ` [PATCH v2 08/15] KVM: arm64: introduce ITS emulation file with stub functions Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-08-13 12:48 ` Eric Auger
2015-08-13 12:48 ` Eric Auger
2015-08-25 9:39 ` Andre Przywara
2015-08-25 9:39 ` Andre Przywara
2015-07-10 14:21 ` [PATCH v2 09/15] KVM: arm64: implement basic ITS register handlers Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-08-13 15:25 ` Eric Auger
2015-08-13 15:25 ` Eric Auger
2015-08-25 10:23 ` Andre Przywara
2015-08-25 10:23 ` Andre Przywara
2015-10-02 7:51 ` Pavel Fedin
2015-10-02 7:51 ` Pavel Fedin
2015-07-10 14:21 ` [PATCH v2 10/15] KVM: arm64: add data structures to model ITS interrupt translation Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-08-13 15:46 ` Eric Auger
2015-08-13 15:46 ` Eric Auger
2015-08-25 11:15 ` Andre Przywara
2015-08-25 11:15 ` Andre Przywara
2015-08-27 14:16 ` Eric Auger
2015-08-27 14:16 ` Eric Auger
2015-07-10 14:21 ` [PATCH v2 11/15] KVM: arm64: handle pending bit for LPIs in ITS emulation Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-08-14 11:58 ` Eric Auger
2015-08-14 11:58 ` Eric Auger
2015-08-25 14:34 ` Andre Przywara
2015-08-25 14:34 ` Andre Przywara
2015-08-31 9:45 ` Eric Auger
2015-08-31 9:45 ` Eric Auger
2015-10-07 8:39 ` Pavel Fedin
2015-10-07 8:39 ` Pavel Fedin
2015-10-07 19:53 ` Christoffer Dall [this message]
2015-10-07 19:53 ` Christoffer Dall
2015-07-10 14:21 ` [PATCH v2 12/15] KVM: arm64: sync LPI configuration and pending tables Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-08-14 11:58 ` Eric Auger
2015-08-14 11:58 ` Eric Auger
2015-08-14 12:35 ` Eric Auger
2015-08-14 12:35 ` Eric Auger
2015-08-25 15:47 ` Andre Przywara
2015-08-25 15:47 ` Andre Przywara
2015-08-31 9:51 ` Eric Auger
2015-08-31 9:51 ` Eric Auger
2015-08-25 15:27 ` Andre Przywara
2015-08-25 15:27 ` Andre Przywara
2015-08-31 9:47 ` Eric Auger
2015-08-31 9:47 ` Eric Auger
2015-07-10 14:21 ` [PATCH v2 13/15] KVM: arm64: implement ITS command queue command handlers Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-08-17 13:33 ` Eric Auger
2015-08-17 13:33 ` Eric Auger
2015-10-07 14:54 ` Andre Przywara
2015-10-07 14:54 ` Andre Przywara
2015-07-10 14:21 ` [PATCH v2 14/15] KVM: arm64: implement MSI injection in ITS emulation Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-07-31 13:22 ` Eric Auger
2015-07-31 13:22 ` Eric Auger
2015-08-02 20:20 ` Andre Przywara
2015-08-02 20:20 ` Andre Przywara
2015-08-03 6:41 ` Pavel Fedin
2015-08-03 6:41 ` Pavel Fedin
2015-08-03 9:07 ` Eric Auger
2015-08-03 9:07 ` Eric Auger
2015-08-03 9:16 ` Pavel Fedin
2015-08-03 9:16 ` Pavel Fedin
2015-08-03 15:37 ` Eric Auger
2015-08-03 15:37 ` Eric Auger
2015-08-03 17:06 ` Marc Zyngier
2015-08-03 17:06 ` Marc Zyngier
2015-08-04 6:53 ` Pavel Fedin
2015-08-04 6:53 ` Pavel Fedin
2015-08-24 14:14 ` Andre Przywara
2015-08-24 14:14 ` Andre Przywara
2015-08-17 13:44 ` Eric Auger
2015-08-17 13:44 ` Eric Auger
2015-07-10 14:21 ` [PATCH v2 15/15] KVM: arm64: enable ITS emulation as a virtual MSI controller Andre Przywara
2015-07-10 14:21 ` Andre Przywara
2015-07-15 9:10 ` Pavel Fedin
2015-07-15 9:10 ` Pavel Fedin
2015-07-15 9:52 ` Andre Przywara
2015-07-15 9:52 ` Andre Przywara
2015-07-15 10:01 ` Pavel Fedin
2015-07-15 10:01 ` Pavel Fedin
2015-07-15 12:02 ` [PATCH v2 00/15] KVM: arm64: GICv3 ITS emulation Pavel Fedin
2015-07-15 12:02 ` Pavel Fedin
2015-09-24 11:18 ` Pavel Fedin
2015-09-24 11:18 ` Pavel Fedin
2015-09-24 11:35 ` Andre Przywara
2015-09-24 11:35 ` Andre Przywara
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