From: Igor Mammedov <imammedo@redhat.com>
To: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Cc: pbonzini@redhat.com, gleb@kernel.org, mtosatti@redhat.com,
stefanha@redhat.com, mst@redhat.com, rth@twiddle.net,
ehabkost@redhat.com, dan.j.williams@intel.com,
kvm@vger.kernel.org, qemu-devel@nongnu.org
Subject: Re: [PATCH v2 05/11] acpi: allow using object as offset for OperationRegion
Date: Mon, 8 Feb 2016 11:57:13 +0100 [thread overview]
Message-ID: <20160208115713.0f43964b@nial.brq.redhat.com> (raw)
In-Reply-To: <1452624610-46945-6-git-send-email-guangrong.xiao@linux.intel.com>
On Wed, 13 Jan 2016 02:50:04 +0800
Xiao Guangrong <guangrong.xiao@linux.intel.com> wrote:
> Extend aml_operation_region() to use object as offset
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>
> Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
> ---
> hw/acpi/aml-build.c | 4 ++--
> hw/i386/acpi-build.c | 31 ++++++++++++++++---------------
> include/hw/acpi/aml-build.h | 2 +-
> 3 files changed, 19 insertions(+), 18 deletions(-)
>
> diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
> index 421dd84..208f22e 100644
> --- a/hw/acpi/aml-build.c
> +++ b/hw/acpi/aml-build.c
> @@ -946,14 +946,14 @@ Aml *aml_package(uint8_t num_elements)
>
> /* ACPI 1.0b: 16.2.5.2 Named Objects Encoding: DefOpRegion */
> Aml *aml_operation_region(const char *name, AmlRegionSpace rs,
> - uint32_t offset, uint32_t len)
> + Aml *offset, uint32_t len)
> {
> Aml *var = aml_alloc();
> build_append_byte(var->buf, 0x5B); /* ExtOpPrefix */
> build_append_byte(var->buf, 0x80); /* OpRegionOp */
> build_append_namestring(var->buf, "%s", name);
> build_append_byte(var->buf, rs);
> - build_append_int(var->buf, offset);
> + aml_append(var, offset);
> build_append_int(var->buf, len);
> return var;
> }
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 78758e2..1ca044f 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -993,7 +993,7 @@ static void build_processor_devices(Aml *sb_scope, unsigned acpi_cpus,
> aml_append(sb_scope, dev);
> /* declare CPU hotplug MMIO region and PRS field to access it */
> aml_append(sb_scope, aml_operation_region(
> - "PRST", AML_SYSTEM_IO, pm->cpu_hp_io_base, pm->cpu_hp_io_len));
> + "PRST", AML_SYSTEM_IO, aml_int(pm->cpu_hp_io_base), pm->cpu_hp_io_len));
> field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
> aml_append(field, aml_named_field("PRS", 256));
> aml_append(sb_scope, field);
> @@ -1078,7 +1078,7 @@ static void build_memory_devices(Aml *sb_scope, int nr_mem,
>
> aml_append(scope, aml_operation_region(
> MEMORY_HOTPLUG_IO_REGION, AML_SYSTEM_IO,
> - io_base, io_len)
> + aml_int(io_base), io_len)
> );
>
> field = aml_field(MEMORY_HOTPLUG_IO_REGION, AML_DWORD_ACC,
> @@ -1192,7 +1192,8 @@ static void build_hpet_aml(Aml *table)
> aml_append(dev, aml_name_decl("_UID", zero));
>
> aml_append(dev,
> - aml_operation_region("HPTM", AML_SYSTEM_MEMORY, HPET_BASE, HPET_LEN));
> + aml_operation_region("HPTM", AML_SYSTEM_MEMORY, aml_int(HPET_BASE),
> + HPET_LEN));
> field = aml_field("HPTM", AML_DWORD_ACC, AML_LOCK, AML_PRESERVE);
> aml_append(field, aml_named_field("VEND", 32));
> aml_append(field, aml_named_field("PRD", 32));
> @@ -1430,7 +1431,7 @@ static void build_dbg_aml(Aml *table)
> Aml *idx = aml_local(2);
>
> aml_append(scope,
> - aml_operation_region("DBG", AML_SYSTEM_IO, 0x0402, 0x01));
> + aml_operation_region("DBG", AML_SYSTEM_IO, aml_int(0x0402), 0x01));
> field = aml_field("DBG", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
> aml_append(field, aml_named_field("DBGB", 8));
> aml_append(scope, field);
> @@ -1770,10 +1771,10 @@ static void build_q35_isa_bridge(Aml *table)
>
> /* ICH9 PCI to ISA irq remapping */
> aml_append(dev, aml_operation_region("PIRQ", AML_PCI_CONFIG,
> - 0x60, 0x0C));
> + aml_int(0x60), 0x0C));
>
> aml_append(dev, aml_operation_region("LPCD", AML_PCI_CONFIG,
> - 0x80, 0x02));
> + aml_int(0x80), 0x02));
> field = aml_field("LPCD", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE);
> aml_append(field, aml_named_field("COMA", 3));
> aml_append(field, aml_reserved_field(1));
> @@ -1785,7 +1786,7 @@ static void build_q35_isa_bridge(Aml *table)
> aml_append(dev, field);
>
> aml_append(dev, aml_operation_region("LPCE", AML_PCI_CONFIG,
> - 0x82, 0x02));
> + aml_int(0x82), 0x02));
> /* enable bits */
> field = aml_field("LPCE", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE);
> aml_append(field, aml_named_field("CAEN", 1));
> @@ -1808,7 +1809,7 @@ static void build_piix4_pm(Aml *table)
> aml_append(dev, aml_name_decl("_ADR", aml_int(0x00010003)));
>
> aml_append(dev, aml_operation_region("P13C", AML_PCI_CONFIG,
> - 0x00, 0xff));
> + aml_int(0x00), 0xff));
> aml_append(scope, dev);
> aml_append(table, scope);
> }
> @@ -1825,7 +1826,7 @@ static void build_piix4_isa_bridge(Aml *table)
>
> /* PIIX PCI to ISA irq remapping */
> aml_append(dev, aml_operation_region("P40C", AML_PCI_CONFIG,
> - 0x60, 0x04));
> + aml_int(0x60), 0x04));
> /* enable bits */
> field = aml_field("^PX13.P13C", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE);
> /* Offset(0x5f),, 7, */
> @@ -1854,20 +1855,20 @@ static void build_piix4_pci_hotplug(Aml *table)
> scope = aml_scope("_SB.PCI0");
>
> aml_append(scope,
> - aml_operation_region("PCST", AML_SYSTEM_IO, 0xae00, 0x08));
> + aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(0xae00), 0x08));
> field = aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> aml_append(field, aml_named_field("PCIU", 32));
> aml_append(field, aml_named_field("PCID", 32));
> aml_append(scope, field);
>
> aml_append(scope,
> - aml_operation_region("SEJ", AML_SYSTEM_IO, 0xae08, 0x04));
> + aml_operation_region("SEJ", AML_SYSTEM_IO, aml_int(0xae08), 0x04));
> field = aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> aml_append(field, aml_named_field("B0EJ", 32));
> aml_append(scope, field);
>
> aml_append(scope,
> - aml_operation_region("BNMR", AML_SYSTEM_IO, 0xae10, 0x04));
> + aml_operation_region("BNMR", AML_SYSTEM_IO, aml_int(0xae10), 0x04));
> field = aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> aml_append(field, aml_named_field("BNUM", 32));
> aml_append(scope, field);
> @@ -2133,7 +2134,7 @@ build_ssdt(GArray *table_data, GArray *linker,
> aml_append(dev, aml_name_decl("_CRS", crs));
>
> aml_append(dev, aml_operation_region("PEOR", AML_SYSTEM_IO,
> - misc->pvpanic_port, 1));
> + aml_int(misc->pvpanic_port), 1));
> field = aml_field("PEOR", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
> aml_append(field, aml_named_field("PEPT", 8));
> aml_append(dev, field);
> @@ -2455,9 +2456,9 @@ build_dsdt(GArray *table_data, GArray *linker,
> } else {
> sb_scope = aml_scope("_SB");
> aml_append(sb_scope,
> - aml_operation_region("PCST", AML_SYSTEM_IO, 0xae00, 0x0c));
> + aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(0xae00), 0x0c));
> aml_append(sb_scope,
> - aml_operation_region("PCSB", AML_SYSTEM_IO, 0xae0c, 0x01));
> + aml_operation_region("PCSB", AML_SYSTEM_IO, aml_int(0xae0c), 0x01));
> field = aml_field("PCSB", AML_ANY_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> aml_append(field, aml_named_field("PCIB", 8));
> aml_append(sb_scope, field);
> diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
> index 4a5168a..7c8db8f 100644
> --- a/include/hw/acpi/aml-build.h
> +++ b/include/hw/acpi/aml-build.h
> @@ -287,7 +287,7 @@ Aml *aml_interrupt(AmlConsumerAndProducer con_and_pro,
> Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base,
> uint8_t aln, uint8_t len);
> Aml *aml_operation_region(const char *name, AmlRegionSpace rs,
> - uint32_t offset, uint32_t len);
> + Aml *offset, uint32_t len);
> Aml *aml_irq_no_flags(uint8_t irq);
> Aml *aml_named_field(const char *name, unsigned length);
> Aml *aml_reserved_field(unsigned length);
WARNING: multiple messages have this Message-ID (diff)
From: Igor Mammedov <imammedo@redhat.com>
To: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Cc: ehabkost@redhat.com, kvm@vger.kernel.org, mst@redhat.com,
gleb@kernel.org, mtosatti@redhat.com, qemu-devel@nongnu.org,
stefanha@redhat.com, pbonzini@redhat.com,
dan.j.williams@intel.com, rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH v2 05/11] acpi: allow using object as offset for OperationRegion
Date: Mon, 8 Feb 2016 11:57:13 +0100 [thread overview]
Message-ID: <20160208115713.0f43964b@nial.brq.redhat.com> (raw)
In-Reply-To: <1452624610-46945-6-git-send-email-guangrong.xiao@linux.intel.com>
On Wed, 13 Jan 2016 02:50:04 +0800
Xiao Guangrong <guangrong.xiao@linux.intel.com> wrote:
> Extend aml_operation_region() to use object as offset
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>
> Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
> ---
> hw/acpi/aml-build.c | 4 ++--
> hw/i386/acpi-build.c | 31 ++++++++++++++++---------------
> include/hw/acpi/aml-build.h | 2 +-
> 3 files changed, 19 insertions(+), 18 deletions(-)
>
> diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
> index 421dd84..208f22e 100644
> --- a/hw/acpi/aml-build.c
> +++ b/hw/acpi/aml-build.c
> @@ -946,14 +946,14 @@ Aml *aml_package(uint8_t num_elements)
>
> /* ACPI 1.0b: 16.2.5.2 Named Objects Encoding: DefOpRegion */
> Aml *aml_operation_region(const char *name, AmlRegionSpace rs,
> - uint32_t offset, uint32_t len)
> + Aml *offset, uint32_t len)
> {
> Aml *var = aml_alloc();
> build_append_byte(var->buf, 0x5B); /* ExtOpPrefix */
> build_append_byte(var->buf, 0x80); /* OpRegionOp */
> build_append_namestring(var->buf, "%s", name);
> build_append_byte(var->buf, rs);
> - build_append_int(var->buf, offset);
> + aml_append(var, offset);
> build_append_int(var->buf, len);
> return var;
> }
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 78758e2..1ca044f 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -993,7 +993,7 @@ static void build_processor_devices(Aml *sb_scope, unsigned acpi_cpus,
> aml_append(sb_scope, dev);
> /* declare CPU hotplug MMIO region and PRS field to access it */
> aml_append(sb_scope, aml_operation_region(
> - "PRST", AML_SYSTEM_IO, pm->cpu_hp_io_base, pm->cpu_hp_io_len));
> + "PRST", AML_SYSTEM_IO, aml_int(pm->cpu_hp_io_base), pm->cpu_hp_io_len));
> field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
> aml_append(field, aml_named_field("PRS", 256));
> aml_append(sb_scope, field);
> @@ -1078,7 +1078,7 @@ static void build_memory_devices(Aml *sb_scope, int nr_mem,
>
> aml_append(scope, aml_operation_region(
> MEMORY_HOTPLUG_IO_REGION, AML_SYSTEM_IO,
> - io_base, io_len)
> + aml_int(io_base), io_len)
> );
>
> field = aml_field(MEMORY_HOTPLUG_IO_REGION, AML_DWORD_ACC,
> @@ -1192,7 +1192,8 @@ static void build_hpet_aml(Aml *table)
> aml_append(dev, aml_name_decl("_UID", zero));
>
> aml_append(dev,
> - aml_operation_region("HPTM", AML_SYSTEM_MEMORY, HPET_BASE, HPET_LEN));
> + aml_operation_region("HPTM", AML_SYSTEM_MEMORY, aml_int(HPET_BASE),
> + HPET_LEN));
> field = aml_field("HPTM", AML_DWORD_ACC, AML_LOCK, AML_PRESERVE);
> aml_append(field, aml_named_field("VEND", 32));
> aml_append(field, aml_named_field("PRD", 32));
> @@ -1430,7 +1431,7 @@ static void build_dbg_aml(Aml *table)
> Aml *idx = aml_local(2);
>
> aml_append(scope,
> - aml_operation_region("DBG", AML_SYSTEM_IO, 0x0402, 0x01));
> + aml_operation_region("DBG", AML_SYSTEM_IO, aml_int(0x0402), 0x01));
> field = aml_field("DBG", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
> aml_append(field, aml_named_field("DBGB", 8));
> aml_append(scope, field);
> @@ -1770,10 +1771,10 @@ static void build_q35_isa_bridge(Aml *table)
>
> /* ICH9 PCI to ISA irq remapping */
> aml_append(dev, aml_operation_region("PIRQ", AML_PCI_CONFIG,
> - 0x60, 0x0C));
> + aml_int(0x60), 0x0C));
>
> aml_append(dev, aml_operation_region("LPCD", AML_PCI_CONFIG,
> - 0x80, 0x02));
> + aml_int(0x80), 0x02));
> field = aml_field("LPCD", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE);
> aml_append(field, aml_named_field("COMA", 3));
> aml_append(field, aml_reserved_field(1));
> @@ -1785,7 +1786,7 @@ static void build_q35_isa_bridge(Aml *table)
> aml_append(dev, field);
>
> aml_append(dev, aml_operation_region("LPCE", AML_PCI_CONFIG,
> - 0x82, 0x02));
> + aml_int(0x82), 0x02));
> /* enable bits */
> field = aml_field("LPCE", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE);
> aml_append(field, aml_named_field("CAEN", 1));
> @@ -1808,7 +1809,7 @@ static void build_piix4_pm(Aml *table)
> aml_append(dev, aml_name_decl("_ADR", aml_int(0x00010003)));
>
> aml_append(dev, aml_operation_region("P13C", AML_PCI_CONFIG,
> - 0x00, 0xff));
> + aml_int(0x00), 0xff));
> aml_append(scope, dev);
> aml_append(table, scope);
> }
> @@ -1825,7 +1826,7 @@ static void build_piix4_isa_bridge(Aml *table)
>
> /* PIIX PCI to ISA irq remapping */
> aml_append(dev, aml_operation_region("P40C", AML_PCI_CONFIG,
> - 0x60, 0x04));
> + aml_int(0x60), 0x04));
> /* enable bits */
> field = aml_field("^PX13.P13C", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE);
> /* Offset(0x5f),, 7, */
> @@ -1854,20 +1855,20 @@ static void build_piix4_pci_hotplug(Aml *table)
> scope = aml_scope("_SB.PCI0");
>
> aml_append(scope,
> - aml_operation_region("PCST", AML_SYSTEM_IO, 0xae00, 0x08));
> + aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(0xae00), 0x08));
> field = aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> aml_append(field, aml_named_field("PCIU", 32));
> aml_append(field, aml_named_field("PCID", 32));
> aml_append(scope, field);
>
> aml_append(scope,
> - aml_operation_region("SEJ", AML_SYSTEM_IO, 0xae08, 0x04));
> + aml_operation_region("SEJ", AML_SYSTEM_IO, aml_int(0xae08), 0x04));
> field = aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> aml_append(field, aml_named_field("B0EJ", 32));
> aml_append(scope, field);
>
> aml_append(scope,
> - aml_operation_region("BNMR", AML_SYSTEM_IO, 0xae10, 0x04));
> + aml_operation_region("BNMR", AML_SYSTEM_IO, aml_int(0xae10), 0x04));
> field = aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> aml_append(field, aml_named_field("BNUM", 32));
> aml_append(scope, field);
> @@ -2133,7 +2134,7 @@ build_ssdt(GArray *table_data, GArray *linker,
> aml_append(dev, aml_name_decl("_CRS", crs));
>
> aml_append(dev, aml_operation_region("PEOR", AML_SYSTEM_IO,
> - misc->pvpanic_port, 1));
> + aml_int(misc->pvpanic_port), 1));
> field = aml_field("PEOR", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
> aml_append(field, aml_named_field("PEPT", 8));
> aml_append(dev, field);
> @@ -2455,9 +2456,9 @@ build_dsdt(GArray *table_data, GArray *linker,
> } else {
> sb_scope = aml_scope("_SB");
> aml_append(sb_scope,
> - aml_operation_region("PCST", AML_SYSTEM_IO, 0xae00, 0x0c));
> + aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(0xae00), 0x0c));
> aml_append(sb_scope,
> - aml_operation_region("PCSB", AML_SYSTEM_IO, 0xae0c, 0x01));
> + aml_operation_region("PCSB", AML_SYSTEM_IO, aml_int(0xae0c), 0x01));
> field = aml_field("PCSB", AML_ANY_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> aml_append(field, aml_named_field("PCIB", 8));
> aml_append(sb_scope, field);
> diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
> index 4a5168a..7c8db8f 100644
> --- a/include/hw/acpi/aml-build.h
> +++ b/include/hw/acpi/aml-build.h
> @@ -287,7 +287,7 @@ Aml *aml_interrupt(AmlConsumerAndProducer con_and_pro,
> Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base,
> uint8_t aln, uint8_t len);
> Aml *aml_operation_region(const char *name, AmlRegionSpace rs,
> - uint32_t offset, uint32_t len);
> + Aml *offset, uint32_t len);
> Aml *aml_irq_no_flags(uint8_t irq);
> Aml *aml_named_field(const char *name, unsigned length);
> Aml *aml_reserved_field(unsigned length);
next prev parent reply other threads:[~2016-02-08 10:57 UTC|newest]
Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-12 18:49 [PATCH v2 00/11] NVDIMM ACPI: introduce the framework of QEMU emulated Xiao Guangrong
2016-01-12 18:49 ` [Qemu-devel] " Xiao Guangrong
2016-01-12 18:50 ` [PATCH v2 01/11] tests: acpi: test multiple SSDT tables Xiao Guangrong
2016-01-12 18:50 ` [Qemu-devel] " Xiao Guangrong
2016-01-12 18:50 ` [PATCH v2 02/11] tests: acpi: test NVDIMM tables Xiao Guangrong
2016-01-12 18:50 ` [Qemu-devel] " Xiao Guangrong
2016-02-04 16:20 ` Michael S. Tsirkin
2016-02-04 16:20 ` [Qemu-devel] " Michael S. Tsirkin
2016-02-14 5:36 ` Xiao Guangrong
2016-02-14 5:36 ` [Qemu-devel] " Xiao Guangrong
2016-01-12 18:50 ` [PATCH v2 03/11] acpi: add aml_create_field() Xiao Guangrong
2016-01-12 18:50 ` [Qemu-devel] " Xiao Guangrong
2016-02-08 10:47 ` Igor Mammedov
2016-02-08 10:47 ` [Qemu-devel] " Igor Mammedov
2016-02-14 5:41 ` Xiao Guangrong
2016-02-14 5:41 ` [Qemu-devel] " Xiao Guangrong
2016-01-12 18:50 ` [PATCH v2 04/11] acpi: add aml_concatenate() Xiao Guangrong
2016-01-12 18:50 ` [Qemu-devel] " Xiao Guangrong
2016-02-08 10:51 ` Igor Mammedov
2016-02-08 10:51 ` [Qemu-devel] " Igor Mammedov
2016-02-14 5:52 ` Xiao Guangrong
2016-02-14 5:52 ` [Qemu-devel] " Xiao Guangrong
2016-02-14 5:55 ` Xiao Guangrong
2016-02-14 5:55 ` [Qemu-devel] " Xiao Guangrong
2016-02-15 9:02 ` Igor Mammedov
2016-02-15 9:02 ` [Qemu-devel] " Igor Mammedov
2016-02-15 10:32 ` Xiao Guangrong
2016-02-15 10:32 ` [Qemu-devel] " Xiao Guangrong
2016-01-12 18:50 ` [PATCH v2 05/11] acpi: allow using object as offset for OperationRegion Xiao Guangrong
2016-01-12 18:50 ` [Qemu-devel] " Xiao Guangrong
2016-02-08 10:57 ` Igor Mammedov [this message]
2016-02-08 10:57 ` Igor Mammedov
2016-01-12 18:50 ` [PATCH v2 06/11] nvdimm acpi: initialize the resource used by NVDIMM ACPI Xiao Guangrong
2016-01-12 18:50 ` [Qemu-devel] " Xiao Guangrong
2016-02-04 16:22 ` Michael S. Tsirkin
2016-02-04 16:22 ` [Qemu-devel] " Michael S. Tsirkin
2016-02-08 11:03 ` Igor Mammedov
2016-02-08 11:03 ` [Qemu-devel] " Igor Mammedov
2016-02-14 5:57 ` Xiao Guangrong
2016-02-14 5:57 ` [Qemu-devel] " Xiao Guangrong
2016-02-15 9:11 ` Igor Mammedov
2016-02-15 9:18 ` Michael S. Tsirkin
2016-02-15 10:13 ` Xiao Guangrong
2016-02-15 10:30 ` Michael S. Tsirkin
2016-02-15 10:30 ` Michael S. Tsirkin
2016-02-15 10:47 ` Igor Mammedov
2016-02-15 10:47 ` Igor Mammedov
2016-02-15 11:22 ` Xiao Guangrong
2016-02-15 11:22 ` Xiao Guangrong
2016-02-15 11:45 ` Michael S. Tsirkin
2016-02-15 13:32 ` Igor Mammedov
2016-02-15 15:53 ` Xiao Guangrong
2016-02-15 17:24 ` Igor Mammedov
2016-02-15 17:24 ` Igor Mammedov
2016-02-15 18:35 ` Xiao Guangrong
2016-02-15 18:35 ` Xiao Guangrong
2016-02-16 11:00 ` Igor Mammedov
2016-02-17 2:04 ` Xiao Guangrong
2016-02-17 17:26 ` Michael S. Tsirkin
2016-02-17 17:26 ` Michael S. Tsirkin
2016-02-18 4:03 ` Xiao Guangrong
2016-02-18 4:03 ` Xiao Guangrong
2016-02-18 10:05 ` Igor Mammedov
2016-02-18 10:05 ` [Qemu-devel] " Igor Mammedov
2016-02-19 8:08 ` Michael S. Tsirkin
2016-02-19 8:43 ` Dan Williams
2016-02-19 8:43 ` Dan Williams
2016-02-22 10:30 ` Xiao Guangrong
2016-02-22 10:30 ` Xiao Guangrong
2016-02-22 10:34 ` Xiao Guangrong
2016-02-18 10:20 ` Michael S. Tsirkin
2016-02-18 10:20 ` Michael S. Tsirkin
2016-02-15 11:36 ` Michael S. Tsirkin
2016-02-15 11:36 ` Michael S. Tsirkin
2016-01-12 18:50 ` [PATCH v2 07/11] nvdimm acpi: introduce patched dsm memory Xiao Guangrong
2016-01-12 18:50 ` [Qemu-devel] " Xiao Guangrong
2016-01-12 18:50 ` [PATCH v2 08/11] nvdimm acpi: let qemu handle _DSM method Xiao Guangrong
2016-01-12 18:50 ` [Qemu-devel] " Xiao Guangrong
2016-01-12 18:50 ` [PATCH v2 09/11] nvdimm acpi: emulate dsm method Xiao Guangrong
2016-01-12 18:50 ` [Qemu-devel] " Xiao Guangrong
2016-01-12 18:50 ` [PATCH v2 10/11] nvdimm acpi: add _CRS Xiao Guangrong
2016-01-12 18:50 ` [Qemu-devel] " Xiao Guangrong
2016-01-12 18:50 ` [PATCH v2 11/11] tests: acpi: update nvdimm ssdt table Xiao Guangrong
2016-01-12 18:50 ` [Qemu-devel] " Xiao Guangrong
2016-01-20 2:21 ` [PATCH v2 00/11] NVDIMM ACPI: introduce the framework of QEMU emulated Xiao Guangrong
2016-01-20 2:21 ` [Qemu-devel] " Xiao Guangrong
2016-01-28 4:42 ` Xiao Guangrong
2016-01-28 4:42 ` [Qemu-devel] " Xiao Guangrong
2016-02-04 16:24 ` Michael S. Tsirkin
2016-02-04 16:24 ` [Qemu-devel] " Michael S. Tsirkin
2016-02-14 5:38 ` Xiao Guangrong
2016-02-14 5:38 ` Xiao Guangrong
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