From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> To: Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> Cc: ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org, linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org, linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org, john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org, linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, hauke.mehrtens-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org Subject: Re: [PATCH 08/13] reset: Add a reset controller driver for the Lantiq XWAY based SoCs Date: Thu, 20 Apr 2017 09:54:05 -0500 [thread overview] Message-ID: <20170420145405.7s3iapxggr5575d2@rob-hp-laptop> (raw) In-Reply-To: <20170417192942.32219-9-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> On Mon, Apr 17, 2017 at 09:29:37PM +0200, Hauke Mehrtens wrote: > From: Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org> > > The reset controllers (on xRX200 and newer SoCs have two of them) are > provided by the RCU module. This was initially implemented as a simple > reset controller. However, the RCU module provides more functionality > (ethernet GPHYs, USB PHY, etc.), which makes it a MFD device. > The old reset controller driver implementation from > arch/mips/lantiq/xway/reset.c did not honor this fact. > > For some devices the request and the status bits are different. > > Signed-off-by: Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> > --- > .../devicetree/bindings/reset/lantiq,rcu-reset.txt | 43 ++++ > arch/mips/lantiq/xway/reset.c | 68 ------ > drivers/reset/Kconfig | 6 + > drivers/reset/Makefile | 1 + > drivers/reset/reset-lantiq-rcu.c | 231 +++++++++++++++++++++ > 5 files changed, 281 insertions(+), 68 deletions(-) > create mode 100644 Documentation/devicetree/bindings/reset/lantiq,rcu-reset.txt > create mode 100644 drivers/reset/reset-lantiq-rcu.c > > diff --git a/Documentation/devicetree/bindings/reset/lantiq,rcu-reset.txt b/Documentation/devicetree/bindings/reset/lantiq,rcu-reset.txt > new file mode 100644 > index 000000000000..7f097d16bbb7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/lantiq,rcu-reset.txt > @@ -0,0 +1,43 @@ > +Lantiq XWAY SoC RCU reset controller binding > +============================================ > + > +This binding describes a reset-controller found on the RCU module on Lantiq > +XWAY SoCs. > + > + > +------------------------------------------------------------------------------- > +Required properties (controller (parent) node): > +- compatible : Should be "lantiq,rcu-reset" > +- lantiq,rcu-syscon : A phandle to the RCU syscon, the reset register > + offset and the status register offset. > +- #reset-cells : Specifies the number of cells needed to encode the > + reset line, should be 1. > + > +Optional properties: > +- reset-status : The request status bit. For some bits the request bit > + and the status bit are different. This is depending > + on the SoC. If the reset-status bit does not match > + the reset-request bit, put the reset number into the > + reset-request property and the status bit at the same > + index into the reset-status property. If no > + reset-request bit is given here, the driver assume > + status and request bit are the same. > +- reset-request : The reset request bit, to map it to the reset-status > + bit. These should either be implied by SoC specific compatible or be made part of the reset cells. In the latter case, you still need the SoC specific compatible. > +------------------------------------------------------------------------------- > +Example for the reset-controllers on the xRX200 SoCs: > + rcu_reset0: rcu_reset { > + compatible = "lantiq,rcu-reset"; > + lantiq,rcu-syscon = <&rcu0 0x10 0x14>; > + #reset-cells = <1>; > + reset-request = <31>, <29>, <21>, <19>, <16>, <12>; > + reset-status = <30>, <28>, <16>, <25>, <5>, <24>; > + }; > + > + rcu_reset1: rcu_reset { > + compatible = "lantiq,rcu-reset"; These 2 blocks are identical? Given different registers sizes, I'd say not. So they should have different compatible strings. > + lantiq,rcu-syscon = <&rcu0 0x48 0x24>; > + #reset-cells = <1>; > + }; -- To unsubscribe from this list: send the line "unsubscribe linux-watchdog" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org> To: Hauke Mehrtens <hauke@hauke-m.de> Cc: ralf@linux-mips.org, linux-mips@linux-mips.org, linux-mtd@lists.infradead.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, martin.blumenstingl@googlemail.com, john@phrozen.org, linux-spi@vger.kernel.org, hauke.mehrtens@intel.com Subject: Re: [PATCH 08/13] reset: Add a reset controller driver for the Lantiq XWAY based SoCs Date: Thu, 20 Apr 2017 09:54:05 -0500 [thread overview] Message-ID: <20170420145405.7s3iapxggr5575d2@rob-hp-laptop> (raw) In-Reply-To: <20170417192942.32219-9-hauke@hauke-m.de> On Mon, Apr 17, 2017 at 09:29:37PM +0200, Hauke Mehrtens wrote: > From: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > > The reset controllers (on xRX200 and newer SoCs have two of them) are > provided by the RCU module. This was initially implemented as a simple > reset controller. However, the RCU module provides more functionality > (ethernet GPHYs, USB PHY, etc.), which makes it a MFD device. > The old reset controller driver implementation from > arch/mips/lantiq/xway/reset.c did not honor this fact. > > For some devices the request and the status bits are different. > > Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> > --- > .../devicetree/bindings/reset/lantiq,rcu-reset.txt | 43 ++++ > arch/mips/lantiq/xway/reset.c | 68 ------ > drivers/reset/Kconfig | 6 + > drivers/reset/Makefile | 1 + > drivers/reset/reset-lantiq-rcu.c | 231 +++++++++++++++++++++ > 5 files changed, 281 insertions(+), 68 deletions(-) > create mode 100644 Documentation/devicetree/bindings/reset/lantiq,rcu-reset.txt > create mode 100644 drivers/reset/reset-lantiq-rcu.c > > diff --git a/Documentation/devicetree/bindings/reset/lantiq,rcu-reset.txt b/Documentation/devicetree/bindings/reset/lantiq,rcu-reset.txt > new file mode 100644 > index 000000000000..7f097d16bbb7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/lantiq,rcu-reset.txt > @@ -0,0 +1,43 @@ > +Lantiq XWAY SoC RCU reset controller binding > +============================================ > + > +This binding describes a reset-controller found on the RCU module on Lantiq > +XWAY SoCs. > + > + > +------------------------------------------------------------------------------- > +Required properties (controller (parent) node): > +- compatible : Should be "lantiq,rcu-reset" > +- lantiq,rcu-syscon : A phandle to the RCU syscon, the reset register > + offset and the status register offset. > +- #reset-cells : Specifies the number of cells needed to encode the > + reset line, should be 1. > + > +Optional properties: > +- reset-status : The request status bit. For some bits the request bit > + and the status bit are different. This is depending > + on the SoC. If the reset-status bit does not match > + the reset-request bit, put the reset number into the > + reset-request property and the status bit at the same > + index into the reset-status property. If no > + reset-request bit is given here, the driver assume > + status and request bit are the same. > +- reset-request : The reset request bit, to map it to the reset-status > + bit. These should either be implied by SoC specific compatible or be made part of the reset cells. In the latter case, you still need the SoC specific compatible. > +------------------------------------------------------------------------------- > +Example for the reset-controllers on the xRX200 SoCs: > + rcu_reset0: rcu_reset { > + compatible = "lantiq,rcu-reset"; > + lantiq,rcu-syscon = <&rcu0 0x10 0x14>; > + #reset-cells = <1>; > + reset-request = <31>, <29>, <21>, <19>, <16>, <12>; > + reset-status = <30>, <28>, <16>, <25>, <5>, <24>; > + }; > + > + rcu_reset1: rcu_reset { > + compatible = "lantiq,rcu-reset"; These 2 blocks are identical? Given different registers sizes, I'd say not. So they should have different compatible strings. > + lantiq,rcu-syscon = <&rcu0 0x48 0x24>; > + #reset-cells = <1>; > + };
next prev parent reply other threads:[~2017-04-20 14:54 UTC|newest] Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-04-17 19:29 [PATCH 00/13] MIPS: lantiq: handle RCU register by separate drivers Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-1-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-17 19:29 ` [PATCH 01/13] MIPS: lantiq: Use of_platform_populate instead of __dt_register_buses Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens 2017-04-21 18:17 ` Martin Blumenstingl 2017-04-17 19:29 ` [PATCH 02/13] mtd: lantiq-flash: drop check of boot select Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-3-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-20 22:36 ` Brian Norris 2017-04-20 22:36 ` Brian Norris 2017-04-17 19:29 ` [PATCH 03/13] mtd: spi-falcon: " Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-4-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-09-01 10:47 ` Applied "spi: spi-falcon: drop check of boot select" to the spi tree Mark Brown 2017-09-01 10:47 ` Mark Brown 2017-09-01 10:47 ` Mark Brown 2017-09-01 10:47 ` Mark Brown 2017-09-01 10:47 ` Mark Brown 2017-09-01 14:23 ` Ralf Baechle 2017-09-01 14:23 ` Ralf Baechle [not found] ` <20170901142355.GB31297-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org> 2017-09-01 16:39 ` Mark Brown 2017-09-01 16:39 ` Mark Brown 2017-04-17 19:29 ` [PATCH 04/13] watchdog: lantiq: access boot cause register through regmap Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-5-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-23 15:48 ` [04/13] " Guenter Roeck 2017-04-23 15:48 ` Guenter Roeck 2017-04-17 19:29 ` [PATCH 05/13] MIPS: lantiq: Enable MFD_SYSCON to be able to use it for the RCU MFD Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens 2017-04-17 19:29 ` [PATCH 06/13] MIPS: lantiq: Convert the xbar driver to a platform_driver Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-7-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-20 14:48 ` Rob Herring 2017-04-20 14:48 ` Rob Herring 2017-04-25 6:56 ` Hauke Mehrtens 2017-04-25 6:56 ` Hauke Mehrtens [not found] ` <8742e3b3-4dc2-bc74-f607-00d96f74512c-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-25 16:57 ` Rob Herring 2017-04-25 16:57 ` Rob Herring 2017-04-21 18:28 ` Martin Blumenstingl 2017-04-21 18:28 ` Martin Blumenstingl 2017-04-17 19:29 ` [PATCH 07/13] MIPS: lantiq: remove ltq_reset_cause() and ltq_boot_select() Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-8-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-21 18:20 ` Martin Blumenstingl 2017-04-21 18:20 ` Martin Blumenstingl 2017-04-17 19:29 ` [PATCH 08/13] reset: Add a reset controller driver for the Lantiq XWAY based SoCs Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-9-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-17 21:18 ` Martin Blumenstingl 2017-04-17 21:18 ` Martin Blumenstingl 2017-04-20 14:54 ` Rob Herring [this message] 2017-04-20 14:54 ` Rob Herring 2017-04-25 7:00 ` Hauke Mehrtens 2017-04-25 7:00 ` Hauke Mehrtens [not found] ` <a9519140-a804-9888-3223-9a1446e25c52-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-25 17:01 ` Rob Herring 2017-04-25 17:01 ` Rob Herring 2017-04-17 19:29 ` [PATCH 09/13] MIPS: lantiq: Add a GPHY driver which uses the RCU syscon-mfd Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-10-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-20 15:27 ` Rob Herring 2017-04-20 15:27 ` Rob Herring 2017-04-25 7:05 ` Hauke Mehrtens 2017-04-25 7:05 ` Hauke Mehrtens 2017-04-17 19:29 ` [PATCH 10/13] MIPS: lantiq: remove old GPHY loader code Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens 2017-04-17 19:29 ` [PATCH 11/13] phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-12-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-17 21:23 ` Martin Blumenstingl 2017-04-17 21:23 ` Martin Blumenstingl [not found] ` <CAFBinCAB=vaDpzCoMFX8w9j0R04i6Zr4mbjDtteKsQ_LkKAaLg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2017-04-25 6:51 ` Hauke Mehrtens 2017-04-25 6:51 ` Hauke Mehrtens 2017-04-20 15:36 ` Rob Herring 2017-04-20 15:36 ` Rob Herring 2017-04-25 7:06 ` Hauke Mehrtens 2017-04-25 7:06 ` Hauke Mehrtens 2017-04-21 18:41 ` Martin Blumenstingl 2017-04-21 18:41 ` Martin Blumenstingl 2017-04-17 19:29 ` [PATCH 12/13] Documentation: DT: MIPS: lantiq: Add docs for the RCU bindings Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-13-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-20 15:42 ` Rob Herring 2017-04-20 15:42 ` Rob Herring 2017-04-17 19:29 ` [PATCH 13/13] MIPS: lantiq: Remove the arch/mips/lantiq/xway/reset.c implementation Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-14-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-17 21:28 ` Martin Blumenstingl 2017-04-17 21:28 ` Martin Blumenstingl 2017-04-17 21:14 ` [PATCH 00/13] MIPS: lantiq: handle RCU register by separate drivers Martin Blumenstingl 2017-04-17 21:14 ` Martin Blumenstingl
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20170420145405.7s3iapxggr5575d2@rob-hp-laptop \ --to=robh-dgejt+ai2ygdnm+yrofe0a@public.gmane.org \ --cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \ --cc=hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org \ --cc=hauke.mehrtens-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org \ --cc=john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org \ --cc=linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org \ --cc=linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \ --cc=linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \ --cc=linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \ --cc=martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org \ --cc=ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.