From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> To: Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> Cc: Ralf Baechle <ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org>, Linux-MIPS <linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org>, "linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" <linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>, LINUX-WATCHDOG <linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>, John Crispin <john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org>, "linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" <linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, hauke.mehrtens-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org Subject: Re: [PATCH 06/13] MIPS: lantiq: Convert the xbar driver to a platform_driver Date: Tue, 25 Apr 2017 11:57:58 -0500 [thread overview] Message-ID: <CAL_JsqLdtyc_w5CWW9YTN6+xnYVQemSbVEmjJbhH8kP_8a-wkA@mail.gmail.com> (raw) In-Reply-To: <8742e3b3-4dc2-bc74-f607-00d96f74512c-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> On Tue, Apr 25, 2017 at 1:56 AM, Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> wrote: > > > On 04/20/2017 04:48 PM, Rob Herring wrote: >> On Mon, Apr 17, 2017 at 09:29:35PM +0200, Hauke Mehrtens wrote: >>> From: Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org> >>> >>> This allows using the xbar driver on ARX300 based SoCs which require the >>> same xbar setup as the xRX200 chipsets because the xbar driver >>> initialization is not guarded by an xRX200 specific >>> of_machine_is_compatible condition anymore. Additionally the new driver >>> takes a syscon phandle to configure the XBAR endianness bits in RCU >>> (before this was done in arch/mips/lantiq/xway/reset.c and also >>> guarded by an xRX200 specific if-statement). >>> >>> Signed-off-by: Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> >>> --- >>> .../devicetree/bindings/mips/lantiq/xbar.txt | 22 +++++ >>> MAINTAINERS | 1 + >>> arch/mips/lantiq/xway/reset.c | 4 - >>> arch/mips/lantiq/xway/sysctrl.c | 41 --------- >>> drivers/soc/Makefile | 1 + >>> drivers/soc/lantiq/Makefile | 1 + >>> drivers/soc/lantiq/xbar.c | 100 +++++++++++++++++++++ >>> 7 files changed, 125 insertions(+), 45 deletions(-) >>> create mode 100644 Documentation/devicetree/bindings/mips/lantiq/xbar.txt >>> create mode 100644 drivers/soc/lantiq/Makefile >>> create mode 100644 drivers/soc/lantiq/xbar.c >>> >>> diff --git a/Documentation/devicetree/bindings/mips/lantiq/xbar.txt b/Documentation/devicetree/bindings/mips/lantiq/xbar.txt >>> new file mode 100644 >>> index 000000000000..86e53ff3b0d5 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/mips/lantiq/xbar.txt >>> @@ -0,0 +1,22 @@ >>> +Lantiq XWAY SoC XBAR binding >>> +============================ >>> + >>> + >>> +------------------------------------------------------------------------------- >>> +Required properties: >>> +- compatible : Should be "lantiq,xbar-xway" >> >> This compatible is already in use so it is fine, but you should also >> have per SoC compatible strings. > > I will add a new SoC specific one. > What does per SoC device tree mean? Does it mean for the same silicon, > for the same silicon revision, for the same fusing of a silicon or for > the same marketing name? Depends how specific you need to some extent. For fusing, packaging, metal fixes, speed grading, etc. probably use the same compatible. Different design and dies from the start, then they should have different compatibles. > I would like to make it per silicon or per silicon revision for the IP > cores which I know are different. Being "the same IP" doesn't really matter. The errata can be different and often there is no visibility into what h/w designers may have changed. On some IP you can rely on revision/feature registers though forgetting to rev revision registers is not uncommon. You need to have sufficient information that you can work-around a problem in the future without requiring a new dtb. Rob -- To unsubscribe from this list: send the line "unsubscribe linux-watchdog" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
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From: Rob Herring <robh@kernel.org> To: Hauke Mehrtens <hauke@hauke-m.de> Cc: Ralf Baechle <ralf@linux-mips.org>, Linux-MIPS <linux-mips@linux-mips.org>, "linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>, LINUX-WATCHDOG <linux-watchdog@vger.kernel.org>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, Martin Blumenstingl <martin.blumenstingl@googlemail.com>, John Crispin <john@phrozen.org>, "linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>, hauke.mehrtens@intel.com Subject: Re: [PATCH 06/13] MIPS: lantiq: Convert the xbar driver to a platform_driver Date: Tue, 25 Apr 2017 11:57:58 -0500 [thread overview] Message-ID: <CAL_JsqLdtyc_w5CWW9YTN6+xnYVQemSbVEmjJbhH8kP_8a-wkA@mail.gmail.com> (raw) In-Reply-To: <8742e3b3-4dc2-bc74-f607-00d96f74512c@hauke-m.de> On Tue, Apr 25, 2017 at 1:56 AM, Hauke Mehrtens <hauke@hauke-m.de> wrote: > > > On 04/20/2017 04:48 PM, Rob Herring wrote: >> On Mon, Apr 17, 2017 at 09:29:35PM +0200, Hauke Mehrtens wrote: >>> From: Martin Blumenstingl <martin.blumenstingl@googlemail.com> >>> >>> This allows using the xbar driver on ARX300 based SoCs which require the >>> same xbar setup as the xRX200 chipsets because the xbar driver >>> initialization is not guarded by an xRX200 specific >>> of_machine_is_compatible condition anymore. Additionally the new driver >>> takes a syscon phandle to configure the XBAR endianness bits in RCU >>> (before this was done in arch/mips/lantiq/xway/reset.c and also >>> guarded by an xRX200 specific if-statement). >>> >>> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> >>> --- >>> .../devicetree/bindings/mips/lantiq/xbar.txt | 22 +++++ >>> MAINTAINERS | 1 + >>> arch/mips/lantiq/xway/reset.c | 4 - >>> arch/mips/lantiq/xway/sysctrl.c | 41 --------- >>> drivers/soc/Makefile | 1 + >>> drivers/soc/lantiq/Makefile | 1 + >>> drivers/soc/lantiq/xbar.c | 100 +++++++++++++++++++++ >>> 7 files changed, 125 insertions(+), 45 deletions(-) >>> create mode 100644 Documentation/devicetree/bindings/mips/lantiq/xbar.txt >>> create mode 100644 drivers/soc/lantiq/Makefile >>> create mode 100644 drivers/soc/lantiq/xbar.c >>> >>> diff --git a/Documentation/devicetree/bindings/mips/lantiq/xbar.txt b/Documentation/devicetree/bindings/mips/lantiq/xbar.txt >>> new file mode 100644 >>> index 000000000000..86e53ff3b0d5 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/mips/lantiq/xbar.txt >>> @@ -0,0 +1,22 @@ >>> +Lantiq XWAY SoC XBAR binding >>> +============================ >>> + >>> + >>> +------------------------------------------------------------------------------- >>> +Required properties: >>> +- compatible : Should be "lantiq,xbar-xway" >> >> This compatible is already in use so it is fine, but you should also >> have per SoC compatible strings. > > I will add a new SoC specific one. > What does per SoC device tree mean? Does it mean for the same silicon, > for the same silicon revision, for the same fusing of a silicon or for > the same marketing name? Depends how specific you need to some extent. For fusing, packaging, metal fixes, speed grading, etc. probably use the same compatible. Different design and dies from the start, then they should have different compatibles. > I would like to make it per silicon or per silicon revision for the IP > cores which I know are different. Being "the same IP" doesn't really matter. The errata can be different and often there is no visibility into what h/w designers may have changed. On some IP you can rely on revision/feature registers though forgetting to rev revision registers is not uncommon. You need to have sufficient information that you can work-around a problem in the future without requiring a new dtb. Rob
next prev parent reply other threads:[~2017-04-25 16:57 UTC|newest] Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-04-17 19:29 [PATCH 00/13] MIPS: lantiq: handle RCU register by separate drivers Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-1-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-17 19:29 ` [PATCH 01/13] MIPS: lantiq: Use of_platform_populate instead of __dt_register_buses Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens 2017-04-21 18:17 ` Martin Blumenstingl 2017-04-17 19:29 ` [PATCH 02/13] mtd: lantiq-flash: drop check of boot select Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-3-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-20 22:36 ` Brian Norris 2017-04-20 22:36 ` Brian Norris 2017-04-17 19:29 ` [PATCH 03/13] mtd: spi-falcon: " Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-4-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-09-01 10:47 ` Applied "spi: spi-falcon: drop check of boot select" to the spi tree Mark Brown 2017-09-01 10:47 ` Mark Brown 2017-09-01 10:47 ` Mark Brown 2017-09-01 10:47 ` Mark Brown 2017-09-01 10:47 ` Mark Brown 2017-09-01 14:23 ` Ralf Baechle 2017-09-01 14:23 ` Ralf Baechle [not found] ` <20170901142355.GB31297-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org> 2017-09-01 16:39 ` Mark Brown 2017-09-01 16:39 ` Mark Brown 2017-04-17 19:29 ` [PATCH 04/13] watchdog: lantiq: access boot cause register through regmap Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-5-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-23 15:48 ` [04/13] " Guenter Roeck 2017-04-23 15:48 ` Guenter Roeck 2017-04-17 19:29 ` [PATCH 05/13] MIPS: lantiq: Enable MFD_SYSCON to be able to use it for the RCU MFD Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens 2017-04-17 19:29 ` [PATCH 06/13] MIPS: lantiq: Convert the xbar driver to a platform_driver Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-7-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-20 14:48 ` Rob Herring 2017-04-20 14:48 ` Rob Herring 2017-04-25 6:56 ` Hauke Mehrtens 2017-04-25 6:56 ` Hauke Mehrtens [not found] ` <8742e3b3-4dc2-bc74-f607-00d96f74512c-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-25 16:57 ` Rob Herring [this message] 2017-04-25 16:57 ` Rob Herring 2017-04-21 18:28 ` Martin Blumenstingl 2017-04-21 18:28 ` Martin Blumenstingl 2017-04-17 19:29 ` [PATCH 07/13] MIPS: lantiq: remove ltq_reset_cause() and ltq_boot_select() Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-8-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-21 18:20 ` Martin Blumenstingl 2017-04-21 18:20 ` Martin Blumenstingl 2017-04-17 19:29 ` [PATCH 08/13] reset: Add a reset controller driver for the Lantiq XWAY based SoCs Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-9-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-17 21:18 ` Martin Blumenstingl 2017-04-17 21:18 ` Martin Blumenstingl 2017-04-20 14:54 ` Rob Herring 2017-04-20 14:54 ` Rob Herring 2017-04-25 7:00 ` Hauke Mehrtens 2017-04-25 7:00 ` Hauke Mehrtens [not found] ` <a9519140-a804-9888-3223-9a1446e25c52-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-25 17:01 ` Rob Herring 2017-04-25 17:01 ` Rob Herring 2017-04-17 19:29 ` [PATCH 09/13] MIPS: lantiq: Add a GPHY driver which uses the RCU syscon-mfd Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-10-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-20 15:27 ` Rob Herring 2017-04-20 15:27 ` Rob Herring 2017-04-25 7:05 ` Hauke Mehrtens 2017-04-25 7:05 ` Hauke Mehrtens 2017-04-17 19:29 ` [PATCH 10/13] MIPS: lantiq: remove old GPHY loader code Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens 2017-04-17 19:29 ` [PATCH 11/13] phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-12-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-17 21:23 ` Martin Blumenstingl 2017-04-17 21:23 ` Martin Blumenstingl [not found] ` <CAFBinCAB=vaDpzCoMFX8w9j0R04i6Zr4mbjDtteKsQ_LkKAaLg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2017-04-25 6:51 ` Hauke Mehrtens 2017-04-25 6:51 ` Hauke Mehrtens 2017-04-20 15:36 ` Rob Herring 2017-04-20 15:36 ` Rob Herring 2017-04-25 7:06 ` Hauke Mehrtens 2017-04-25 7:06 ` Hauke Mehrtens 2017-04-21 18:41 ` Martin Blumenstingl 2017-04-21 18:41 ` Martin Blumenstingl 2017-04-17 19:29 ` [PATCH 12/13] Documentation: DT: MIPS: lantiq: Add docs for the RCU bindings Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-13-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-20 15:42 ` Rob Herring 2017-04-20 15:42 ` Rob Herring 2017-04-17 19:29 ` [PATCH 13/13] MIPS: lantiq: Remove the arch/mips/lantiq/xway/reset.c implementation Hauke Mehrtens 2017-04-17 19:29 ` Hauke Mehrtens [not found] ` <20170417192942.32219-14-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-04-17 21:28 ` Martin Blumenstingl 2017-04-17 21:28 ` Martin Blumenstingl 2017-04-17 21:14 ` [PATCH 00/13] MIPS: lantiq: handle RCU register by separate drivers Martin Blumenstingl 2017-04-17 21:14 ` Martin Blumenstingl
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