All of lore.kernel.org
 help / color / mirror / Atom feed
From: Baruch Siach <baruch@tkos.co.il>
To: Yong <yong.deng@magewell.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>, Chen-Yu Tsai <wens@csie.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"David S. Miller" <davem@davemloft.net>,
	Hans Verkuil <hverkuil@xs4all.nl>, Arnd Bergmann <arnd@arndb.de>,
	Hugues Fruchet <hugues.fruchet@st.com>,
	Yannick Fertre <yannick.fertre@st.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Benoit Parrot <bparrot@ti.com>,
	Benjamin Gaignard <benjamin.gaignard@linaro.org>,
	Jean-Christophe Trotin <jean-christophe.trotin@st.com>,
	Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>,
	Minghsiu Tsai <minghsiu.tsai@mediatek.com>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Robert Jarzmik <robert.jarzmik@free.fr>,
	linux-media@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/3] media: V3s: Add support for Allwinner CSI.
Date: Mon, 31 Jul 2017 08:13:10 +0300	[thread overview]
Message-ID: <20170731051310.jp45cj7lugcueztc@tarshish> (raw)
In-Reply-To: <20170731094806.88c3188576d7e2c14b5e3e33@magewell.com>

Hi Yong,

On Mon, Jul 31, 2017 at 09:48:06AM +0800, Yong wrote:
> On Sun, 30 Jul 2017 09:08:01 +0300
> Baruch Siach <baruch@tkos.co.il> wrote:
> > On Fri, Jul 28, 2017 at 06:02:33PM +0200, Maxime Ripard wrote:
> > > On Thu, Jul 27, 2017 at 01:01:35PM +0800, Yong Deng wrote:
> > > > +	regmap_write(sdev->regmap, CSI_CH_F0_BUFA_REG,
> > > > +		     (bus_addr + sdev->planar_offset[0]) >> 2);
> > 
> > Why do you need the bit shift? Does that work for you?
> > 
> > The User Manuals of both the V3s and the and the A33 (AKA R16) state that the 
> > BUFA field size in this register is 31:00, that is 32bit. I have found no 
> > indication of this bit shift in the Olimex provided sunxi-vfe[1] driver. On 
> > the A33 I have found that only after removing the bit-shift, (some sort of) 
> > data started to appear in the buffer.
> > 
> > [1] https://github.com/hehopmajieh/a33_linux/tree/master/drivers/media/video/sunxi-vfe
> 
> The Users Manuals do not document this bit shift. You should see line 10 to
> 32 in https://github.com/hehopmajieh/a33_linux/blob/master/drivers/media/video/sunxi-vfe/csi/csi_reg.c

Thanks. So for my reference, the SoCs that don't need bit shift are A31, A23, 
and A33. SoCs that need bit shift are A80, A83, H3, and V3s (AKA V30).

baruch

-- 
     http://baruch.siach.name/blog/                  ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -

WARNING: multiple messages have this Message-ID (diff)
From: Baruch Siach <baruch@tkos.co.il>
To: Yong <yong.deng@magewell.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>, Chen-Yu Tsai <wens@csie.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"David S. Miller" <davem@davemloft.net>,
	Hans Verkuil <hverkuil@xs4all.nl>, Arnd Bergmann <arnd@arndb.de>,
	Hugues Fruchet <hugues.fruchet@st.com>,
	Yannick Fertre <yannick.fertre@st.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Benoit Parrot <bparrot@ti.com>,
	Benjamin Gaignard <benjamin.gaignard@linaro.org>,
	Jean-Christophe Trotin <jean-christophe.trotin@st.com>,
	Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>,
	Minghsiu Tsai <minghsiu.tsai@mediatek.com>,
	Krzysztof Kozlowski <krzk@kernel.org>
Subject: Re: [PATCH v2 1/3] media: V3s: Add support for Allwinner CSI.
Date: Mon, 31 Jul 2017 08:13:10 +0300	[thread overview]
Message-ID: <20170731051310.jp45cj7lugcueztc@tarshish> (raw)
In-Reply-To: <20170731094806.88c3188576d7e2c14b5e3e33@magewell.com>

Hi Yong,

On Mon, Jul 31, 2017 at 09:48:06AM +0800, Yong wrote:
> On Sun, 30 Jul 2017 09:08:01 +0300
> Baruch Siach <baruch@tkos.co.il> wrote:
> > On Fri, Jul 28, 2017 at 06:02:33PM +0200, Maxime Ripard wrote:
> > > On Thu, Jul 27, 2017 at 01:01:35PM +0800, Yong Deng wrote:
> > > > +	regmap_write(sdev->regmap, CSI_CH_F0_BUFA_REG,
> > > > +		     (bus_addr + sdev->planar_offset[0]) >> 2);
> > 
> > Why do you need the bit shift? Does that work for you?
> > 
> > The User Manuals of both the V3s and the and the A33 (AKA R16) state that the 
> > BUFA field size in this register is 31:00, that is 32bit. I have found no 
> > indication of this bit shift in the Olimex provided sunxi-vfe[1] driver. On 
> > the A33 I have found that only after removing the bit-shift, (some sort of) 
> > data started to appear in the buffer.
> > 
> > [1] https://github.com/hehopmajieh/a33_linux/tree/master/drivers/media/video/sunxi-vfe
> 
> The Users Manuals do not document this bit shift. You should see line 10 to
> 32 in https://github.com/hehopmajieh/a33_linux/blob/master/drivers/media/video/sunxi-vfe/csi/csi_reg.c

Thanks. So for my reference, the SoCs that don't need bit shift are A31, A23, 
and A33. SoCs that need bit shift are A80, A83, H3, and V3s (AKA V30).

baruch

-- 
     http://baruch.siach.name/blog/                  ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -

WARNING: multiple messages have this Message-ID (diff)
From: baruch@tkos.co.il (Baruch Siach)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/3] media: V3s: Add support for Allwinner CSI.
Date: Mon, 31 Jul 2017 08:13:10 +0300	[thread overview]
Message-ID: <20170731051310.jp45cj7lugcueztc@tarshish> (raw)
In-Reply-To: <20170731094806.88c3188576d7e2c14b5e3e33@magewell.com>

Hi Yong,

On Mon, Jul 31, 2017 at 09:48:06AM +0800, Yong wrote:
> On Sun, 30 Jul 2017 09:08:01 +0300
> Baruch Siach <baruch@tkos.co.il> wrote:
> > On Fri, Jul 28, 2017 at 06:02:33PM +0200, Maxime Ripard wrote:
> > > On Thu, Jul 27, 2017 at 01:01:35PM +0800, Yong Deng wrote:
> > > > +	regmap_write(sdev->regmap, CSI_CH_F0_BUFA_REG,
> > > > +		     (bus_addr + sdev->planar_offset[0]) >> 2);
> > 
> > Why do you need the bit shift? Does that work for you?
> > 
> > The User Manuals of both the V3s and the and the A33 (AKA R16) state that the 
> > BUFA field size in this register is 31:00, that is 32bit. I have found no 
> > indication of this bit shift in the Olimex provided sunxi-vfe[1] driver. On 
> > the A33 I have found that only after removing the bit-shift, (some sort of) 
> > data started to appear in the buffer.
> > 
> > [1] https://github.com/hehopmajieh/a33_linux/tree/master/drivers/media/video/sunxi-vfe
> 
> The Users Manuals do not document this bit shift. You should see line 10 to
> 32 in https://github.com/hehopmajieh/a33_linux/blob/master/drivers/media/video/sunxi-vfe/csi/csi_reg.c

Thanks. So for my reference, the SoCs that don't need bit shift are A31, A23, 
and A33. SoCs that need bit shift are A80, A83, H3, and V3s (AKA V30).

baruch

-- 
     http://baruch.siach.name/blog/                  ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -

  reply	other threads:[~2017-07-31  5:13 UTC|newest]

Thread overview: 159+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-27  5:01 [PATCH v2 0/3] Initial Allwinner V3s CSI Support Yong Deng
2017-07-27  5:01 ` Yong Deng
2017-07-27  5:01 ` Yong Deng
2017-07-27  5:01 ` [PATCH v2 1/3] media: V3s: Add support for Allwinner CSI Yong Deng
2017-07-27  5:01   ` Yong Deng
2017-07-27  5:01   ` Yong Deng
2017-07-27 12:16   ` Baruch Siach
2017-07-27 12:16     ` Baruch Siach
2017-07-27 12:16     ` Baruch Siach
2017-07-27 12:25     ` Maxime Ripard
2017-07-27 12:25       ` Maxime Ripard
2017-07-27 12:25       ` Maxime Ripard
2017-07-31  0:47       ` Yong
2017-07-31  0:47         ` Yong
2017-07-31  0:47         ` Yong
2017-07-28 16:02   ` Maxime Ripard
2017-07-28 16:02     ` Maxime Ripard
2017-07-28 16:02     ` Maxime Ripard
2017-07-30  6:08     ` Baruch Siach
2017-07-30  6:08       ` Baruch Siach
2017-07-30  6:08       ` Baruch Siach
2017-07-31  1:48       ` Yong
2017-07-31  1:48         ` Yong
2017-07-31  1:48         ` Yong
2017-07-31  5:13         ` Baruch Siach [this message]
2017-07-31  5:13           ` Baruch Siach
2017-07-31  5:13           ` Baruch Siach
2017-08-21 20:21       ` Maxime Ripard
2017-08-21 20:21         ` Maxime Ripard
2017-08-21 20:21         ` Maxime Ripard
2017-08-23  2:41         ` Yong
2017-08-23  2:41           ` Yong
2017-08-23  2:41           ` Yong
2017-08-23 19:24           ` Maxime Ripard
2017-08-23 19:24             ` Maxime Ripard
2017-08-23 19:24             ` Maxime Ripard
2017-08-24  1:43             ` Yong
2017-08-24  1:43               ` Yong
2017-08-24  1:43               ` Yong
2017-07-31  3:16     ` Yong
2017-07-31  3:16       ` Yong
2017-07-31  3:16       ` Yong
2017-08-22 17:43       ` Maxime Ripard
2017-08-22 17:43         ` Maxime Ripard
2017-08-22 17:43         ` Maxime Ripard
2017-08-23  2:32         ` Yong
2017-08-23  2:32           ` Yong
2017-08-23  2:32           ` Yong
2017-08-25 13:41           ` Maxime Ripard
2017-08-25 13:41             ` Maxime Ripard
2017-08-25 13:41             ` Maxime Ripard
2017-08-28  7:00             ` Yong
2017-08-28  7:00               ` Yong
2017-08-28  7:00               ` Yong
2017-08-21 14:37   ` Hans Verkuil
2017-08-21 14:37     ` Hans Verkuil
2017-08-21 14:37     ` Hans Verkuil
2017-08-22  3:01     ` Yong
2017-08-22  3:01       ` Yong
2017-08-22  3:01       ` Yong
2017-08-22  6:43       ` Hans Verkuil
2017-08-22  6:43         ` Hans Verkuil
2017-08-22  6:43         ` Hans Verkuil
2017-08-22  7:51         ` Yong
2017-08-22  7:51           ` Yong
2017-08-22  7:51           ` Yong
2017-08-22 20:17         ` Maxime Ripard
2017-08-22 20:17           ` Maxime Ripard
2017-08-22 20:17           ` Maxime Ripard
2017-08-22 20:52           ` Laurent Pinchart
2017-08-22 20:52             ` Laurent Pinchart
2017-08-22 20:52             ` Laurent Pinchart
2017-08-23  6:52           ` Hans Verkuil
2017-08-23  6:52             ` Hans Verkuil
2017-08-23  6:52             ` Hans Verkuil
2017-08-23  7:43             ` Laurent Pinchart
2017-08-23  7:43               ` Laurent Pinchart
2017-08-23  7:43               ` Laurent Pinchart
2017-08-23 11:13               ` icenowy
2017-08-23 11:13                 ` icenowy at aosc.io
2017-08-23 11:13                 ` icenowy
2017-09-21 13:45   ` [linux-sunxi] " Ondřej Jirman
2017-09-21 13:45     ` Ondřej Jirman
2017-09-21 13:45     ` 'Ondřej Jirman' via linux-sunxi
2017-09-22  0:57   ` 回复:[linux-sunxi] " 邓永
2017-09-22  8:44   ` Mylene JOSSERAND
2017-09-22  8:44     ` Mylene JOSSERAND
2017-09-22  8:44     ` Mylene JOSSERAND
2017-09-22  9:08     ` Yong
2017-09-22  9:08       ` Yong
2017-09-22  9:08       ` Yong
2017-11-21 15:48   ` Maxime Ripard
2017-11-21 15:48     ` Maxime Ripard
2017-11-21 15:48     ` Maxime Ripard
2017-11-22  1:33     ` Yong
2017-11-22  1:33       ` Yong
2017-11-22  1:33       ` Yong
2017-11-22  9:45       ` Maxime Ripard
2017-11-22  9:45         ` Maxime Ripard
2017-11-22  9:45         ` Maxime Ripard
2017-11-23  1:14         ` Yong
2017-11-23  1:14           ` Yong
2017-11-23  1:14           ` Yong
2017-11-25 16:02           ` Maxime Ripard
2017-11-25 16:02             ` Maxime Ripard
2017-11-25 16:02             ` Maxime Ripard
2017-12-04  9:45             ` Yong
2017-12-04  9:45               ` Yong
2017-12-04  9:45               ` Yong
2017-12-15 10:50               ` Maxime Ripard
2017-12-15 10:50                 ` Maxime Ripard
2017-12-15 10:50                 ` Maxime Ripard
2017-12-15 11:01                 ` Yong
2017-12-15 11:01                   ` Yong
2017-12-15 11:01                   ` Yong
2017-12-15 22:14                   ` Maxime Ripard
2017-12-15 22:14                     ` Maxime Ripard
2017-12-15 22:14                     ` Maxime Ripard
2017-07-27  5:01 ` [PATCH v2 2/3] dt-bindings: media: Add Allwinner V3s Camera Sensor Interface (CSI) Yong Deng
2017-07-27  5:01   ` Yong Deng
2017-07-27  5:01   ` Yong Deng
2017-07-28 16:03   ` Maxime Ripard
2017-07-28 16:03     ` Maxime Ripard
2017-07-28 16:03     ` Maxime Ripard
2017-07-31  0:50     ` Yong
2017-07-31  0:50       ` Yong
2017-07-31  0:50       ` Yong
2017-08-03 19:14   ` Rob Herring
2017-08-03 19:14     ` Rob Herring
2017-08-03 19:14     ` Rob Herring
2017-08-07  1:00     ` Yong
2017-08-07  1:00       ` Yong
2017-08-07  1:00       ` Yong
2017-12-19 11:53   ` Sakari Ailus
2017-12-19 11:53     ` Sakari Ailus
2017-12-19 11:53     ` Sakari Ailus
2017-12-21  2:49     ` Yong
2017-12-21  2:49       ` Yong
2017-12-21  2:49       ` Yong
2017-12-27 21:47       ` Sakari Ailus
2017-12-27 21:47         ` Sakari Ailus
2017-12-27 21:47         ` Sakari Ailus
2017-12-28  1:04         ` Yong
2017-12-28  1:04           ` Yong
2017-12-28  1:04           ` Yong
2017-07-27  5:01 ` [PATCH v2 3/3] media: MAINTAINERS: add entries for Allwinner V3s CSI Yong Deng
2017-07-27  5:01   ` Yong Deng
2017-07-27  5:01   ` Yong Deng
2017-12-19 11:48   ` Sakari Ailus
2017-12-19 11:48     ` Sakari Ailus
2017-12-19 11:48     ` Sakari Ailus
2017-12-21  2:40     ` Yong
2017-12-21  2:40       ` Yong
2017-12-21  2:40       ` Yong
  -- strict thread matches above, loose matches on Subject: below --
2017-07-27  3:51 [PATCH v2 0/3] Initial Allwinner V3s CSI Support Yong Deng
2017-07-27  3:51 ` [PATCH v2 1/3] media: V3s: Add support for Allwinner CSI Yong Deng
2017-07-27  3:51   ` Yong Deng
2017-07-27  3:51 ` Yong Deng
     [not found] ` <1501127474-40895-1-git-send-email-yong.deng-+3dxTMOEIRNWk0Htik3J/w@public.gmane.org>
2017-07-27  3:51   ` Yong Deng
2017-07-27  3:51   ` Yong Deng

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20170731051310.jp45cj7lugcueztc@tarshish \
    --to=baruch@tkos.co.il \
    --cc=arnd@arndb.de \
    --cc=benjamin.gaignard@linaro.org \
    --cc=bparrot@ti.com \
    --cc=davem@davemloft.net \
    --cc=devicetree@vger.kernel.org \
    --cc=gregkh@linuxfoundation.org \
    --cc=hugues.fruchet@st.com \
    --cc=hverkuil@xs4all.nl \
    --cc=jean-christophe.trotin@st.com \
    --cc=krzk@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-media@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=maxime.ripard@free-electrons.com \
    --cc=mchehab@kernel.org \
    --cc=minghsiu.tsai@mediatek.com \
    --cc=p.zabel@pengutronix.de \
    --cc=ramesh.shanmugasundaram@bp.renesas.com \
    --cc=robert.jarzmik@free.fr \
    --cc=robh+dt@kernel.org \
    --cc=wens@csie.org \
    --cc=yannick.fertre@st.com \
    --cc=yong.deng@magewell.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.