All of lore.kernel.org
 help / color / mirror / Atom feed
From: Mark Brown <broonie@kernel.org>
To: Jon Hunter <jonathanh@nvidia.com>
Cc: linux-kernel@lists.codethink.co.uk, alsa-devel@alsa-project.org,
	lgirdwood@gmail.com, linux-kernel@vger.kernel.org,
	Jorge Sanjuan <jorge.sanjuan@codethink.co.uk>,
	thierry.reding@gmail.com, linux-tegra@vger.kernel.org
Subject: Re: [PATCH 2/4] ASoC: tegra: Add a TDM configuration callback
Date: Mon, 30 Jul 2018 11:18:00 +0100	[thread overview]
Message-ID: <20180730101800.GF5789@sirena.org.uk> (raw)
In-Reply-To: <2392df6f-12bc-74fe-ec0f-50dbb7b9a33a@nvidia.com>


[-- Attachment #1.1: Type: text/plain, Size: 442 bytes --]

On Mon, Jul 30, 2018 at 10:31:16AM +0100, Jon Hunter wrote:

> It can be quite common for the fsync-width for DSP modes to be a single clock and so 
> I am not sure that is makes sense to set this here always to the slot width. It maybe
> worth considering add a DT property for specifying the fsync width.

DSP modes only care about the rising edge of the LRCLK, the pulse can be
any width without causing interoperability problems.

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

[-- Attachment #2: Type: text/plain, Size: 0 bytes --]



WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Jon Hunter <jonathanh@nvidia.com>
Cc: Jorge Sanjuan <jorge.sanjuan@codethink.co.uk>,
	lgirdwood@gmail.com, thierry.reding@gmail.com,
	alsa-devel@alsa-project.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-kernel@lists.codethink.co.uk
Subject: Re: [PATCH 2/4] ASoC: tegra: Add a TDM configuration callback
Date: Mon, 30 Jul 2018 11:18:00 +0100	[thread overview]
Message-ID: <20180730101800.GF5789@sirena.org.uk> (raw)
In-Reply-To: <2392df6f-12bc-74fe-ec0f-50dbb7b9a33a@nvidia.com>

[-- Attachment #1: Type: text/plain, Size: 442 bytes --]

On Mon, Jul 30, 2018 at 10:31:16AM +0100, Jon Hunter wrote:

> It can be quite common for the fsync-width for DSP modes to be a single clock and so 
> I am not sure that is makes sense to set this here always to the slot width. It maybe
> worth considering add a DT property for specifying the fsync width.

DSP modes only care about the rising edge of the LRCLK, the pulse can be
any width without causing interoperability problems.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

  reply	other threads:[~2018-07-30 10:18 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-27 12:59 [PATCH 0/4] ASoC: Tegra30 TDM support Jorge Sanjuan
2018-07-27 12:59 ` Jorge Sanjuan
2018-07-27 12:59 ` [PATCH 1/4] ASoC: tegra: i2s: Fix typo/broken macro Jorge Sanjuan
2018-07-27 12:59   ` Jorge Sanjuan
2018-07-30  8:58   ` Jon Hunter
2018-07-30  8:58     ` Jon Hunter
2018-07-30 11:04   ` Applied "ASoC: tegra: i2s: Fix typo/broken macro" to the asoc tree Mark Brown
2018-07-30 11:04     ` Mark Brown
2018-07-30 11:04     ` Mark Brown
2018-07-27 12:59 ` [PATCH 2/4] ASoC: tegra: Add a TDM configuration callback Jorge Sanjuan
2018-07-30  8:49   ` Mark Brown
2018-07-30  8:49     ` Mark Brown
2018-07-30  9:04     ` Ben Dooks
2018-07-30  9:04       ` [alsa-devel] " Ben Dooks
2018-07-30  9:31   ` Jon Hunter
2018-07-30  9:31     ` Jon Hunter
2018-07-30 10:18     ` Mark Brown [this message]
2018-07-30 10:18       ` Mark Brown
2018-07-30 14:04       ` Jon Hunter
2018-07-30 14:04         ` Jon Hunter
2018-07-30 14:15         ` Jon Hunter
2018-07-30 14:15           ` Jon Hunter
2018-07-30 15:07         ` Mark Brown
2018-07-30 15:07           ` Mark Brown
2018-07-30 17:39           ` [Linux-kernel] " Ben Dooks
2018-07-30 17:39             ` Ben Dooks
2018-07-27 12:59 ` [PATCH 3/4] ASoC: tegra: Allow 32-bit and 24-bit samples Jorge Sanjuan
2018-07-27 12:59   ` Jorge Sanjuan
2018-07-28 22:28   ` kbuild test robot
2018-07-28 22:28     ` kbuild test robot
2018-07-29  9:21     ` Ben Dooks
2018-07-29  9:21       ` [Linux-kernel] " Ben Dooks
2018-07-27 12:59 ` [PATCH 4/4] ASoC: tegra: i2s: Add support for more than 2 channels Jorge Sanjuan
2018-07-30  9:46   ` Jon Hunter
2018-07-30  9:46     ` Jon Hunter
2018-07-30 10:21     ` Mark Brown
2018-07-30 17:22 ` [PATCH 0/4] ASoC: Tegra30 TDM support Ben Dooks
2018-07-30 17:22   ` [Linux-kernel] " Ben Dooks

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180730101800.GF5789@sirena.org.uk \
    --to=broonie@kernel.org \
    --cc=alsa-devel@alsa-project.org \
    --cc=jonathanh@nvidia.com \
    --cc=jorge.sanjuan@codethink.co.uk \
    --cc=lgirdwood@gmail.com \
    --cc=linux-kernel@lists.codethink.co.uk \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=thierry.reding@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.