From: Patchwork <patchwork@emeril.freedesktop.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/execlists: Delay updating ring register state after resume
Date: Fri, 14 Sep 2018 13:10:05 -0000 [thread overview]
Message-ID: <20180914131005.3983.16510@emeril.freedesktop.org> (raw)
In-Reply-To: <20180914123504.2062-1-chris@chris-wilson.co.uk>
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/execlists: Delay updating ring register state after resume
URL : https://patchwork.freedesktop.org/series/49708/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4825 -> Patchwork_10191 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/49708/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_10191 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_selftest@mock_hugepages:
fi-bwr-2160: PASS -> DMESG-FAIL (fdo#107930)
igt@gem_exec_suspend@basic-s4-devices:
fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718)
igt@kms_flip@basic-flip-vs-dpms:
fi-hsw-4770r: NOTRUN -> DMESG-WARN (fdo#105602)
==== Possible fixes ====
igt@kms_frontbuffer_tracking@basic:
fi-byt-clapper: FAIL (fdo#103167) -> PASS
igt@kms_pipe_crc_basic@hang-read-crc-pipe-b:
fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-a:
fi-byt-clapper: FAIL (fdo#107362) -> PASS
igt@kms_psr@primary_page_flip:
fi-kbl-7560u: FAIL (fdo#107336) -> PASS
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
fdo#107336 https://bugs.freedesktop.org/show_bug.cgi?id=107336
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#107930 https://bugs.freedesktop.org/show_bug.cgi?id=107930
== Participating hosts (47 -> 44) ==
Additional (1): fi-hsw-4770r
Missing (4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4825 -> Patchwork_10191
CI_DRM_4825: b42528aaa961c0d469f381b4a5c3830fe46aedfa @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4641: 468febc4c746f168e885e0d662ec3adb0cca60f6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10191: 0f2c3ffc89225b32aec71f6e08c900250f9c20ab @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
0f2c3ffc8922 drm/i915/execlists: Use coherent writes into the context image
f7a4c35b3737 drm/i915: Check engine->default_state mapping on module load
f703b75505a7 drm/i915/execlists: Delay updating ring register state after resume
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10191/issues.html
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next prev parent reply other threads:[~2018-09-14 13:10 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-14 12:35 [CI 1/3] drm/i915/execlists: Delay updating ring register state after resume Chris Wilson
2018-09-14 12:35 ` [CI 2/3] drm/i915: Check engine->default_state mapping on module load Chris Wilson
2018-09-14 12:35 ` [CI 3/3] drm/i915/execlists: Use coherent writes into the context image Chris Wilson
2018-09-14 12:51 ` ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/3] drm/i915/execlists: Delay updating ring register state after resume Patchwork
2018-09-14 13:10 ` Patchwork [this message]
2018-09-14 15:53 ` ✓ Fi.CI.IGT: success " Patchwork
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