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From: Patchwork <patchwork@emeril.freedesktop.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✓ Fi.CI.IGT: success for series starting with [CI,1/3] drm/i915/execlists: Delay updating ring register state after resume
Date: Fri, 14 Sep 2018 15:53:16 -0000	[thread overview]
Message-ID: <20180914155316.3984.798@emeril.freedesktop.org> (raw)
In-Reply-To: <20180914123504.2062-1-chris@chris-wilson.co.uk>

== Series Details ==

Series: series starting with [CI,1/3] drm/i915/execlists: Delay updating ring register state after resume
URL   : https://patchwork.freedesktop.org/series/49708/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4825_full -> Patchwork_10191_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_10191_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10191_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_10191_full:

  === IGT changes ===

    ==== Warnings ====

    igt@kms_atomic_interruptible@legacy-pageflip:
      shard-snb:          SKIP -> PASS +1

    
== Known issues ==

  Here are the changes found in Patchwork_10191_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_cursor_legacy@cursora-vs-flipa-toggle:
      shard-glk:          PASS -> DMESG-WARN (fdo#106538, fdo#105763)

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-apl:          PASS -> DMESG-WARN (fdo#105602, fdo#103558) +2
      shard-glk:          PASS -> FAIL (fdo#105363)

    igt@kms_setmode@basic:
      shard-kbl:          PASS -> FAIL (fdo#99912)

    igt@perf@polling:
      shard-hsw:          PASS -> FAIL (fdo#102252)

    
    ==== Possible fixes ====

    igt@kms_cursor_crc@cursor-256x256-suspend:
      shard-glk:          INCOMPLETE (fdo#103359, k.org#198133) -> PASS

    igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
      shard-kbl:          INCOMPLETE (fdo#103665) -> PASS

    
  fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
  fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
  fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
  fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763
  fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
  k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4825 -> Patchwork_10191

  CI_DRM_4825: b42528aaa961c0d469f381b4a5c3830fe46aedfa @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4641: 468febc4c746f168e885e0d662ec3adb0cca60f6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10191: 0f2c3ffc89225b32aec71f6e08c900250f9c20ab @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10191/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

      parent reply	other threads:[~2018-09-14 15:53 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-14 12:35 [CI 1/3] drm/i915/execlists: Delay updating ring register state after resume Chris Wilson
2018-09-14 12:35 ` [CI 2/3] drm/i915: Check engine->default_state mapping on module load Chris Wilson
2018-09-14 12:35 ` [CI 3/3] drm/i915/execlists: Use coherent writes into the context image Chris Wilson
2018-09-14 12:51 ` ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/3] drm/i915/execlists: Delay updating ring register state after resume Patchwork
2018-09-14 13:10 ` ✓ Fi.CI.BAT: success " Patchwork
2018-09-14 15:53 ` Patchwork [this message]

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