From: Jernej Skrabec <jernej.skrabec@siol.net>
To: maxime.ripard@bootlin.com, wens@csie.org
Cc: robh+dt@kernel.org, sboyd@kernel.org, airlied@linux.ie,
architt@codeaurora.org, a.hajda@samsung.com,
Laurent.pinchart@ideasonboard.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com
Subject: [PATCH v2 16/29] drm/sun4i: Not all DW HDMI controllers has scrambled addresses
Date: Sun, 7 Oct 2018 11:38:52 +0200 [thread overview]
Message-ID: <20181007093905.11253-17-jernej.skrabec@siol.net> (raw)
In-Reply-To: <20181007093905.11253-1-jernej.skrabec@siol.net>
Currently supported Allwinner SoCs with DW HDMI controller have
scrambled addresses and read lock. However, that is not true in general.
For example, A80 and H6 have normal addresses and normal read access.
Move code for unscrambling addresses and unlocking read access to it's
own function and call it from init function.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 23 +++++++++++++++--------
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
index 471993097ced..365cb5a9fb77 100644
--- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
+++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
@@ -279,8 +279,21 @@ static const struct dw_hdmi_phy_ops sun8i_hdmi_phy_ops = {
.setup_hpd = &dw_hdmi_phy_setup_hpd,
};
+static void sun8i_hdmi_phy_unlock(struct sun8i_hdmi_phy *phy)
+{
+ /* enable read access to HDMI controller */
+ regmap_write(phy->regs, SUN8I_HDMI_PHY_READ_EN_REG,
+ SUN8I_HDMI_PHY_READ_EN_MAGIC);
+
+ /* unscramble register offsets */
+ regmap_write(phy->regs, SUN8I_HDMI_PHY_UNSCRAMBLE_REG,
+ SUN8I_HDMI_PHY_UNSCRAMBLE_MAGIC);
+}
+
static void sun8i_hdmi_phy_init_a83t(struct sun8i_hdmi_phy *phy)
{
+ sun8i_hdmi_phy_unlock(phy);
+
regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_DBG_CTRL_REG,
SUN8I_HDMI_PHY_DBG_CTRL_PX_LOCK,
SUN8I_HDMI_PHY_DBG_CTRL_PX_LOCK);
@@ -298,6 +311,8 @@ static void sun8i_hdmi_phy_init_h3(struct sun8i_hdmi_phy *phy)
{
unsigned int val;
+ sun8i_hdmi_phy_unlock(phy);
+
regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, 0);
regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG,
SUN8I_HDMI_PHY_ANA_CFG1_ENBI,
@@ -372,14 +387,6 @@ static void sun8i_hdmi_phy_init_h3(struct sun8i_hdmi_phy *phy)
void sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy)
{
- /* enable read access to HDMI controller */
- regmap_write(phy->regs, SUN8I_HDMI_PHY_READ_EN_REG,
- SUN8I_HDMI_PHY_READ_EN_MAGIC);
-
- /* unscramble register offsets */
- regmap_write(phy->regs, SUN8I_HDMI_PHY_UNSCRAMBLE_REG,
- SUN8I_HDMI_PHY_UNSCRAMBLE_MAGIC);
-
phy->variant->phy_init(phy);
}
--
2.19.0
WARNING: multiple messages have this Message-ID (diff)
From: Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
To: maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org,
wens-jdAy2FN1RRM@public.gmane.org
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
sboyd-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
airlied-cv59FeDIM0c@public.gmane.org,
architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
a.hajda-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org,
Laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: [PATCH v2 16/29] drm/sun4i: Not all DW HDMI controllers has scrambled addresses
Date: Sun, 7 Oct 2018 11:38:52 +0200 [thread overview]
Message-ID: <20181007093905.11253-17-jernej.skrabec@siol.net> (raw)
In-Reply-To: <20181007093905.11253-1-jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
Currently supported Allwinner SoCs with DW HDMI controller have
scrambled addresses and read lock. However, that is not true in general.
For example, A80 and H6 have normal addresses and normal read access.
Move code for unscrambling addresses and unlocking read access to it's
own function and call it from init function.
Reviewed-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 23 +++++++++++++++--------
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
index 471993097ced..365cb5a9fb77 100644
--- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
+++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
@@ -279,8 +279,21 @@ static const struct dw_hdmi_phy_ops sun8i_hdmi_phy_ops = {
.setup_hpd = &dw_hdmi_phy_setup_hpd,
};
+static void sun8i_hdmi_phy_unlock(struct sun8i_hdmi_phy *phy)
+{
+ /* enable read access to HDMI controller */
+ regmap_write(phy->regs, SUN8I_HDMI_PHY_READ_EN_REG,
+ SUN8I_HDMI_PHY_READ_EN_MAGIC);
+
+ /* unscramble register offsets */
+ regmap_write(phy->regs, SUN8I_HDMI_PHY_UNSCRAMBLE_REG,
+ SUN8I_HDMI_PHY_UNSCRAMBLE_MAGIC);
+}
+
static void sun8i_hdmi_phy_init_a83t(struct sun8i_hdmi_phy *phy)
{
+ sun8i_hdmi_phy_unlock(phy);
+
regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_DBG_CTRL_REG,
SUN8I_HDMI_PHY_DBG_CTRL_PX_LOCK,
SUN8I_HDMI_PHY_DBG_CTRL_PX_LOCK);
@@ -298,6 +311,8 @@ static void sun8i_hdmi_phy_init_h3(struct sun8i_hdmi_phy *phy)
{
unsigned int val;
+ sun8i_hdmi_phy_unlock(phy);
+
regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, 0);
regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG,
SUN8I_HDMI_PHY_ANA_CFG1_ENBI,
@@ -372,14 +387,6 @@ static void sun8i_hdmi_phy_init_h3(struct sun8i_hdmi_phy *phy)
void sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy)
{
- /* enable read access to HDMI controller */
- regmap_write(phy->regs, SUN8I_HDMI_PHY_READ_EN_REG,
- SUN8I_HDMI_PHY_READ_EN_MAGIC);
-
- /* unscramble register offsets */
- regmap_write(phy->regs, SUN8I_HDMI_PHY_UNSCRAMBLE_REG,
- SUN8I_HDMI_PHY_UNSCRAMBLE_MAGIC);
-
phy->variant->phy_init(phy);
}
--
2.19.0
WARNING: multiple messages have this Message-ID (diff)
From: jernej.skrabec@siol.net (Jernej Skrabec)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 16/29] drm/sun4i: Not all DW HDMI controllers has scrambled addresses
Date: Sun, 7 Oct 2018 11:38:52 +0200 [thread overview]
Message-ID: <20181007093905.11253-17-jernej.skrabec@siol.net> (raw)
In-Reply-To: <20181007093905.11253-1-jernej.skrabec@siol.net>
Currently supported Allwinner SoCs with DW HDMI controller have
scrambled addresses and read lock. However, that is not true in general.
For example, A80 and H6 have normal addresses and normal read access.
Move code for unscrambling addresses and unlocking read access to it's
own function and call it from init function.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 23 +++++++++++++++--------
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
index 471993097ced..365cb5a9fb77 100644
--- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
+++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
@@ -279,8 +279,21 @@ static const struct dw_hdmi_phy_ops sun8i_hdmi_phy_ops = {
.setup_hpd = &dw_hdmi_phy_setup_hpd,
};
+static void sun8i_hdmi_phy_unlock(struct sun8i_hdmi_phy *phy)
+{
+ /* enable read access to HDMI controller */
+ regmap_write(phy->regs, SUN8I_HDMI_PHY_READ_EN_REG,
+ SUN8I_HDMI_PHY_READ_EN_MAGIC);
+
+ /* unscramble register offsets */
+ regmap_write(phy->regs, SUN8I_HDMI_PHY_UNSCRAMBLE_REG,
+ SUN8I_HDMI_PHY_UNSCRAMBLE_MAGIC);
+}
+
static void sun8i_hdmi_phy_init_a83t(struct sun8i_hdmi_phy *phy)
{
+ sun8i_hdmi_phy_unlock(phy);
+
regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_DBG_CTRL_REG,
SUN8I_HDMI_PHY_DBG_CTRL_PX_LOCK,
SUN8I_HDMI_PHY_DBG_CTRL_PX_LOCK);
@@ -298,6 +311,8 @@ static void sun8i_hdmi_phy_init_h3(struct sun8i_hdmi_phy *phy)
{
unsigned int val;
+ sun8i_hdmi_phy_unlock(phy);
+
regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, 0);
regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG,
SUN8I_HDMI_PHY_ANA_CFG1_ENBI,
@@ -372,14 +387,6 @@ static void sun8i_hdmi_phy_init_h3(struct sun8i_hdmi_phy *phy)
void sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy)
{
- /* enable read access to HDMI controller */
- regmap_write(phy->regs, SUN8I_HDMI_PHY_READ_EN_REG,
- SUN8I_HDMI_PHY_READ_EN_MAGIC);
-
- /* unscramble register offsets */
- regmap_write(phy->regs, SUN8I_HDMI_PHY_UNSCRAMBLE_REG,
- SUN8I_HDMI_PHY_UNSCRAMBLE_MAGIC);
-
phy->variant->phy_init(phy);
}
--
2.19.0
next prev parent reply other threads:[~2018-10-07 9:40 UTC|newest]
Thread overview: 155+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-07 9:38 [PATCH v2 00/29] Allwinner H6 DE3 and HDMI support Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 01/29] dt-bindings: bus: add H6 DE3 bus binding Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-08 8:31 ` Maxime Ripard
2018-10-08 8:31 ` Maxime Ripard
2018-10-08 8:31 ` Maxime Ripard
2018-10-08 14:25 ` Jernej Škrabec
2018-10-08 14:25 ` Jernej Škrabec
2018-10-08 14:25 ` Jernej Škrabec
2018-10-07 9:38 ` [PATCH v2 02/29] clk: sunxi-ng: Adjust MP clock parent rate when allowed Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 03/29] clk: sunxi-ng: Use u64 for calculation of NM rate Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 04/29] clk: sunxi-ng: h6: Set video PLLs limits Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-12 8:13 ` [linux-sunxi] " Jagan Teki
2018-10-12 8:13 ` Jagan Teki
2018-10-12 8:13 ` Jagan Teki
2018-10-12 9:03 ` [linux-sunxi] " Chen-Yu Tsai
2018-10-12 9:03 ` Chen-Yu Tsai
2018-10-12 9:03 ` Chen-Yu Tsai
2018-10-07 9:38 ` [PATCH v2 05/29] dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 06/29] clk: sunxi-ng: Add support for H6 DE3 clocks Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 07/29] dt-bindings: display: sun4i-drm: Add H6 display engine compatibles Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 08/29] drm/sun4i: Add compatible for H6 display engine Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 09/29] drm/sun4i: Rework DE2 register defines Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 10/29] drm/sun4i: Rename DE2 registers related macros Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-08 10:18 ` Maxime Ripard
2018-10-08 10:18 ` Maxime Ripard
2018-10-08 10:18 ` Maxime Ripard
2018-10-08 14:28 ` Jernej Škrabec
2018-10-08 14:28 ` Jernej Škrabec
2018-10-08 14:28 ` Jernej Škrabec
2018-10-09 15:53 ` Maxime Ripard
2018-10-09 15:53 ` Maxime Ripard
2018-10-09 15:53 ` Maxime Ripard
2018-10-07 9:38 ` [PATCH v2 11/29] drm/sun4i: Fix DE2 mixer size Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 12/29] drm/sun4i: Disable unused DE2 sub-engines Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 13/29] drm/sun4i: Add basic support for DE3 Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 14/29] drm/sun4i: Add support for H6 DE3 mixer 0 Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 15/29] drm/bridge/synopsys: dw-hdmi: Enable workaround for v2.12a Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-09 17:40 ` Laurent Pinchart
2018-10-09 17:40 ` Laurent Pinchart
2018-10-09 17:40 ` Laurent Pinchart
2018-10-09 17:56 ` Ilia Mirkin
2018-10-09 17:56 ` Ilia Mirkin
2018-10-09 17:56 ` Ilia Mirkin
2018-10-09 21:23 ` Russell King - ARM Linux
2018-10-09 21:23 ` Russell King - ARM Linux
2018-10-15 17:43 ` [linux-sunxi] " Jernej Škrabec
2018-10-15 17:43 ` Jernej Škrabec
2018-10-15 17:43 ` Jernej Škrabec
2018-10-07 9:38 ` Jernej Skrabec [this message]
2018-10-07 9:38 ` [PATCH v2 16/29] drm/sun4i: Not all DW HDMI controllers has scrambled addresses Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 17/29] drm/sun4i: dw-hdmi: Make mode_valid function configurable Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 18/29] drm/sun4i: dw-hdmi: Add quirk for setting TMDS clock Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-08 9:14 ` Maxime Ripard
2018-10-08 9:14 ` Maxime Ripard
2018-10-08 9:14 ` Maxime Ripard
2018-10-08 15:09 ` Jernej Škrabec
2018-10-08 15:09 ` Jernej Škrabec
2018-10-08 15:09 ` Jernej Škrabec
2018-10-09 9:14 ` Maxime Ripard
2018-10-09 9:14 ` Maxime Ripard
2018-10-09 9:14 ` Maxime Ripard
2018-10-07 9:38 ` [PATCH v2 19/29] dt-bindings: display: sunxi: add DT binding for Allwinner H6 DW HDMI Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 20/29] drm/sun4i: Add support for H6 DW HDMI controller Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 21/29] drm/sun4i: dw-hdmi-phy: Reorder quirks by family Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 22/29] drm/sun4i: Add support for Synopsys HDMI PHY Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` [PATCH v2 23/29] drm/sun4i: Add support for H6 " Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:38 ` Jernej Skrabec
2018-10-07 9:39 ` [PATCH v2 24/29] drm/sun4i: Initialize registers in tcon-top driver Jernej Skrabec
2018-10-07 9:39 ` Jernej Skrabec
2018-10-07 9:39 ` Jernej Skrabec
2018-10-07 9:39 ` [PATCH v2 25/29] drm: sun4i: add quirks for TCON TOP Jernej Skrabec
2018-10-07 9:39 ` Jernej Skrabec
2018-10-07 9:39 ` Jernej Skrabec
2018-10-08 8:51 ` Maxime Ripard
2018-10-08 8:51 ` Maxime Ripard
2018-10-08 8:51 ` Maxime Ripard
2018-10-08 9:06 ` Chen-Yu Tsai
2018-10-08 9:06 ` Chen-Yu Tsai
2018-10-08 9:06 ` Chen-Yu Tsai
2018-10-08 10:20 ` Maxime Ripard
2018-10-08 10:20 ` Maxime Ripard
2018-10-08 10:20 ` Maxime Ripard
2018-10-08 10:50 ` Chen-Yu Tsai
2018-10-08 10:50 ` Chen-Yu Tsai
2018-10-08 10:50 ` Chen-Yu Tsai
2018-10-08 12:33 ` Maxime Ripard
2018-10-08 12:33 ` Maxime Ripard
2018-10-08 12:33 ` Maxime Ripard
2018-10-08 13:10 ` Chen-Yu Tsai
2018-10-08 13:10 ` Chen-Yu Tsai
2018-10-08 13:10 ` Chen-Yu Tsai
2018-10-08 14:30 ` Jernej Škrabec
2018-10-08 14:30 ` Jernej Škrabec
2018-10-08 14:30 ` Jernej Škrabec
2018-10-07 9:39 ` [PATCH v2 26/29] dt-bindings: display: sun4i-drm: document H6 " Jernej Skrabec
2018-10-07 9:39 ` Jernej Skrabec
2018-10-07 9:39 ` Jernej Skrabec
2018-10-07 9:39 ` [PATCH v2 27/29] drm: sun4i: add support for " Jernej Skrabec
2018-10-07 9:39 ` Jernej Skrabec
2018-10-07 9:39 ` Jernej Skrabec
2018-10-07 9:39 ` [PATCH v2 28/29] arm64: dts: allwinner: h6: Add HDMI pipeline Jernej Skrabec
2018-10-07 9:39 ` Jernej Skrabec
2018-10-07 9:39 ` Jernej Skrabec
2018-10-07 9:39 ` [PATCH v2 29/29] arm64: dts: allwinner: h6: Enable HDMI output on Pine H64 board Jernej Skrabec
2018-10-07 9:39 ` Jernej Skrabec
2018-10-07 9:39 ` Jernej Skrabec
2018-10-07 9:50 ` [linux-sunxi] [PATCH v2 00/29] Allwinner H6 DE3 and HDMI support Jernej Škrabec
2018-10-07 9:50 ` Jernej Škrabec
2018-10-07 9:50 ` Jernej Škrabec
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