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From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Jagan Teki <jagan@amarulasolutions.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Sean Paul <sean@poorly.run>, David Airlie <airlied@linux.ie>,
	Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Icenowy Zheng <icenowy@aosc.io>,
	Jernej Skrabec <jernej.skrabec@siol.net>,
	Vasily Khoruzhick <anarsoul@gmail.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Mark Rutland <mark.rutland@arm.com>,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Michael Trimarchi <michael@amarulasolutions.com>,
	TL Lim <tllim@pine64.org>,
	linux-sunxi@googlegroups.com
Subject: Re: [PATCH 04/10] drm/sun4i: sun6i_mipi_dsi: Setup burst mode
Date: Mon, 5 Nov 2018 11:44:36 +0100	[thread overview]
Message-ID: <20181105104436.mt7r2ln2lay5sfl5@flea> (raw)
In-Reply-To: <20181103100900.30313-5-jagan@amarulasolutions.com>

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On Sat, Nov 03, 2018 at 03:38:54PM +0530, Jagan Teki wrote:
> Setting up burst mode display would require to compute
> - Horizontal timing edge values to fill burst drq register
> - Line, sync values to fill burst line register
> 
> Since there is no direct documentation for these computations
> the edge and line formulas are taken from BSP code
> (in drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
> line_num = panel->lcd_ht*dsi_pixel_bits[panel->lcd_dsi_format]/
> 	  (8*panel->lcd_dsi_lane);
> edge1 = sync_point+(panel->lcd_x+panel->lcd_hbp+20)*
> 	dsi_pixel_bits[panel->lcd_dsi_format] /(8*panel->lcd_dsi_lane);
> edge1 = (edge1>line_num)?line_num:edge1;
> edge0 = edge1+(panel->lcd_x+40)*tcon_div/8;
> edge0 = (edge0>line_num)?(edge0-line_num):1;
> 
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
>  drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 48 +++++++++++++++++++++-----
>  1 file changed, 40 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> index 4965b2c71e4c..b6c01891df36 100644
> --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> @@ -375,20 +375,52 @@ static void sun6i_dsi_setup_burst(struct sun6i_dsi *dsi,
>  				  struct drm_display_mode *mode)
>  {
>  	struct mipi_dsi_device *device = dsi->device;
> +	unsigned int Bpp = mipi_dsi_pixel_format_to_bpp(device->format);
> +	u32 line_num, edge0, edge1, hact_sync_bp;
> +	u32 sync_point, tcon_div;
>  	u32 val = 0;
>  
> -	if ((mode->hsync_start - mode->hdisplay) > 20) {
> -		/* Maaaaaagic */
> -		u16 drq = (mode->hsync_start - mode->hdisplay) - 20;
> +	if (device->mode_flags != MIPI_DSI_MODE_VIDEO_BURST) {
> +		if ((mode->hsync_start - mode->hdisplay) > 20) {
> +			/* Maaaaaagic */
> +			u16 drq = (mode->hsync_start - mode->hdisplay) - 20;
>  
> -		drq *= mipi_dsi_pixel_format_to_bpp(device->format);
> -		drq /= 32;
> +			drq *= Bpp;
> +			drq /= 32;
>  
> -		val = (SUN6I_DSI_TCON_DRQ_ENABLE_MODE |
> -		       SUN6I_DSI_TCON_DRQ_SET(drq));
> +			val = (SUN6I_DSI_TCON_DRQ_ENABLE_MODE |
> +			       SUN6I_DSI_TCON_DRQ_SET(drq));
> +		}
> +
> +		regmap_write(dsi->regs, SUN6I_DSI_TCON_DRQ_REG, val);
> +
> +		return;
>  	}

Having functions to compute drq, the line_number and so on would help
the readibility a lot.

> -	regmap_write(dsi->regs, SUN6I_DSI_TCON_DRQ_REG, val);
> +	sync_point = 40;
> +	tcon_div = 8;	/* FIXME need to retrive the divider from TCON */

Then do it. Especially since you have exactly 0 guarantee of the
divider being 8.

(also, s/retrive/retrieve/)

> +
> +	line_num = mode->htotal * Bpp / (8 * device->lanes);
> +	/* Horizental timings duration excluding front porch */

Horizontal

Maxime

-- 
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
To: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
Cc: Maarten Lankhorst
	<maarten.lankhorst-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>,
	Sean Paul <sean-p7yTbzM4H96eqtR555YLDQ@public.gmane.org>,
	David Airlie <airlied-cv59FeDIM0c@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
	Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>,
	Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>,
	Vasily Khoruzhick
	<anarsoul-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Thierry Reding
	<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Michael Trimarchi
	<michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>,
	TL Lim <tllim-F7SikzrIcFYdnm+yROfE0A@public.gmane.org>,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH 04/10] drm/sun4i: sun6i_mipi_dsi: Setup burst mode
Date: Mon, 5 Nov 2018 11:44:36 +0100	[thread overview]
Message-ID: <20181105104436.mt7r2ln2lay5sfl5@flea> (raw)
In-Reply-To: <20181103100900.30313-5-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

[-- Attachment #1: Type: text/plain, Size: 2862 bytes --]

On Sat, Nov 03, 2018 at 03:38:54PM +0530, Jagan Teki wrote:
> Setting up burst mode display would require to compute
> - Horizontal timing edge values to fill burst drq register
> - Line, sync values to fill burst line register
> 
> Since there is no direct documentation for these computations
> the edge and line formulas are taken from BSP code
> (in drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
> line_num = panel->lcd_ht*dsi_pixel_bits[panel->lcd_dsi_format]/
> 	  (8*panel->lcd_dsi_lane);
> edge1 = sync_point+(panel->lcd_x+panel->lcd_hbp+20)*
> 	dsi_pixel_bits[panel->lcd_dsi_format] /(8*panel->lcd_dsi_lane);
> edge1 = (edge1>line_num)?line_num:edge1;
> edge0 = edge1+(panel->lcd_x+40)*tcon_div/8;
> edge0 = (edge0>line_num)?(edge0-line_num):1;
> 
> Signed-off-by: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
>  drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 48 +++++++++++++++++++++-----
>  1 file changed, 40 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> index 4965b2c71e4c..b6c01891df36 100644
> --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> @@ -375,20 +375,52 @@ static void sun6i_dsi_setup_burst(struct sun6i_dsi *dsi,
>  				  struct drm_display_mode *mode)
>  {
>  	struct mipi_dsi_device *device = dsi->device;
> +	unsigned int Bpp = mipi_dsi_pixel_format_to_bpp(device->format);
> +	u32 line_num, edge0, edge1, hact_sync_bp;
> +	u32 sync_point, tcon_div;
>  	u32 val = 0;
>  
> -	if ((mode->hsync_start - mode->hdisplay) > 20) {
> -		/* Maaaaaagic */
> -		u16 drq = (mode->hsync_start - mode->hdisplay) - 20;
> +	if (device->mode_flags != MIPI_DSI_MODE_VIDEO_BURST) {
> +		if ((mode->hsync_start - mode->hdisplay) > 20) {
> +			/* Maaaaaagic */
> +			u16 drq = (mode->hsync_start - mode->hdisplay) - 20;
>  
> -		drq *= mipi_dsi_pixel_format_to_bpp(device->format);
> -		drq /= 32;
> +			drq *= Bpp;
> +			drq /= 32;
>  
> -		val = (SUN6I_DSI_TCON_DRQ_ENABLE_MODE |
> -		       SUN6I_DSI_TCON_DRQ_SET(drq));
> +			val = (SUN6I_DSI_TCON_DRQ_ENABLE_MODE |
> +			       SUN6I_DSI_TCON_DRQ_SET(drq));
> +		}
> +
> +		regmap_write(dsi->regs, SUN6I_DSI_TCON_DRQ_REG, val);
> +
> +		return;
>  	}

Having functions to compute drq, the line_number and so on would help
the readibility a lot.

> -	regmap_write(dsi->regs, SUN6I_DSI_TCON_DRQ_REG, val);
> +	sync_point = 40;
> +	tcon_div = 8;	/* FIXME need to retrive the divider from TCON */

Then do it. Especially since you have exactly 0 guarantee of the
divider being 8.

(also, s/retrive/retrieve/)

> +
> +	line_num = mode->htotal * Bpp / (8 * device->lanes);
> +	/* Horizental timings duration excluding front porch */

Horizontal

Maxime

-- 
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@bootlin.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 04/10] drm/sun4i: sun6i_mipi_dsi: Setup burst mode
Date: Mon, 5 Nov 2018 11:44:36 +0100	[thread overview]
Message-ID: <20181105104436.mt7r2ln2lay5sfl5@flea> (raw)
In-Reply-To: <20181103100900.30313-5-jagan@amarulasolutions.com>

On Sat, Nov 03, 2018 at 03:38:54PM +0530, Jagan Teki wrote:
> Setting up burst mode display would require to compute
> - Horizontal timing edge values to fill burst drq register
> - Line, sync values to fill burst line register
> 
> Since there is no direct documentation for these computations
> the edge and line formulas are taken from BSP code
> (in drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
> line_num = panel->lcd_ht*dsi_pixel_bits[panel->lcd_dsi_format]/
> 	  (8*panel->lcd_dsi_lane);
> edge1 = sync_point+(panel->lcd_x+panel->lcd_hbp+20)*
> 	dsi_pixel_bits[panel->lcd_dsi_format] /(8*panel->lcd_dsi_lane);
> edge1 = (edge1>line_num)?line_num:edge1;
> edge0 = edge1+(panel->lcd_x+40)*tcon_div/8;
> edge0 = (edge0>line_num)?(edge0-line_num):1;
> 
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
>  drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 48 +++++++++++++++++++++-----
>  1 file changed, 40 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> index 4965b2c71e4c..b6c01891df36 100644
> --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> @@ -375,20 +375,52 @@ static void sun6i_dsi_setup_burst(struct sun6i_dsi *dsi,
>  				  struct drm_display_mode *mode)
>  {
>  	struct mipi_dsi_device *device = dsi->device;
> +	unsigned int Bpp = mipi_dsi_pixel_format_to_bpp(device->format);
> +	u32 line_num, edge0, edge1, hact_sync_bp;
> +	u32 sync_point, tcon_div;
>  	u32 val = 0;
>  
> -	if ((mode->hsync_start - mode->hdisplay) > 20) {
> -		/* Maaaaaagic */
> -		u16 drq = (mode->hsync_start - mode->hdisplay) - 20;
> +	if (device->mode_flags != MIPI_DSI_MODE_VIDEO_BURST) {
> +		if ((mode->hsync_start - mode->hdisplay) > 20) {
> +			/* Maaaaaagic */
> +			u16 drq = (mode->hsync_start - mode->hdisplay) - 20;
>  
> -		drq *= mipi_dsi_pixel_format_to_bpp(device->format);
> -		drq /= 32;
> +			drq *= Bpp;
> +			drq /= 32;
>  
> -		val = (SUN6I_DSI_TCON_DRQ_ENABLE_MODE |
> -		       SUN6I_DSI_TCON_DRQ_SET(drq));
> +			val = (SUN6I_DSI_TCON_DRQ_ENABLE_MODE |
> +			       SUN6I_DSI_TCON_DRQ_SET(drq));
> +		}
> +
> +		regmap_write(dsi->regs, SUN6I_DSI_TCON_DRQ_REG, val);
> +
> +		return;
>  	}

Having functions to compute drq, the line_number and so on would help
the readibility a lot.

> -	regmap_write(dsi->regs, SUN6I_DSI_TCON_DRQ_REG, val);
> +	sync_point = 40;
> +	tcon_div = 8;	/* FIXME need to retrive the divider from TCON */

Then do it. Especially since you have exactly 0 guarantee of the
divider being 8.

(also, s/retrive/retrieve/)

> +
> +	line_num = mode->htotal * Bpp / (8 * device->lanes);
> +	/* Horizental timings duration excluding front porch */

Horizontal

Maxime

-- 
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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  reply	other threads:[~2018-11-05 10:45 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-03 10:08 [PATCH 00/10] drm/sun4i: Allwinner MIPI-DSI Burst mode support Jagan Teki
2018-11-03 10:08 ` Jagan Teki
2018-11-03 10:08 ` Jagan Teki
2018-11-03 10:08 ` [PATCH 01/10] drm/sun4i: sun6i_mipi_dsi: Compute burst mode loop N1 instruction delay Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 15:23   ` Sergey Suloev
2018-11-03 15:23     ` Sergey Suloev
2018-11-03 15:23     ` Sergey Suloev
2018-11-04 16:45     ` Jagan Teki
2018-11-04 16:45       ` Jagan Teki
2018-11-04 16:45       ` Jagan Teki
2018-11-04 17:57   ` [linux-sunxi] " Priit Laes
2018-11-04 17:57     ` Priit Laes
2018-11-04 17:57     ` Priit Laes
2018-11-05 10:38   ` Maxime Ripard
2018-11-05 10:38     ` Maxime Ripard
2018-11-05 10:38     ` Maxime Ripard
2018-11-03 10:08 ` [PATCH 02/10] drm/sun4i: sun6i_mipi_dsi: Support instruction loop selection Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-05 10:38   ` Maxime Ripard
2018-11-05 10:38     ` Maxime Ripard
2018-11-05 10:38     ` Maxime Ripard
2018-11-05 11:26     ` Jagan Teki
2018-11-05 11:26       ` Jagan Teki
2018-11-05 11:26       ` Jagan Teki
2018-11-06 15:52       ` Maxime Ripard
2018-11-06 15:52         ` Maxime Ripard
2018-11-06 15:52         ` Maxime Ripard
2018-11-03 10:08 ` [PATCH 03/10] drm/sun4i: sun6i_mipi_dsi: Setup burst mode timings Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-05 10:40   ` Maxime Ripard
2018-11-05 10:40     ` Maxime Ripard
2018-11-05 10:40     ` Maxime Ripard
2018-11-03 10:08 ` [PATCH 04/10] drm/sun4i: sun6i_mipi_dsi: Setup burst mode Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-05 10:44   ` Maxime Ripard [this message]
2018-11-05 10:44     ` Maxime Ripard
2018-11-05 10:44     ` Maxime Ripard
2018-11-03 10:08 ` [PATCH 05/10] drm/sun4i: sun6i_mipi_dsi: Enable " Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-05 10:45   ` Maxime Ripard
2018-11-05 10:45     ` Maxime Ripard
2018-11-05 10:45     ` Maxime Ripard
2018-11-03 10:08 ` [PATCH 06/10] drm/sun4i: sun6i_mipi_dsi: Enable 2byte trail for 4-lane " Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 10:08 ` [PATCH 07/10] drm/sun4i: sun6i_mipi_dsi: Enable burst mode HBP, HSA_HSE Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-05 10:46   ` Maxime Ripard
2018-11-05 10:46     ` Maxime Ripard
2018-11-05 10:46     ` Maxime Ripard
2018-11-03 10:08 ` [PATCH 08/10] dt-bindings: panel: Add Feiyang FY07024DI26A30-D MIPI-DSI LCD panel Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-12 23:37   ` Rob Herring
2018-11-12 23:37     ` Rob Herring
2018-11-03 10:08 ` [PATCH 09/10] drm/panel: " Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-04 20:43   ` Sam Ravnborg
2018-11-04 20:43     ` Sam Ravnborg
2018-11-04 20:43     ` Sam Ravnborg
2018-11-05  6:53     ` Jagan Teki
2018-11-05  6:53       ` Jagan Teki
2018-11-05  6:53       ` Jagan Teki
2018-11-03 10:09 ` [PATCH 10/10] [DO NOT MERGE] arm64: allwinner: a64: pine64-lts: Enable Feiyang FY07024DI26A30-D DSI panel Jagan Teki
2018-11-03 10:09   ` Jagan Teki

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