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From: Jagan Teki <jagan@amarulasolutions.com>
To: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Sean Paul <sean@poorly.run>, David Airlie <airlied@linux.ie>,
	Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Icenowy Zheng <icenowy@aosc.io>,
	Jernej Skrabec <jernej.skrabec@siol.net>,
	Vasily Khoruzhick <anarsoul@gmail.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Mark Rutland <mark.rutland@arm.com>,
	dri-devel <dri-devel@lists.freedesktop.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	Michael Trimarchi <michael@amarulasolutions.com>,
	TL Lim <tllim@pine64.org>,
	linux-sunxi@googlegroups.com
Subject: Re: [PATCH 02/10] drm/sun4i: sun6i_mipi_dsi: Support instruction loop selection
Date: Mon, 5 Nov 2018 16:56:35 +0530	[thread overview]
Message-ID: <CAMty3ZBje8F4YEfWC4qoxADhgdFjbcwZBKJwak633pUAwKAftA@mail.gmail.com> (raw)
In-Reply-To: <20181105103857.lp7ayw3p6dbthehg@flea>

On Mon, Nov 5, 2018 at 4:09 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
>
> On Sat, Nov 03, 2018 at 03:38:52PM +0530, Jagan Teki wrote:
> > Instruction loop selection would require before writing
> > loop number registers, so enable idle, LP11 bits on
> > loop selection register.
> >
> > Reference code available in BSP
> > (in drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
> > (dsi_dev[sel]->dsi_inst_loop_sel.dwval = 2<<(4*DSI_INST_ID_LP11) |
> >       3<<(4*DSI_INST_ID_DLY);
> >
> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > ---
> >  drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > index da152c21ec62..077b57ec964c 100644
> > --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > @@ -397,6 +397,10 @@ static void sun6i_dsi_setup_inst_loop(struct sun6i_dsi *dsi,
> >       struct mipi_dsi_device *device = dsi->device;
> >       u16 delay;
> >
> > +     regmap_write(dsi->regs, SUN6I_DSI_INST_LOOP_SEL_REG,
> > +                  DSI_INST_ID_HSC  << (4 * DSI_INST_ID_LP11) |
> > +                  DSI_INST_ID_HSD  << (4 * DSI_INST_ID_DLY));
> > +
>
> Please put this with the other instructions settings below.

Does that mean after computation delay code?

WARNING: multiple messages have this Message-ID (diff)
From: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
To: Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
Cc: Maarten Lankhorst
	<maarten.lankhorst-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>,
	Sean Paul <sean-p7yTbzM4H96eqtR555YLDQ@public.gmane.org>,
	David Airlie <airlied-cv59FeDIM0c@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
	Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>,
	Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>,
	Vasily Khoruzhick
	<anarsoul-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Thierry Reding
	<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	dri-devel
	<dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>,
	devicetree <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	linux-kernel
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	linux-arm-kernel
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	Michael Trimarchi
	<michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>,
	TL Lim <tllim-F7SikzrIcFYdnm+yROfE0A@public.gmane.org>,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH 02/10] drm/sun4i: sun6i_mipi_dsi: Support instruction loop selection
Date: Mon, 5 Nov 2018 16:56:35 +0530	[thread overview]
Message-ID: <CAMty3ZBje8F4YEfWC4qoxADhgdFjbcwZBKJwak633pUAwKAftA@mail.gmail.com> (raw)
In-Reply-To: <20181105103857.lp7ayw3p6dbthehg@flea>

On Mon, Nov 5, 2018 at 4:09 PM Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org> wrote:
>
> On Sat, Nov 03, 2018 at 03:38:52PM +0530, Jagan Teki wrote:
> > Instruction loop selection would require before writing
> > loop number registers, so enable idle, LP11 bits on
> > loop selection register.
> >
> > Reference code available in BSP
> > (in drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
> > (dsi_dev[sel]->dsi_inst_loop_sel.dwval = 2<<(4*DSI_INST_ID_LP11) |
> >       3<<(4*DSI_INST_ID_DLY);
> >
> > Signed-off-by: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> > ---
> >  drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > index da152c21ec62..077b57ec964c 100644
> > --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > @@ -397,6 +397,10 @@ static void sun6i_dsi_setup_inst_loop(struct sun6i_dsi *dsi,
> >       struct mipi_dsi_device *device = dsi->device;
> >       u16 delay;
> >
> > +     regmap_write(dsi->regs, SUN6I_DSI_INST_LOOP_SEL_REG,
> > +                  DSI_INST_ID_HSC  << (4 * DSI_INST_ID_LP11) |
> > +                  DSI_INST_ID_HSD  << (4 * DSI_INST_ID_DLY));
> > +
>
> Please put this with the other instructions settings below.

Does that mean after computation delay code?

WARNING: multiple messages have this Message-ID (diff)
From: jagan@amarulasolutions.com (Jagan Teki)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 02/10] drm/sun4i: sun6i_mipi_dsi: Support instruction loop selection
Date: Mon, 5 Nov 2018 16:56:35 +0530	[thread overview]
Message-ID: <CAMty3ZBje8F4YEfWC4qoxADhgdFjbcwZBKJwak633pUAwKAftA@mail.gmail.com> (raw)
In-Reply-To: <20181105103857.lp7ayw3p6dbthehg@flea>

On Mon, Nov 5, 2018 at 4:09 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
>
> On Sat, Nov 03, 2018 at 03:38:52PM +0530, Jagan Teki wrote:
> > Instruction loop selection would require before writing
> > loop number registers, so enable idle, LP11 bits on
> > loop selection register.
> >
> > Reference code available in BSP
> > (in drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
> > (dsi_dev[sel]->dsi_inst_loop_sel.dwval = 2<<(4*DSI_INST_ID_LP11) |
> >       3<<(4*DSI_INST_ID_DLY);
> >
> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > ---
> >  drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > index da152c21ec62..077b57ec964c 100644
> > --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > @@ -397,6 +397,10 @@ static void sun6i_dsi_setup_inst_loop(struct sun6i_dsi *dsi,
> >       struct mipi_dsi_device *device = dsi->device;
> >       u16 delay;
> >
> > +     regmap_write(dsi->regs, SUN6I_DSI_INST_LOOP_SEL_REG,
> > +                  DSI_INST_ID_HSC  << (4 * DSI_INST_ID_LP11) |
> > +                  DSI_INST_ID_HSD  << (4 * DSI_INST_ID_DLY));
> > +
>
> Please put this with the other instructions settings below.

Does that mean after computation delay code?

  reply	other threads:[~2018-11-05 11:26 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-03 10:08 [PATCH 00/10] drm/sun4i: Allwinner MIPI-DSI Burst mode support Jagan Teki
2018-11-03 10:08 ` Jagan Teki
2018-11-03 10:08 ` Jagan Teki
2018-11-03 10:08 ` [PATCH 01/10] drm/sun4i: sun6i_mipi_dsi: Compute burst mode loop N1 instruction delay Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 15:23   ` Sergey Suloev
2018-11-03 15:23     ` Sergey Suloev
2018-11-03 15:23     ` Sergey Suloev
2018-11-04 16:45     ` Jagan Teki
2018-11-04 16:45       ` Jagan Teki
2018-11-04 16:45       ` Jagan Teki
2018-11-04 17:57   ` [linux-sunxi] " Priit Laes
2018-11-04 17:57     ` Priit Laes
2018-11-04 17:57     ` Priit Laes
2018-11-05 10:38   ` Maxime Ripard
2018-11-05 10:38     ` Maxime Ripard
2018-11-05 10:38     ` Maxime Ripard
2018-11-03 10:08 ` [PATCH 02/10] drm/sun4i: sun6i_mipi_dsi: Support instruction loop selection Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-05 10:38   ` Maxime Ripard
2018-11-05 10:38     ` Maxime Ripard
2018-11-05 10:38     ` Maxime Ripard
2018-11-05 11:26     ` Jagan Teki [this message]
2018-11-05 11:26       ` Jagan Teki
2018-11-05 11:26       ` Jagan Teki
2018-11-06 15:52       ` Maxime Ripard
2018-11-06 15:52         ` Maxime Ripard
2018-11-06 15:52         ` Maxime Ripard
2018-11-03 10:08 ` [PATCH 03/10] drm/sun4i: sun6i_mipi_dsi: Setup burst mode timings Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-05 10:40   ` Maxime Ripard
2018-11-05 10:40     ` Maxime Ripard
2018-11-05 10:40     ` Maxime Ripard
2018-11-03 10:08 ` [PATCH 04/10] drm/sun4i: sun6i_mipi_dsi: Setup burst mode Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-05 10:44   ` Maxime Ripard
2018-11-05 10:44     ` Maxime Ripard
2018-11-05 10:44     ` Maxime Ripard
2018-11-03 10:08 ` [PATCH 05/10] drm/sun4i: sun6i_mipi_dsi: Enable " Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-05 10:45   ` Maxime Ripard
2018-11-05 10:45     ` Maxime Ripard
2018-11-05 10:45     ` Maxime Ripard
2018-11-03 10:08 ` [PATCH 06/10] drm/sun4i: sun6i_mipi_dsi: Enable 2byte trail for 4-lane " Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 10:08 ` [PATCH 07/10] drm/sun4i: sun6i_mipi_dsi: Enable burst mode HBP, HSA_HSE Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-05 10:46   ` Maxime Ripard
2018-11-05 10:46     ` Maxime Ripard
2018-11-05 10:46     ` Maxime Ripard
2018-11-03 10:08 ` [PATCH 08/10] dt-bindings: panel: Add Feiyang FY07024DI26A30-D MIPI-DSI LCD panel Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-12 23:37   ` Rob Herring
2018-11-12 23:37     ` Rob Herring
2018-11-03 10:08 ` [PATCH 09/10] drm/panel: " Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-03 10:08   ` Jagan Teki
2018-11-04 20:43   ` Sam Ravnborg
2018-11-04 20:43     ` Sam Ravnborg
2018-11-04 20:43     ` Sam Ravnborg
2018-11-05  6:53     ` Jagan Teki
2018-11-05  6:53       ` Jagan Teki
2018-11-05  6:53       ` Jagan Teki
2018-11-03 10:09 ` [PATCH 10/10] [DO NOT MERGE] arm64: allwinner: a64: pine64-lts: Enable Feiyang FY07024DI26A30-D DSI panel Jagan Teki
2018-11-03 10:09   ` Jagan Teki

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