From: Jagan Teki <jagan@amarulasolutions.com>
To: Maxime Ripard <maxime.ripard@bootlin.com>,
Chen-Yu Tsai <wens@csie.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
Michael Trimarchi <michael@amarulasolutions.com>,
linux-sunxi <linux-sunxi@googlegroups.com>,
linux-amarula@amarulasolutions.com,
Jagan Teki <jagan@amarulasolutions.com>
Subject: [PATCH v5 08/17] drm/sun4i: sun6i_mipi_dsi: Fix DSI hbp timing value
Date: Mon, 10 Dec 2018 21:47:20 +0530 [thread overview]
Message-ID: <20181210161729.29720-9-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20181210161729.29720-1-jagan@amarulasolutions.com>
Current driver is calculating hbp maximum value by subtracting
hsync_start with hdisplay which is front porch value, but the
hbp refers to back porch.
Back porch value is calculating by subtracting htotal with
hsync_end as per drm_mode timings, and BSP code from BPI-M64-bsp
is eventually following the same.
BPI-M64-bsp is computing hbp as
(in drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
dsi_hbp = (hbp-hspw)*dsi_pixel_bits[format]/8 - (4+2);
=> (panel->lcd_hbp - timmings->hor_sync_time)
=> (timmings->hor_back_porch + timmings->hor_sync_time -
timmings->hor_sync_time)
=> timmings->hor_back_porch
=> mode->htotal - mode->hsync_end
So, update the MIPI-DSI hbp value accordingly.
Tested on 2-lane, 4-lane DSI LCD panels.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index cb41fea4f3ee..81151d7633f9 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -482,7 +482,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi,
*/
#define HBP_PACKET_OVERHEAD 6
hbp = max((unsigned int)HBP_PACKET_OVERHEAD,
- (mode->hsync_start - mode->hdisplay) * Bpp - HBP_PACKET_OVERHEAD);
+ (mode->htotal - mode->hsync_end) * Bpp - HBP_PACKET_OVERHEAD);
/*
* The frontporch is set using a blanking packet (4 bytes +
--
2.18.0.321.gffc6fa0e3
WARNING: multiple messages have this Message-ID (diff)
From: Jagan Teki <jagan@amarulasolutions.com>
To: Maxime Ripard <maxime.ripard@bootlin.com>,
Chen-Yu Tsai <wens@csie.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-sunxi <linux-sunxi@googlegroups.com>,
Jagan Teki <jagan@amarulasolutions.com>,
Michael Trimarchi <michael@amarulasolutions.com>,
linux-amarula@amarulasolutions.com, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 08/17] drm/sun4i: sun6i_mipi_dsi: Fix DSI hbp timing value
Date: Mon, 10 Dec 2018 21:47:20 +0530 [thread overview]
Message-ID: <20181210161729.29720-9-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20181210161729.29720-1-jagan@amarulasolutions.com>
Current driver is calculating hbp maximum value by subtracting
hsync_start with hdisplay which is front porch value, but the
hbp refers to back porch.
Back porch value is calculating by subtracting htotal with
hsync_end as per drm_mode timings, and BSP code from BPI-M64-bsp
is eventually following the same.
BPI-M64-bsp is computing hbp as
(in drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
dsi_hbp = (hbp-hspw)*dsi_pixel_bits[format]/8 - (4+2);
=> (panel->lcd_hbp - timmings->hor_sync_time)
=> (timmings->hor_back_porch + timmings->hor_sync_time -
timmings->hor_sync_time)
=> timmings->hor_back_porch
=> mode->htotal - mode->hsync_end
So, update the MIPI-DSI hbp value accordingly.
Tested on 2-lane, 4-lane DSI LCD panels.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index cb41fea4f3ee..81151d7633f9 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -482,7 +482,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi,
*/
#define HBP_PACKET_OVERHEAD 6
hbp = max((unsigned int)HBP_PACKET_OVERHEAD,
- (mode->hsync_start - mode->hdisplay) * Bpp - HBP_PACKET_OVERHEAD);
+ (mode->htotal - mode->hsync_end) * Bpp - HBP_PACKET_OVERHEAD);
/*
* The frontporch is set using a blanking packet (4 bytes +
--
2.18.0.321.gffc6fa0e3
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
To: Maxime Ripard
<maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>,
Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
Michael Turquette
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Stephen Boyd <sboyd-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
Michael Trimarchi
<michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>,
linux-sunxi <linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org>,
linux-amarula-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org,
Jagan Teki
<jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
Subject: [PATCH v5 08/17] drm/sun4i: sun6i_mipi_dsi: Fix DSI hbp timing value
Date: Mon, 10 Dec 2018 21:47:20 +0530 [thread overview]
Message-ID: <20181210161729.29720-9-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20181210161729.29720-1-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
Current driver is calculating hbp maximum value by subtracting
hsync_start with hdisplay which is front porch value, but the
hbp refers to back porch.
Back porch value is calculating by subtracting htotal with
hsync_end as per drm_mode timings, and BSP code from BPI-M64-bsp
is eventually following the same.
BPI-M64-bsp is computing hbp as
(in drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
dsi_hbp = (hbp-hspw)*dsi_pixel_bits[format]/8 - (4+2);
=> (panel->lcd_hbp - timmings->hor_sync_time)
=> (timmings->hor_back_porch + timmings->hor_sync_time -
timmings->hor_sync_time)
=> timmings->hor_back_porch
=> mode->htotal - mode->hsync_end
So, update the MIPI-DSI hbp value accordingly.
Tested on 2-lane, 4-lane DSI LCD panels.
Signed-off-by: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index cb41fea4f3ee..81151d7633f9 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -482,7 +482,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi,
*/
#define HBP_PACKET_OVERHEAD 6
hbp = max((unsigned int)HBP_PACKET_OVERHEAD,
- (mode->hsync_start - mode->hdisplay) * Bpp - HBP_PACKET_OVERHEAD);
+ (mode->htotal - mode->hsync_end) * Bpp - HBP_PACKET_OVERHEAD);
/*
* The frontporch is set using a blanking packet (4 bytes +
--
2.18.0.321.gffc6fa0e3
next prev parent reply other threads:[~2018-12-10 16:18 UTC|newest]
Thread overview: 121+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-10 16:17 [PATCH v5 00/17] drm/sun4i: Allwinner A64 MIPI-DSI support Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 01/17] clk: sunxi-ng: Add check for minimal rate to NKM PLLs Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 02/17] drm/sun4i: sun6i_mipi_dsi: Add has_mod_clk quirk Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 03/17] drm/sun4i: sun6i_mipi_dsi: Add Allwinner A64 MIPI DSI support Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 04/17] dt-bindings: sun6i-dsi: Add compatible for A64 MIPI DSI Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 05/17] drm/sun4i: sun6i_mipi_dsi: Add DSI Generic short write 2 param transfer Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 06/17] drm/sun4i: sun6i_mipi_dsi: Fix TCON DRQ set bits Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 07/17] drm/sun4i: sun6i_mipi_dsi: Refactor vertical video start delay Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-11 16:49 ` Maxime Ripard
2018-12-11 16:49 ` Maxime Ripard
2018-12-11 16:49 ` Maxime Ripard
2018-12-11 17:00 ` Jagan Teki
2018-12-11 17:00 ` Jagan Teki
2018-12-11 17:00 ` Jagan Teki
2018-12-12 19:43 ` Jagan Teki
2018-12-12 19:43 ` Jagan Teki
2018-12-12 19:43 ` Jagan Teki
2018-12-19 15:50 ` Maxime Ripard
2018-12-19 15:50 ` Maxime Ripard
2018-12-19 15:50 ` Maxime Ripard
2018-12-20 20:56 ` Jagan Teki
2018-12-20 20:56 ` Jagan Teki
2018-12-20 20:56 ` Jagan Teki
2019-01-06 16:29 ` Jagan Teki
2019-01-06 16:29 ` Jagan Teki
2019-01-06 16:29 ` Jagan Teki
2019-01-07 14:11 ` Maxime Ripard
2019-01-07 14:11 ` Maxime Ripard
2019-01-07 14:11 ` Maxime Ripard
2019-01-07 15:18 ` Jagan Teki
2019-01-07 15:18 ` Jagan Teki
2019-01-07 15:18 ` Jagan Teki
2019-01-08 8:58 ` Maxime Ripard
2019-01-08 8:58 ` Maxime Ripard
2019-01-08 8:58 ` Maxime Ripard
2019-01-09 13:27 ` Jagan Teki
2019-01-12 16:43 ` Maxime Ripard
2019-01-12 16:43 ` Maxime Ripard
2019-01-12 16:43 ` Maxime Ripard
2019-01-12 19:37 ` Jagan Teki
2019-01-12 19:37 ` Jagan Teki
2019-01-12 19:37 ` Jagan Teki
2019-01-16 19:17 ` Maxime Ripard
2019-01-16 19:17 ` Maxime Ripard
2019-01-16 19:17 ` Maxime Ripard
2019-01-17 4:32 ` Jagan Teki
2019-01-17 4:32 ` Jagan Teki
2019-01-17 4:32 ` Jagan Teki
2019-01-18 15:44 ` Jagan Teki
2019-01-18 15:44 ` Jagan Teki
2019-01-18 15:44 ` Jagan Teki
2019-01-22 11:11 ` Maxime Ripard
2019-01-22 11:11 ` Maxime Ripard
2019-01-22 11:11 ` Maxime Ripard
2019-01-22 11:51 ` Jagan Teki
2019-01-22 11:51 ` Jagan Teki
2019-01-22 11:51 ` Jagan Teki
2019-01-25 21:21 ` Maxime Ripard
2019-01-25 21:21 ` Maxime Ripard
2019-01-25 21:21 ` Maxime Ripard
2019-01-22 11:14 ` Maxime Ripard
2019-01-22 11:14 ` Maxime Ripard
2019-01-22 11:14 ` Maxime Ripard
2018-12-10 16:17 ` Jagan Teki [this message]
2018-12-10 16:17 ` [PATCH v5 08/17] drm/sun4i: sun6i_mipi_dsi: Fix DSI hbp timing value Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 09/17] drm/sun4i: sun6i_mipi_dsi: Fix DSI hblk timing calculation Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 10/17] drm/sun4i: sun6i_mipi_dsi: Add DSI hblk packet overhead Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 11/17] drm/sun4i: sun6i_mipi_dsi: Fix DSI hfp timing value Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 12/17] drm/sun4i: sun6i_mipi_dsi: Set proper vblk timing calculation Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 13/17] drm/sun4i: sun6i_mipi_dsi: Add support for VCC-DSI voltage regulator Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 14/17] dt-bindings: sun6i-dsi: Add VCC-DSI supply property Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 15/17] clk: sunxi-ng: a64: Add minimum rate for PLL_MIPI Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-11 16:32 ` Maxime Ripard
2018-12-11 16:32 ` Maxime Ripard
2018-12-11 16:32 ` Maxime Ripard
2018-12-11 16:35 ` [linux-sunxi] " Jagan Teki
2018-12-11 16:35 ` Jagan Teki
2018-12-11 16:35 ` [linux-sunxi] " Jagan Teki
2018-12-11 16:50 ` Maxime Ripard
2018-12-11 16:50 ` Maxime Ripard
2018-12-11 16:50 ` [linux-sunxi] " Maxime Ripard
2018-12-10 16:17 ` [PATCH v5 16/17] dt-bindings: sun6i-dsi: Add A64 DPHY compatible (w/ A31 fallback) Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` [PATCH v5 17/17] arm64: dts: allwinner: a64: Add DSI pipeline Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-10 16:17 ` Jagan Teki
2018-12-11 16:34 ` Maxime Ripard
2018-12-11 16:34 ` Maxime Ripard
2018-12-11 16:34 ` Maxime Ripard
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181210161729.29720-9-jagan@amarulasolutions.com \
--to=jagan@amarulasolutions.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=linux-amarula@amarulasolutions.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-sunxi@googlegroups.com \
--cc=maxime.ripard@bootlin.com \
--cc=michael@amarulasolutions.com \
--cc=mturquette@baylibre.com \
--cc=sboyd@kernel.org \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.