From: Boris Brezillon <bbrezillon@kernel.org>
To: <Tudor.Ambarus@microchip.com>
Cc: <mark.rutland@arm.com>, <devicetree@vger.kernel.org>,
<alexandre.belloni@bootlin.com>, <linux-kernel@vger.kernel.org>,
<Cyrille.Pitchen@microchip.com>, <Nicolas.Ferre@microchip.com>,
<robh+dt@kernel.org>, <linux-spi@vger.kernel.org>,
<Ludovic.Desroches@microchip.com>, <broonie@kernel.org>,
<linux-mtd@lists.infradead.org>, <bugalski.piotr@gmail.com>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 13/13] spi: atmel-quadspi: add support for sam9x60 qspi controller
Date: Sat, 2 Feb 2019 14:30:54 +0100 [thread overview]
Message-ID: <20190202143054.4db7c465@bbrezillon> (raw)
In-Reply-To: <57d4d4b2-e765-1255-0b89-a4fd61f6c1e0@microchip.com>
On Sat, 2 Feb 2019 08:58:25 +0000
<Tudor.Ambarus@microchip.com> wrote:
> >> @@ -117,6 +120,7 @@
> >> #define QSPI_IFR_CRM BIT(14)
> >> #define QSPI_IFR_NBDUM_MASK GENMASK(20, 16)
> >> #define QSPI_IFR_NBDUM(n) (((n) << 16) & QSPI_IFR_NBDUM_MASK)
> >> +#define QSPI_IFR_APBTFRTYP_READ BIT(24)
> >
> > Maybe add a comment saying it's only available on SAM9X60 or prefix it
> > with SAM9X60.
>
> I'll add a comment. The macro name is more generic how it is now and can be used
> by future versions of the IP. Hypothetically speaking, if we rename it to
> QSPI_IFR_SAM9x60_TFSFR_READ and other sam9x will come out, then I'll have to
> rename this macro again, to make it more generic.
Okay.
> >> +static int atmel_qspi_set_cfg(struct atmel_qspi *aq,
> >> + const struct spi_mem_op *op,
> >> + struct atmel_qspi_cfg *cfg)
> >> +{
> >> + void __iomem *base = aq->regs;
> >> + int ret;
> >> +
> >> + /* Set the QSPI controller in Serial Memory Mode */
> >> + if (aq->smm != QSPI_MR_SMM) {
> >> + writel_relaxed(QSPI_MR_SMM, base + QSPI_MR);
> >
> > aq->reqs +
> >
> > and you can get rid of base.
>
> I will wait your reasons on this, see 3/13
ad->regs is only dereferenced once in this function, so there's even
less reasons to add a local var.
WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <bbrezillon@kernel.org>
To: Tudor.Ambarus@microchip.com
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
alexandre.belloni@bootlin.com, linux-kernel@vger.kernel.org,
Cyrille.Pitchen@microchip.com, Nicolas.Ferre@microchip.com,
robh+dt@kernel.org, linux-spi@vger.kernel.org,
Ludovic.Desroches@microchip.com, broonie@kernel.org,
linux-mtd@lists.infradead.org, bugalski.piotr@gmail.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 13/13] spi: atmel-quadspi: add support for sam9x60 qspi controller
Date: Sat, 2 Feb 2019 14:30:54 +0100 [thread overview]
Message-ID: <20190202143054.4db7c465@bbrezillon> (raw)
In-Reply-To: <57d4d4b2-e765-1255-0b89-a4fd61f6c1e0@microchip.com>
On Sat, 2 Feb 2019 08:58:25 +0000
<Tudor.Ambarus@microchip.com> wrote:
> >> @@ -117,6 +120,7 @@
> >> #define QSPI_IFR_CRM BIT(14)
> >> #define QSPI_IFR_NBDUM_MASK GENMASK(20, 16)
> >> #define QSPI_IFR_NBDUM(n) (((n) << 16) & QSPI_IFR_NBDUM_MASK)
> >> +#define QSPI_IFR_APBTFRTYP_READ BIT(24)
> >
> > Maybe add a comment saying it's only available on SAM9X60 or prefix it
> > with SAM9X60.
>
> I'll add a comment. The macro name is more generic how it is now and can be used
> by future versions of the IP. Hypothetically speaking, if we rename it to
> QSPI_IFR_SAM9x60_TFSFR_READ and other sam9x will come out, then I'll have to
> rename this macro again, to make it more generic.
Okay.
> >> +static int atmel_qspi_set_cfg(struct atmel_qspi *aq,
> >> + const struct spi_mem_op *op,
> >> + struct atmel_qspi_cfg *cfg)
> >> +{
> >> + void __iomem *base = aq->regs;
> >> + int ret;
> >> +
> >> + /* Set the QSPI controller in Serial Memory Mode */
> >> + if (aq->smm != QSPI_MR_SMM) {
> >> + writel_relaxed(QSPI_MR_SMM, base + QSPI_MR);
> >
> > aq->reqs +
> >
> > and you can get rid of base.
>
> I will wait your reasons on this, see 3/13
ad->regs is only dereferenced once in this function, so there's even
less reasons to add a local var.
WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <bbrezillon@kernel.org>
To: <Tudor.Ambarus@microchip.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
alexandre.belloni@bootlin.com, broonie@kernel.org,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
Nicolas.Ferre@microchip.com, Ludovic.Desroches@microchip.com,
Cyrille.Pitchen@microchip.com, linux-mtd@lists.infradead.org,
bugalski.piotr@gmail.com, linux-spi@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 13/13] spi: atmel-quadspi: add support for sam9x60 qspi controller
Date: Sat, 2 Feb 2019 14:30:54 +0100 [thread overview]
Message-ID: <20190202143054.4db7c465@bbrezillon> (raw)
In-Reply-To: <57d4d4b2-e765-1255-0b89-a4fd61f6c1e0@microchip.com>
On Sat, 2 Feb 2019 08:58:25 +0000
<Tudor.Ambarus@microchip.com> wrote:
> >> @@ -117,6 +120,7 @@
> >> #define QSPI_IFR_CRM BIT(14)
> >> #define QSPI_IFR_NBDUM_MASK GENMASK(20, 16)
> >> #define QSPI_IFR_NBDUM(n) (((n) << 16) & QSPI_IFR_NBDUM_MASK)
> >> +#define QSPI_IFR_APBTFRTYP_READ BIT(24)
> >
> > Maybe add a comment saying it's only available on SAM9X60 or prefix it
> > with SAM9X60.
>
> I'll add a comment. The macro name is more generic how it is now and can be used
> by future versions of the IP. Hypothetically speaking, if we rename it to
> QSPI_IFR_SAM9x60_TFSFR_READ and other sam9x will come out, then I'll have to
> rename this macro again, to make it more generic.
Okay.
> >> +static int atmel_qspi_set_cfg(struct atmel_qspi *aq,
> >> + const struct spi_mem_op *op,
> >> + struct atmel_qspi_cfg *cfg)
> >> +{
> >> + void __iomem *base = aq->regs;
> >> + int ret;
> >> +
> >> + /* Set the QSPI controller in Serial Memory Mode */
> >> + if (aq->smm != QSPI_MR_SMM) {
> >> + writel_relaxed(QSPI_MR_SMM, base + QSPI_MR);
> >
> > aq->reqs +
> >
> > and you can get rid of base.
>
> I will wait your reasons on this, see 3/13
ad->regs is only dereferenced once in this function, so there's even
less reasons to add a local var.
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <bbrezillon@kernel.org>
To: <Tudor.Ambarus@microchip.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
alexandre.belloni@bootlin.com, broonie@kernel.org,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
Ludovic.Desroches@microchip.com, Cyrille.Pitchen@microchip.com,
linux-mtd@lists.infradead.org, bugalski.piotr@gmail.com,
linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 13/13] spi: atmel-quadspi: add support for sam9x60 qspi controller
Date: Sat, 2 Feb 2019 14:30:54 +0100 [thread overview]
Message-ID: <20190202143054.4db7c465@bbrezillon> (raw)
In-Reply-To: <57d4d4b2-e765-1255-0b89-a4fd61f6c1e0@microchip.com>
On Sat, 2 Feb 2019 08:58:25 +0000
<Tudor.Ambarus@microchip.com> wrote:
> >> @@ -117,6 +120,7 @@
> >> #define QSPI_IFR_CRM BIT(14)
> >> #define QSPI_IFR_NBDUM_MASK GENMASK(20, 16)
> >> #define QSPI_IFR_NBDUM(n) (((n) << 16) & QSPI_IFR_NBDUM_MASK)
> >> +#define QSPI_IFR_APBTFRTYP_READ BIT(24)
> >
> > Maybe add a comment saying it's only available on SAM9X60 or prefix it
> > with SAM9X60.
>
> I'll add a comment. The macro name is more generic how it is now and can be used
> by future versions of the IP. Hypothetically speaking, if we rename it to
> QSPI_IFR_SAM9x60_TFSFR_READ and other sam9x will come out, then I'll have to
> rename this macro again, to make it more generic.
Okay.
> >> +static int atmel_qspi_set_cfg(struct atmel_qspi *aq,
> >> + const struct spi_mem_op *op,
> >> + struct atmel_qspi_cfg *cfg)
> >> +{
> >> + void __iomem *base = aq->regs;
> >> + int ret;
> >> +
> >> + /* Set the QSPI controller in Serial Memory Mode */
> >> + if (aq->smm != QSPI_MR_SMM) {
> >> + writel_relaxed(QSPI_MR_SMM, base + QSPI_MR);
> >
> > aq->reqs +
> >
> > and you can get rid of base.
>
> I will wait your reasons on this, see 3/13
ad->regs is only dereferenced once in this function, so there's even
less reasons to add a local var.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-02-02 13:31 UTC|newest]
Thread overview: 133+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-02 4:07 [PATCH v3 00/13] spi: atmel-quadspi: introduce sam9x60 qspi controller Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` [PATCH v3 01/13] spi: atmel-quadspi: cache MR value to avoid a write access Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 7:06 ` Boris Brezillon
2019-02-02 7:06 ` Boris Brezillon
2019-02-02 7:06 ` Boris Brezillon
2019-02-02 7:06 ` Boris Brezillon
2019-02-02 7:06 ` Boris Brezillon
2019-02-02 8:38 ` Tudor.Ambarus
2019-02-02 8:38 ` Tudor.Ambarus
2019-02-02 8:38 ` Tudor.Ambarus
2019-02-02 8:38 ` Tudor.Ambarus
2019-02-02 8:38 ` Tudor.Ambarus
2019-02-02 13:20 ` Boris Brezillon
2019-02-02 13:20 ` Boris Brezillon
2019-02-02 13:20 ` Boris Brezillon
2019-02-02 13:20 ` Boris Brezillon
2019-02-02 13:20 ` Boris Brezillon
2019-02-02 4:07 ` [PATCH v3 02/13] spi: atmel-quadspi: order header files inclusion alphabetically Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` [PATCH v3 03/13] spi: atmel-quadspi: drop wrappers for iomem accesses Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 7:11 ` Boris Brezillon
2019-02-02 7:11 ` Boris Brezillon
2019-02-02 7:11 ` Boris Brezillon
2019-02-02 7:11 ` Boris Brezillon
2019-02-02 8:44 ` Tudor.Ambarus
2019-02-02 8:44 ` Tudor.Ambarus
2019-02-02 8:44 ` Tudor.Ambarus
2019-02-02 8:44 ` Tudor.Ambarus
2019-02-02 8:44 ` Tudor.Ambarus
2019-02-02 13:23 ` Boris Brezillon
2019-02-02 13:23 ` Boris Brezillon
2019-02-02 13:23 ` Boris Brezillon
2019-02-02 13:23 ` Boris Brezillon
2019-02-02 13:23 ` Boris Brezillon
2019-02-02 4:07 ` [PATCH v3 04/13] spi: atmel-quadspi: fix naming scheme Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 7:12 ` Boris Brezillon
2019-02-02 7:12 ` Boris Brezillon
2019-02-02 7:12 ` Boris Brezillon
2019-02-02 7:12 ` Boris Brezillon
2019-02-02 4:07 ` [PATCH v3 05/13] spi: atmel-quadspi: remove unnecessary cast Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` [PATCH v3 06/13] spi: atmel-quadspi: return appropriate error code Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` [PATCH v3 07/13] spi: atmel-quadspi: switch to SPDX license identifiers Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` [PATCH v3 08/13] spi: atmel-quadspi: drop unused and NOP transfer macros Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 7:13 ` Boris Brezillon
2019-02-02 7:13 ` Boris Brezillon
2019-02-02 7:13 ` Boris Brezillon
2019-02-02 7:13 ` Boris Brezillon
2019-02-02 8:46 ` Tudor.Ambarus
2019-02-02 8:46 ` Tudor.Ambarus
2019-02-02 8:46 ` Tudor.Ambarus
2019-02-02 8:46 ` Tudor.Ambarus
2019-02-02 13:27 ` Boris Brezillon
2019-02-02 13:27 ` Boris Brezillon
2019-02-02 13:27 ` Boris Brezillon
2019-02-02 13:27 ` Boris Brezillon
2019-02-02 13:27 ` Boris Brezillon
2019-02-02 4:07 ` [PATCH v3 09/13] dt-bindings: spi: atmel-quadspi: update example to new clock binding Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` [PATCH v3 10/13] dt-bindings: spi: atmel-quadspi: make "pclk" mandatory Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 7:15 ` Boris Brezillon
2019-02-02 7:15 ` Boris Brezillon
2019-02-02 7:15 ` Boris Brezillon
2019-02-02 7:15 ` Boris Brezillon
2019-02-02 8:47 ` Tudor.Ambarus
2019-02-02 8:47 ` Tudor.Ambarus
2019-02-02 8:47 ` Tudor.Ambarus
2019-02-02 8:47 ` Tudor.Ambarus
2019-02-02 4:07 ` [PATCH v3 11/13] spi: atmel-quadspi: add support for named peripheral clock Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 7:16 ` Boris Brezillon
2019-02-02 7:16 ` Boris Brezillon
2019-02-02 7:16 ` Boris Brezillon
2019-02-02 7:16 ` Boris Brezillon
2019-02-02 4:07 ` [PATCH v3 12/13] dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60 Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 7:17 ` Boris Brezillon
2019-02-02 7:17 ` Boris Brezillon
2019-02-02 7:17 ` Boris Brezillon
2019-02-02 7:17 ` Boris Brezillon
2019-02-02 4:07 ` [PATCH v3 13/13] spi: atmel-quadspi: add support for sam9x60 qspi controller Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 4:07 ` Tudor.Ambarus
2019-02-02 7:29 ` Boris Brezillon
2019-02-02 7:29 ` Boris Brezillon
2019-02-02 7:29 ` Boris Brezillon
2019-02-02 7:29 ` Boris Brezillon
2019-02-02 7:29 ` Boris Brezillon
2019-02-02 8:58 ` Tudor.Ambarus
2019-02-02 8:58 ` Tudor.Ambarus
2019-02-02 8:58 ` Tudor.Ambarus
2019-02-02 8:58 ` Tudor.Ambarus
2019-02-02 8:58 ` Tudor.Ambarus
2019-02-02 13:30 ` Boris Brezillon [this message]
2019-02-02 13:30 ` Boris Brezillon
2019-02-02 13:30 ` Boris Brezillon
2019-02-02 13:30 ` Boris Brezillon
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