From: Wolfram Sang <wsa@the-dreams.de> To: Ray Jui <ray.jui@broadcom.com> Cc: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>, Shreesha Rajashekar <shreesha.rajashekar@broadcom.com>, Michael Cheng <ccheng@broadcom.com> Subject: Re: [PATCH v5 2/8] i2c: iproc: Add slave mode support Date: Wed, 27 Mar 2019 23:14:52 +0100 [thread overview] Message-ID: <20190327221452.GA15396@kunai> (raw) In-Reply-To: <20190214175725.60462-3-ray.jui@broadcom.com> [-- Attachment #1: Type: text/plain, Size: 2480 bytes --] > +static void bcm_iproc_i2c_slave_init( > + struct bcm_iproc_i2c_dev *iproc_i2c, bool need_reset) > +{ > + u32 val; > + > + if (need_reset) { > + /* put controller in reset */ > + val = readl(iproc_i2c->base + CFG_OFFSET); > + val |= BIT(CFG_RESET_SHIFT); > + writel(val, iproc_i2c->base + CFG_OFFSET); > + > + /* wait 100 usec per spec */ > + udelay(100); > + > + /* bring controller out of reset */ > + val &= ~(BIT(CFG_RESET_SHIFT)); > + writel(val, iproc_i2c->base + CFG_OFFSET); > + } > + > + /* flush TX/RX FIFOs */ > + val = (BIT(S_FIFO_RX_FLUSH_SHIFT) | BIT(S_FIFO_TX_FLUSH_SHIFT)); > + writel(val, iproc_i2c->base + S_FIFO_CTRL_OFFSET); Will flushing FIFOs work when a slave is register while a master transfer is on-going at the same time? > + > + /* RANDOM SLAVE STRETCH time - 20ms*/ What is a "random stretch time"? 20ms sounds like a lot. Also, missing space before comment terminator. > @@ -224,22 +473,25 @@ static int bcm_iproc_i2c_init(struct bcm_iproc_i2c_dev *iproc_i2c) > > /* put controller in reset */ > val = readl(iproc_i2c->base + CFG_OFFSET); > - val |= 1 << CFG_RESET_SHIFT; > - val &= ~(1 << CFG_EN_SHIFT); > + val |= BIT(CFG_RESET_SHIFT); > + val &= ~(BIT(CFG_EN_SHIFT)); > writel(val, iproc_i2c->base + CFG_OFFSET); > > /* wait 100 usec per spec */ > udelay(100); > > /* bring controller out of reset */ > - val &= ~(1 << CFG_RESET_SHIFT); > + val &= ~(BIT(CFG_RESET_SHIFT)); > writel(val, iproc_i2c->base + CFG_OFFSET); > > /* flush TX/RX FIFOs and set RX FIFO threshold to zero */ > - val = (1 << M_FIFO_RX_FLUSH_SHIFT) | (1 << M_FIFO_TX_FLUSH_SHIFT); > + val = (BIT(M_FIFO_RX_FLUSH_SHIFT) | BIT(M_FIFO_TX_FLUSH_SHIFT)); > writel(val, iproc_i2c->base + M_FIFO_CTRL_OFFSET); > /* disable all interrupts */ > - writel(0, iproc_i2c->base + IE_OFFSET); > + val = readl(iproc_i2c->base + IE_OFFSET); > + val &= ~(IE_M_ALL_INTERRUPT_MASK << > + IE_M_ALL_INTERRUPT_SHIFT); > + writel(val, iproc_i2c->base + IE_OFFSET); This block looks unrelated, but I won't be too strict here... > + case M_CMD_STATUS_FIFO_UNDERRUN: > + dev_dbg(iproc_i2c->device, "FIFO under-run\n"); > + return -ENXIO; > + > + case M_CMD_STATUS_RX_FIFO_FULL: > + dev_dbg(iproc_i2c->device, "Master Rx FIFO full > 10ms\n"); > + return -ETIMEDOUT; > + ... however, this looks really unrelated to me. This is about master transmission, or? Rest looks OK. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 833 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Wolfram Sang <wsa@the-dreams.de> To: Ray Jui <ray.jui@broadcom.com> Cc: Mark Rutland <mark.rutland@arm.com>, devicetree@vger.kernel.org, Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>, linux-kernel@vger.kernel.org, Shreesha Rajashekar <shreesha.rajashekar@broadcom.com>, Rob Herring <robh+dt@kernel.org>, bcm-kernel-feedback-list@broadcom.com, linux-i2c@vger.kernel.org, Michael Cheng <ccheng@broadcom.com>, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v5 2/8] i2c: iproc: Add slave mode support Date: Wed, 27 Mar 2019 23:14:52 +0100 [thread overview] Message-ID: <20190327221452.GA15396@kunai> (raw) In-Reply-To: <20190214175725.60462-3-ray.jui@broadcom.com> [-- Attachment #1.1: Type: text/plain, Size: 2480 bytes --] > +static void bcm_iproc_i2c_slave_init( > + struct bcm_iproc_i2c_dev *iproc_i2c, bool need_reset) > +{ > + u32 val; > + > + if (need_reset) { > + /* put controller in reset */ > + val = readl(iproc_i2c->base + CFG_OFFSET); > + val |= BIT(CFG_RESET_SHIFT); > + writel(val, iproc_i2c->base + CFG_OFFSET); > + > + /* wait 100 usec per spec */ > + udelay(100); > + > + /* bring controller out of reset */ > + val &= ~(BIT(CFG_RESET_SHIFT)); > + writel(val, iproc_i2c->base + CFG_OFFSET); > + } > + > + /* flush TX/RX FIFOs */ > + val = (BIT(S_FIFO_RX_FLUSH_SHIFT) | BIT(S_FIFO_TX_FLUSH_SHIFT)); > + writel(val, iproc_i2c->base + S_FIFO_CTRL_OFFSET); Will flushing FIFOs work when a slave is register while a master transfer is on-going at the same time? > + > + /* RANDOM SLAVE STRETCH time - 20ms*/ What is a "random stretch time"? 20ms sounds like a lot. Also, missing space before comment terminator. > @@ -224,22 +473,25 @@ static int bcm_iproc_i2c_init(struct bcm_iproc_i2c_dev *iproc_i2c) > > /* put controller in reset */ > val = readl(iproc_i2c->base + CFG_OFFSET); > - val |= 1 << CFG_RESET_SHIFT; > - val &= ~(1 << CFG_EN_SHIFT); > + val |= BIT(CFG_RESET_SHIFT); > + val &= ~(BIT(CFG_EN_SHIFT)); > writel(val, iproc_i2c->base + CFG_OFFSET); > > /* wait 100 usec per spec */ > udelay(100); > > /* bring controller out of reset */ > - val &= ~(1 << CFG_RESET_SHIFT); > + val &= ~(BIT(CFG_RESET_SHIFT)); > writel(val, iproc_i2c->base + CFG_OFFSET); > > /* flush TX/RX FIFOs and set RX FIFO threshold to zero */ > - val = (1 << M_FIFO_RX_FLUSH_SHIFT) | (1 << M_FIFO_TX_FLUSH_SHIFT); > + val = (BIT(M_FIFO_RX_FLUSH_SHIFT) | BIT(M_FIFO_TX_FLUSH_SHIFT)); > writel(val, iproc_i2c->base + M_FIFO_CTRL_OFFSET); > /* disable all interrupts */ > - writel(0, iproc_i2c->base + IE_OFFSET); > + val = readl(iproc_i2c->base + IE_OFFSET); > + val &= ~(IE_M_ALL_INTERRUPT_MASK << > + IE_M_ALL_INTERRUPT_SHIFT); > + writel(val, iproc_i2c->base + IE_OFFSET); This block looks unrelated, but I won't be too strict here... > + case M_CMD_STATUS_FIFO_UNDERRUN: > + dev_dbg(iproc_i2c->device, "FIFO under-run\n"); > + return -ENXIO; > + > + case M_CMD_STATUS_RX_FIFO_FULL: > + dev_dbg(iproc_i2c->device, "Master Rx FIFO full > 10ms\n"); > + return -ETIMEDOUT; > + ... however, this looks really unrelated to me. This is about master transmission, or? Rest looks OK. [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 833 bytes --] [-- Attachment #2: Type: text/plain, Size: 176 bytes --] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-03-27 22:14 UTC|newest] Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-02-14 17:57 [PATCH v5 0/8] iProc I2C slave mode and NIC mode Ray Jui 2019-02-14 17:57 ` Ray Jui 2019-02-14 17:57 ` [PATCH v5 1/8] i2c: iproc: Extend I2C read up to 255 bytes Ray Jui 2019-02-14 17:57 ` Ray Jui 2019-03-27 22:17 ` Wolfram Sang 2019-03-27 22:17 ` Wolfram Sang 2019-04-01 21:35 ` Ray Jui 2019-04-01 21:35 ` Ray Jui 2019-02-14 17:57 ` [PATCH v5 2/8] i2c: iproc: Add slave mode support Ray Jui 2019-02-14 17:57 ` Ray Jui 2019-03-27 22:14 ` Wolfram Sang [this message] 2019-03-27 22:14 ` Wolfram Sang 2019-03-27 22:41 ` Wolfram Sang 2019-03-27 22:41 ` Wolfram Sang 2019-04-01 21:33 ` Ray Jui 2019-04-01 21:33 ` Ray Jui 2019-04-02 8:24 ` Rayagonda Kokatanur 2019-04-02 8:24 ` Rayagonda Kokatanur 2019-04-02 9:01 ` Wolfram Sang 2019-04-02 9:01 ` Wolfram Sang 2019-02-14 17:57 ` [PATCH v5 3/8] dt-bindings: i2c: iproc: make 'interrupts' optional Ray Jui 2019-02-14 17:57 ` Ray Jui 2019-02-14 22:25 ` Rob Herring 2019-02-14 22:25 ` Rob Herring 2019-02-14 22:25 ` Rob Herring 2019-02-14 17:57 ` [PATCH v5 4/8] i2c: iproc: add polling support Ray Jui 2019-02-14 17:57 ` Ray Jui 2019-02-14 17:57 ` [PATCH v5 5/8] i2c: iproc: use wrapper for read/write access Ray Jui 2019-02-14 17:57 ` Ray Jui 2019-02-14 17:57 ` [PATCH v5 6/8] dt-bindings: i2c: iproc: add "brcm,iproc-nic-i2c" compatible string Ray Jui 2019-02-14 17:57 ` [PATCH v5 6/8] dt-bindings: i2c: iproc: add "brcm, iproc-nic-i2c" " Ray Jui 2019-02-14 22:26 ` [PATCH v5 6/8] dt-bindings: i2c: iproc: add "brcm,iproc-nic-i2c" " Rob Herring 2019-02-14 22:26 ` [PATCH v5 6/8] dt-bindings: i2c: iproc: add "brcm, iproc-nic-i2c" " Rob Herring 2019-02-14 22:26 ` Rob Herring 2019-03-27 22:24 ` [PATCH v5 6/8] dt-bindings: i2c: iproc: add "brcm,iproc-nic-i2c" " Wolfram Sang 2019-03-27 22:24 ` [PATCH v5 6/8] dt-bindings: i2c: iproc: add "brcm, iproc-nic-i2c" " Wolfram Sang 2019-04-01 21:43 ` [PATCH v5 6/8] dt-bindings: i2c: iproc: add "brcm,iproc-nic-i2c" " Ray Jui 2019-04-01 21:43 ` [PATCH v5 6/8] dt-bindings: i2c: iproc: add "brcm, iproc-nic-i2c" " Ray Jui 2019-04-02 10:17 ` [PATCH v5 6/8] dt-bindings: i2c: iproc: add "brcm,iproc-nic-i2c" " Wolfram Sang 2019-04-02 10:17 ` [PATCH v5 6/8] dt-bindings: i2c: iproc: add "brcm, iproc-nic-i2c" " Wolfram Sang 2019-02-14 17:57 ` [PATCH v5 7/8] i2c: iproc: add NIC I2C support Ray Jui 2019-02-14 17:57 ` Ray Jui 2019-04-02 10:27 ` Wolfram Sang 2019-04-02 10:27 ` Wolfram Sang 2019-04-02 17:57 ` Ray Jui 2019-04-02 17:57 ` Ray Jui 2019-04-03 1:10 ` Ray Jui 2019-04-03 1:10 ` Ray Jui 2019-02-14 17:57 ` [PATCH v5 8/8] arm64: dts: Stingray: Add NIC i2c device node Ray Jui 2019-02-14 17:57 ` Ray Jui 2019-02-22 20:04 ` [PATCH v5 0/8] iProc I2C slave mode and NIC mode Ray Jui 2019-02-22 20:04 ` Ray Jui 2019-03-22 16:40 ` Florian Fainelli 2019-03-22 16:40 ` Florian Fainelli 2019-03-27 22:27 ` Wolfram Sang 2019-03-27 22:27 ` Wolfram Sang 2019-04-01 21:44 ` Ray Jui 2019-04-01 21:44 ` Ray Jui
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