From: Manikanta Maddireddy <mmaddireddy@nvidia.com> To: thierry.reding@gmail.com, bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, jonathanh@nvidia.com, lorenzo.pieralisi@arm.com, vidyas@nvidia.com Cc: linux-tegra@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manikanta Maddireddy <mmaddireddy@nvidia.com> Subject: [PATCH V6 09/27] PCI: tegra: Enable opportunistic UpdateFC and ACK Date: Tue, 18 Jun 2019 23:31:48 +0530 [thread overview] Message-ID: <20190618180206.4908-10-mmaddireddy@nvidia.com> (raw) In-Reply-To: <20190618180206.4908-1-mmaddireddy@nvidia.com> Enable opportunistic UpdateFC and ACK to allow data link layer send pending ACKs and UpdateFC packets when link is idle instead of waiting for timers to expire. This improves the PCIe performance due to better utilization of PCIe bandwidth. Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> --- V6: No change V5: No change V4: No change V3: No change V2: No change drivers/pci/controller/pci-tegra.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c index c38a370ed853..51691252ca10 100644 --- a/drivers/pci/controller/pci-tegra.c +++ b/drivers/pci/controller/pci-tegra.c @@ -204,7 +204,9 @@ #define RP_ECTL_6_R2_RX_EQ_CTRL_H_1C_MASK 0xffffffff #define RP_VEND_XP 0x00000f00 -#define RP_VEND_XP_DL_UP (1 << 30) +#define RP_VEND_XP_DL_UP (1 << 30) +#define RP_VEND_XP_OPPORTUNISTIC_ACK (1 << 27) +#define RP_VEND_XP_OPPORTUNISTIC_UPDATEFC (1 << 28) #define RP_VEND_CTL1 0x00000f48 #define RP_VEND_CTL1_ERPT (1 << 13) @@ -529,6 +531,12 @@ static void tegra_pcie_enable_rp_features(struct tegra_pcie_port *port) value = readl(port->base + RP_VEND_CTL1); value |= RP_VEND_CTL1_ERPT; writel(value, port->base + RP_VEND_CTL1); + + /* Optimal settings to enhance bandwidth */ + value = readl(port->base + RP_VEND_XP); + value |= RP_VEND_XP_OPPORTUNISTIC_ACK; + value |= RP_VEND_XP_OPPORTUNISTIC_UPDATEFC; + writel(value, port->base + RP_VEND_XP); } static void tegra_pcie_program_ectl_settings(struct tegra_pcie_port *port) -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Manikanta Maddireddy <mmaddireddy@nvidia.com> To: <thierry.reding@gmail.com>, <bhelgaas@google.com>, <robh+dt@kernel.org>, <mark.rutland@arm.com>, <jonathanh@nvidia.com>, <lorenzo.pieralisi@arm.com>, <vidyas@nvidia.com> Cc: <linux-tegra@vger.kernel.org>, <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>, Manikanta Maddireddy <mmaddireddy@nvidia.com> Subject: [PATCH V6 09/27] PCI: tegra: Enable opportunistic UpdateFC and ACK Date: Tue, 18 Jun 2019 23:31:48 +0530 [thread overview] Message-ID: <20190618180206.4908-10-mmaddireddy@nvidia.com> (raw) In-Reply-To: <20190618180206.4908-1-mmaddireddy@nvidia.com> Enable opportunistic UpdateFC and ACK to allow data link layer send pending ACKs and UpdateFC packets when link is idle instead of waiting for timers to expire. This improves the PCIe performance due to better utilization of PCIe bandwidth. Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> --- V6: No change V5: No change V4: No change V3: No change V2: No change drivers/pci/controller/pci-tegra.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c index c38a370ed853..51691252ca10 100644 --- a/drivers/pci/controller/pci-tegra.c +++ b/drivers/pci/controller/pci-tegra.c @@ -204,7 +204,9 @@ #define RP_ECTL_6_R2_RX_EQ_CTRL_H_1C_MASK 0xffffffff #define RP_VEND_XP 0x00000f00 -#define RP_VEND_XP_DL_UP (1 << 30) +#define RP_VEND_XP_DL_UP (1 << 30) +#define RP_VEND_XP_OPPORTUNISTIC_ACK (1 << 27) +#define RP_VEND_XP_OPPORTUNISTIC_UPDATEFC (1 << 28) #define RP_VEND_CTL1 0x00000f48 #define RP_VEND_CTL1_ERPT (1 << 13) @@ -529,6 +531,12 @@ static void tegra_pcie_enable_rp_features(struct tegra_pcie_port *port) value = readl(port->base + RP_VEND_CTL1); value |= RP_VEND_CTL1_ERPT; writel(value, port->base + RP_VEND_CTL1); + + /* Optimal settings to enhance bandwidth */ + value = readl(port->base + RP_VEND_XP); + value |= RP_VEND_XP_OPPORTUNISTIC_ACK; + value |= RP_VEND_XP_OPPORTUNISTIC_UPDATEFC; + writel(value, port->base + RP_VEND_XP); } static void tegra_pcie_program_ectl_settings(struct tegra_pcie_port *port) -- 2.17.1
next prev parent reply other threads:[~2019-06-18 18:01 UTC|newest] Thread overview: 85+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-06-18 18:01 [PATCH V6 00/27] Enable Tegra PCIe root port features Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 01/27] soc/tegra: pmc: Export tegra_powergate_power_on() Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 02/27] PCI: tegra: Handle failure cases in tegra_pcie_power_on() Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 03/27] PCI: tegra: Rearrange Tegra PCIe driver functions Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 04/27] PCI: tegra: Mask AFI_INTR in runtime suspend Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-20 14:27 ` Lorenzo Pieralisi 2019-06-20 14:46 ` Manikanta Maddireddy 2019-06-20 14:46 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 05/27] PCI: tegra: Fix PCIe host power up sequence Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 06/27] PCI: tegra: Add PCIe Gen2 link speed support Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-20 14:32 ` Lorenzo Pieralisi 2019-06-20 14:57 ` Manikanta Maddireddy 2019-06-20 14:57 ` Manikanta Maddireddy 2019-06-20 15:22 ` Lorenzo Pieralisi 2019-06-18 18:01 ` [PATCH V6 07/27] PCI: tegra: Advertise PCIe Advanced Error Reporting (AER) capability Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy [not found] ` <20190618180206.4908-8-mmaddireddy-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-01-15 22:13 ` Nicolas Chauvet [not found] ` <CABr+WTkoj1zk6RRdPvb2wd9HgBJEbPJR=dtY4f+V1gFrEb671A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2020-01-19 10:13 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 08/27] PCI: tegra: Program UPHY electrical settings for Tegra210 Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy [this message] 2019-06-18 18:01 ` [PATCH V6 09/27] PCI: tegra: Enable opportunistic UpdateFC and ACK Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 10/27] PCI: tegra: Disable AFI dynamic clock gating Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 11/27] PCI: tegra: Process pending DLL transactions before entering L1 or L2 Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 12/27] PCI: tegra: Enable PCIe xclk clock clamping Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 13/27] PCI: tegra: Increase the deskew retry time Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 14/27] PCI: tegra: Add SW fixup for RAW violations Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 15/27] PCI: tegra: Update flow control timer frequency in Tegra210 Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 16/27] PCI: tegra: Set target speed as Gen1 before starting LTSSM Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 17/27] PCI: tegra: Fix PLLE power down issue due to CLKREQ# signal Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 18/27] PCI: tegra: Program AFI_CACHE* registers only for Tegra20 Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-20 16:26 ` Lorenzo Pieralisi 2019-06-20 16:35 ` Manikanta Maddireddy 2019-06-20 16:35 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 19/27] PCI: tegra: Change PRSNT_SENSE IRQ log to debug Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 18:01 ` [PATCH V6 20/27] PCI: tegra: Disable MSI for Tegra PCIe root port Manikanta Maddireddy 2019-06-18 18:01 ` Manikanta Maddireddy 2019-06-18 19:48 ` Bjorn Helgaas 2019-06-19 3:55 ` Manikanta Maddireddy 2019-06-19 3:55 ` Manikanta Maddireddy 2019-06-19 9:50 ` Lorenzo Pieralisi 2019-06-18 18:02 ` [PATCH V6 21/27] PCI: tegra: Add AFI_PEX2_CTRL reg offset as part of soc struct Manikanta Maddireddy 2019-06-18 18:02 ` Manikanta Maddireddy 2019-06-18 18:02 ` [PATCH V6 22/27] dt-bindings: pci: tegra: Document PCIe DPD pinctrl optional prop Manikanta Maddireddy 2019-06-18 18:02 ` Manikanta Maddireddy 2019-06-18 18:02 ` [PATCH V6 23/27] arm64: tegra: Add PEX DPD states as pinctrl properties Manikanta Maddireddy 2019-06-18 18:02 ` Manikanta Maddireddy 2019-06-20 10:14 ` Thierry Reding 2019-06-18 18:02 ` [PATCH V6 24/27] PCI: tegra: Put PEX CLK & BIAS pads in DPD mode Manikanta Maddireddy 2019-06-18 18:02 ` Manikanta Maddireddy 2019-06-18 18:02 ` [PATCH V6 25/27] PCI: Add DT binding for "reset-gpios" property Manikanta Maddireddy 2019-06-18 18:02 ` Manikanta Maddireddy 2019-06-18 18:02 ` [PATCH V6 26/27] PCI: tegra: Add support for GPIO based PERST# Manikanta Maddireddy 2019-06-18 18:02 ` Manikanta Maddireddy 2019-07-04 14:48 ` Jon Hunter 2019-07-04 14:48 ` Jon Hunter 2019-07-04 15:29 ` Manikanta Maddireddy 2019-07-04 15:29 ` Manikanta Maddireddy 2019-07-04 17:23 ` Jon Hunter 2019-07-04 17:23 ` Jon Hunter 2019-06-18 18:02 ` [PATCH V6 27/27] PCI: tegra: Change link retry log level to debug Manikanta Maddireddy 2019-06-18 18:02 ` Manikanta Maddireddy 2019-06-20 10:25 ` [PATCH V6 00/27] Enable Tegra PCIe root port features Thierry Reding 2019-06-20 10:53 ` Lorenzo Pieralisi 2019-06-20 11:14 ` Thierry Reding 2019-06-20 16:46 ` Lorenzo Pieralisi 2019-06-20 17:23 ` Manikanta Maddireddy 2019-06-20 17:23 ` Manikanta Maddireddy
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