From: Phong Tran <tranmanphong@gmail.com>
To: tranmanphong@gmail.com
Cc: acme@kernel.org, alexander.shishkin@linux.intel.com,
alexander.sverdlin@gmail.com, allison@lohutok.net,
andrew@lunn.ch, ast@kernel.org, bgolaszewski@baylibre.com,
bpf@vger.kernel.org, daniel@iogearbox.net, daniel@zonque.org,
dmg@turingmachine.org, festevam@gmail.com, gerg@uclinux.org,
gregkh@linuxfoundation.org, gregory.clement@bootlin.com,
haojian.zhuang@gmail.com, hsweeten@visionengravers.com,
illusionist.neo@gmail.com, info@metux.net, jason@lakedaemon.net,
jolsa@redhat.com, kafai@fb.com, kernel@pengutronix.de,
kgene@kernel.org, krzk@kernel.org, kstewart@linuxfoundation.org,
linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com,
linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
linux-samsung-soc@vger.kernel.org, linux@armlinux.org.uk,
liviu.dudau@arm.com, lkundrak@v3.sk, lorenzo.pieralisi@arm.com,
mark.rutland@arm.com, mingo@redhat.com, namhyung@kernel.org,
netdev@vger.kernel.org, nsekhar@ti.com, peterz@infradead.org,
robert.jarzmik@free.fr, s.hauer@pengutronix.de,
sebastian.hesselbarth@gmail.com, shawnguo@kernel.org,
songliubraving@fb.com, sudeep.holla@arm.com, swinslow@gmail.com,
tglx@linutronix.de, tony@atomide.com, will@kernel.org,
yhs@fb.com
Subject: [PATCH V3 03/15] ARM: ep93xx: cleanup cppcheck shifting errors
Date: Tue, 25 Jun 2019 11:03:44 +0700 [thread overview]
Message-ID: <20190625040356.27473-4-tranmanphong@gmail.com> (raw)
In-Reply-To: <20190625040356.27473-1-tranmanphong@gmail.com>
There is error from cppcheck tool
"Shifting signed 32-bit value by 31 bits is undefined behaviour errors"
change to use BIT() marco for improvement.
Signed-off-by: Phong Tran <tranmanphong@gmail.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
---
arch/arm/mach-ep93xx/soc.h | 134 ++++++++++++++++++++++-----------------------
1 file changed, 67 insertions(+), 67 deletions(-)
diff --git a/arch/arm/mach-ep93xx/soc.h b/arch/arm/mach-ep93xx/soc.h
index f2dace1c9154..e580a22ad071 100644
--- a/arch/arm/mach-ep93xx/soc.h
+++ b/arch/arm/mach-ep93xx/soc.h
@@ -109,89 +109,89 @@
#define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x))
#define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00)
#define EP93XX_SYSCON_PWRCNT EP93XX_SYSCON_REG(0x04)
-#define EP93XX_SYSCON_PWRCNT_FIR_EN (1<<31)
-#define EP93XX_SYSCON_PWRCNT_UARTBAUD (1<<29)
-#define EP93XX_SYSCON_PWRCNT_USH_EN (1<<28)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2M1 (1<<27)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2M0 (1<<26)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P8 (1<<25)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P9 (1<<24)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P6 (1<<23)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P7 (1<<22)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P4 (1<<21)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P5 (1<<20)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P2 (1<<19)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P3 (1<<18)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P0 (1<<17)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P1 (1<<16)
+#define EP93XX_SYSCON_PWRCNT_FIR_EN BIT(31)
+#define EP93XX_SYSCON_PWRCNT_UARTBAUD BIT(29)
+#define EP93XX_SYSCON_PWRCNT_USH_EN BIT(28)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2M1 BIT(27)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2M0 BIT(26)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P8 BIT(25)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P9 BIT(24)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P6 BIT(23)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P7 BIT(22)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P4 BIT(21)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P5 BIT(20)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P2 BIT(19)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P3 BIT(18)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P0 BIT(17)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P1 BIT(16)
#define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08)
#define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c)
#define EP93XX_SYSCON_CLKSET1 EP93XX_SYSCON_REG(0x20)
-#define EP93XX_SYSCON_CLKSET1_NBYP1 (1<<23)
+#define EP93XX_SYSCON_CLKSET1_NBYP1 BIT(23)
#define EP93XX_SYSCON_CLKSET2 EP93XX_SYSCON_REG(0x24)
-#define EP93XX_SYSCON_CLKSET2_NBYP2 (1<<19)
-#define EP93XX_SYSCON_CLKSET2_PLL2_EN (1<<18)
+#define EP93XX_SYSCON_CLKSET2_NBYP2 BIT(19)
+#define EP93XX_SYSCON_CLKSET2_PLL2_EN BIT(18)
#define EP93XX_SYSCON_DEVCFG EP93XX_SYSCON_REG(0x80)
-#define EP93XX_SYSCON_DEVCFG_SWRST (1<<31)
-#define EP93XX_SYSCON_DEVCFG_D1ONG (1<<30)
-#define EP93XX_SYSCON_DEVCFG_D0ONG (1<<29)
-#define EP93XX_SYSCON_DEVCFG_IONU2 (1<<28)
-#define EP93XX_SYSCON_DEVCFG_GONK (1<<27)
-#define EP93XX_SYSCON_DEVCFG_TONG (1<<26)
-#define EP93XX_SYSCON_DEVCFG_MONG (1<<25)
-#define EP93XX_SYSCON_DEVCFG_U3EN (1<<24)
-#define EP93XX_SYSCON_DEVCFG_CPENA (1<<23)
-#define EP93XX_SYSCON_DEVCFG_A2ONG (1<<22)
-#define EP93XX_SYSCON_DEVCFG_A1ONG (1<<21)
-#define EP93XX_SYSCON_DEVCFG_U2EN (1<<20)
-#define EP93XX_SYSCON_DEVCFG_EXVC (1<<19)
-#define EP93XX_SYSCON_DEVCFG_U1EN (1<<18)
-#define EP93XX_SYSCON_DEVCFG_TIN (1<<17)
-#define EP93XX_SYSCON_DEVCFG_HC3IN (1<<15)
-#define EP93XX_SYSCON_DEVCFG_HC3EN (1<<14)
-#define EP93XX_SYSCON_DEVCFG_HC1IN (1<<13)
-#define EP93XX_SYSCON_DEVCFG_HC1EN (1<<12)
-#define EP93XX_SYSCON_DEVCFG_HONIDE (1<<11)
-#define EP93XX_SYSCON_DEVCFG_GONIDE (1<<10)
-#define EP93XX_SYSCON_DEVCFG_PONG (1<<9)
-#define EP93XX_SYSCON_DEVCFG_EONIDE (1<<8)
-#define EP93XX_SYSCON_DEVCFG_I2SONSSP (1<<7)
-#define EP93XX_SYSCON_DEVCFG_I2SONAC97 (1<<6)
-#define EP93XX_SYSCON_DEVCFG_RASONP3 (1<<4)
-#define EP93XX_SYSCON_DEVCFG_RAS (1<<3)
-#define EP93XX_SYSCON_DEVCFG_ADCPD (1<<2)
-#define EP93XX_SYSCON_DEVCFG_KEYS (1<<1)
-#define EP93XX_SYSCON_DEVCFG_SHENA (1<<0)
+#define EP93XX_SYSCON_DEVCFG_SWRST BIT(31)
+#define EP93XX_SYSCON_DEVCFG_D1ONG BIT(30)
+#define EP93XX_SYSCON_DEVCFG_D0ONG BIT(29)
+#define EP93XX_SYSCON_DEVCFG_IONU2 BIT(28)
+#define EP93XX_SYSCON_DEVCFG_GONK BIT(27)
+#define EP93XX_SYSCON_DEVCFG_TONG BIT(26)
+#define EP93XX_SYSCON_DEVCFG_MONG BIT(25)
+#define EP93XX_SYSCON_DEVCFG_U3EN BIT(24)
+#define EP93XX_SYSCON_DEVCFG_CPENA BIT(23)
+#define EP93XX_SYSCON_DEVCFG_A2ONG BIT(22)
+#define EP93XX_SYSCON_DEVCFG_A1ONG BIT(21)
+#define EP93XX_SYSCON_DEVCFG_U2EN BIT(20)
+#define EP93XX_SYSCON_DEVCFG_EXVC BIT(19)
+#define EP93XX_SYSCON_DEVCFG_U1EN BIT(18)
+#define EP93XX_SYSCON_DEVCFG_TIN BIT(17)
+#define EP93XX_SYSCON_DEVCFG_HC3IN BIT(15)
+#define EP93XX_SYSCON_DEVCFG_HC3EN BIT(14)
+#define EP93XX_SYSCON_DEVCFG_HC1IN BIT(13)
+#define EP93XX_SYSCON_DEVCFG_HC1EN BIT(12)
+#define EP93XX_SYSCON_DEVCFG_HONIDE BIT(11)
+#define EP93XX_SYSCON_DEVCFG_GONIDE BIT(10)
+#define EP93XX_SYSCON_DEVCFG_PONG BIT(9)
+#define EP93XX_SYSCON_DEVCFG_EONIDE BIT(8)
+#define EP93XX_SYSCON_DEVCFG_I2SONSSP BIT(7)
+#define EP93XX_SYSCON_DEVCFG_I2SONAC97 BIT(6)
+#define EP93XX_SYSCON_DEVCFG_RASONP3 BIT(4)
+#define EP93XX_SYSCON_DEVCFG_RAS BIT(3)
+#define EP93XX_SYSCON_DEVCFG_ADCPD BIT(2)
+#define EP93XX_SYSCON_DEVCFG_KEYS BIT(1)
+#define EP93XX_SYSCON_DEVCFG_SHENA BIT(0)
#define EP93XX_SYSCON_VIDCLKDIV EP93XX_SYSCON_REG(0x84)
-#define EP93XX_SYSCON_CLKDIV_ENABLE (1<<15)
-#define EP93XX_SYSCON_CLKDIV_ESEL (1<<14)
-#define EP93XX_SYSCON_CLKDIV_PSEL (1<<13)
+#define EP93XX_SYSCON_CLKDIV_ENABLE BIT(15)
+#define EP93XX_SYSCON_CLKDIV_ESEL BIT(14)
+#define EP93XX_SYSCON_CLKDIV_PSEL BIT(13)
#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8
#define EP93XX_SYSCON_I2SCLKDIV EP93XX_SYSCON_REG(0x8c)
-#define EP93XX_SYSCON_I2SCLKDIV_SENA (1<<31)
-#define EP93XX_SYSCON_I2SCLKDIV_ORIDE (1<<29)
-#define EP93XX_SYSCON_I2SCLKDIV_SPOL (1<<19)
-#define EP93XX_I2SCLKDIV_SDIV (1 << 16)
+#define EP93XX_SYSCON_I2SCLKDIV_SENA BIT(31)
+#define EP93XX_SYSCON_I2SCLKDIV_ORIDE BIT(29)
+#define EP93XX_SYSCON_I2SCLKDIV_SPOL BIT(19)
+#define EP93XX_I2SCLKDIV_SDIV BIT(16)
#define EP93XX_I2SCLKDIV_LRDIV32 (0 << 17)
#define EP93XX_I2SCLKDIV_LRDIV64 (1 << 17)
#define EP93XX_I2SCLKDIV_LRDIV128 (2 << 17)
#define EP93XX_I2SCLKDIV_LRDIV_MASK (3 << 17)
#define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN BIT(31)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV BIT(16)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN BIT(15)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV BIT(0)
#define EP93XX_SYSCON_SYSCFG EP93XX_SYSCON_REG(0x9c)
#define EP93XX_SYSCON_SYSCFG_REV_MASK (0xf0000000)
#define EP93XX_SYSCON_SYSCFG_REV_SHIFT (28)
-#define EP93XX_SYSCON_SYSCFG_SBOOT (1<<8)
-#define EP93XX_SYSCON_SYSCFG_LCSN7 (1<<7)
-#define EP93XX_SYSCON_SYSCFG_LCSN6 (1<<6)
-#define EP93XX_SYSCON_SYSCFG_LASDO (1<<5)
-#define EP93XX_SYSCON_SYSCFG_LEEDA (1<<4)
-#define EP93XX_SYSCON_SYSCFG_LEECLK (1<<3)
-#define EP93XX_SYSCON_SYSCFG_LCSN2 (1<<1)
-#define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0)
+#define EP93XX_SYSCON_SYSCFG_SBOOT BIT(8)
+#define EP93XX_SYSCON_SYSCFG_LCSN7 BIT(7)
+#define EP93XX_SYSCON_SYSCFG_LCSN6 BIT(6)
+#define EP93XX_SYSCON_SYSCFG_LASDO BIT(5)
+#define EP93XX_SYSCON_SYSCFG_LEEDA BIT(4)
+#define EP93XX_SYSCON_SYSCFG_LEECLK BIT(3)
+#define EP93XX_SYSCON_SYSCFG_LCSN2 BIT(1)
+#define EP93XX_SYSCON_SYSCFG_LCSN1 BIT(0)
#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
/* EP93xx System Controller software locked register write */
--
2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: Phong Tran <tranmanphong@gmail.com>
To: tranmanphong@gmail.com
Cc: acme@kernel.org, alexander.shishkin@linux.intel.com,
alexander.sverdlin@gmail.com, allison@lohutok.net,
andrew@lunn.ch, ast@kernel.org, bgolaszewski@baylibre.com,
bpf@vger.kernel.org, daniel@iogearbox.net, daniel@zonque.org,
dmg@turingmachine.org, festevam@gmail.com, gerg@uclinux.org,
gregkh@linuxfoundation.org, gregory.clement@bootlin.com,
haojian.zhuang@gmail.com, hsweeten@visionengravers.com,
illusionist.neo@gmail.com, info@metux.net, jason@lakedaemon.net,
jolsa@redhat.com, kafai@fb.com, kernel@pengutronix.de,
kgene@kernel.org, krzk@kernel.org, kstewart@linuxfoundation.org,
linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com,
linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
linux-samsung-soc@vger.kernel.org, linux@armlinux.org.uk,
liviu.dudau@arm.com, lkundrak@v3.sk
Subject: [PATCH V3 03/15] ARM: ep93xx: cleanup cppcheck shifting errors
Date: Tue, 25 Jun 2019 11:03:44 +0700 [thread overview]
Message-ID: <20190625040356.27473-4-tranmanphong@gmail.com> (raw)
In-Reply-To: <20190625040356.27473-1-tranmanphong@gmail.com>
There is error from cppcheck tool
"Shifting signed 32-bit value by 31 bits is undefined behaviour errors"
change to use BIT() marco for improvement.
Signed-off-by: Phong Tran <tranmanphong@gmail.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
---
arch/arm/mach-ep93xx/soc.h | 134 ++++++++++++++++++++++-----------------------
1 file changed, 67 insertions(+), 67 deletions(-)
diff --git a/arch/arm/mach-ep93xx/soc.h b/arch/arm/mach-ep93xx/soc.h
index f2dace1c9154..e580a22ad071 100644
--- a/arch/arm/mach-ep93xx/soc.h
+++ b/arch/arm/mach-ep93xx/soc.h
@@ -109,89 +109,89 @@
#define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x))
#define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00)
#define EP93XX_SYSCON_PWRCNT EP93XX_SYSCON_REG(0x04)
-#define EP93XX_SYSCON_PWRCNT_FIR_EN (1<<31)
-#define EP93XX_SYSCON_PWRCNT_UARTBAUD (1<<29)
-#define EP93XX_SYSCON_PWRCNT_USH_EN (1<<28)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2M1 (1<<27)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2M0 (1<<26)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P8 (1<<25)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P9 (1<<24)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P6 (1<<23)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P7 (1<<22)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P4 (1<<21)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P5 (1<<20)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P2 (1<<19)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P3 (1<<18)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P0 (1<<17)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P1 (1<<16)
+#define EP93XX_SYSCON_PWRCNT_FIR_EN BIT(31)
+#define EP93XX_SYSCON_PWRCNT_UARTBAUD BIT(29)
+#define EP93XX_SYSCON_PWRCNT_USH_EN BIT(28)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2M1 BIT(27)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2M0 BIT(26)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P8 BIT(25)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P9 BIT(24)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P6 BIT(23)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P7 BIT(22)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P4 BIT(21)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P5 BIT(20)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P2 BIT(19)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P3 BIT(18)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P0 BIT(17)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P1 BIT(16)
#define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08)
#define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c)
#define EP93XX_SYSCON_CLKSET1 EP93XX_SYSCON_REG(0x20)
-#define EP93XX_SYSCON_CLKSET1_NBYP1 (1<<23)
+#define EP93XX_SYSCON_CLKSET1_NBYP1 BIT(23)
#define EP93XX_SYSCON_CLKSET2 EP93XX_SYSCON_REG(0x24)
-#define EP93XX_SYSCON_CLKSET2_NBYP2 (1<<19)
-#define EP93XX_SYSCON_CLKSET2_PLL2_EN (1<<18)
+#define EP93XX_SYSCON_CLKSET2_NBYP2 BIT(19)
+#define EP93XX_SYSCON_CLKSET2_PLL2_EN BIT(18)
#define EP93XX_SYSCON_DEVCFG EP93XX_SYSCON_REG(0x80)
-#define EP93XX_SYSCON_DEVCFG_SWRST (1<<31)
-#define EP93XX_SYSCON_DEVCFG_D1ONG (1<<30)
-#define EP93XX_SYSCON_DEVCFG_D0ONG (1<<29)
-#define EP93XX_SYSCON_DEVCFG_IONU2 (1<<28)
-#define EP93XX_SYSCON_DEVCFG_GONK (1<<27)
-#define EP93XX_SYSCON_DEVCFG_TONG (1<<26)
-#define EP93XX_SYSCON_DEVCFG_MONG (1<<25)
-#define EP93XX_SYSCON_DEVCFG_U3EN (1<<24)
-#define EP93XX_SYSCON_DEVCFG_CPENA (1<<23)
-#define EP93XX_SYSCON_DEVCFG_A2ONG (1<<22)
-#define EP93XX_SYSCON_DEVCFG_A1ONG (1<<21)
-#define EP93XX_SYSCON_DEVCFG_U2EN (1<<20)
-#define EP93XX_SYSCON_DEVCFG_EXVC (1<<19)
-#define EP93XX_SYSCON_DEVCFG_U1EN (1<<18)
-#define EP93XX_SYSCON_DEVCFG_TIN (1<<17)
-#define EP93XX_SYSCON_DEVCFG_HC3IN (1<<15)
-#define EP93XX_SYSCON_DEVCFG_HC3EN (1<<14)
-#define EP93XX_SYSCON_DEVCFG_HC1IN (1<<13)
-#define EP93XX_SYSCON_DEVCFG_HC1EN (1<<12)
-#define EP93XX_SYSCON_DEVCFG_HONIDE (1<<11)
-#define EP93XX_SYSCON_DEVCFG_GONIDE (1<<10)
-#define EP93XX_SYSCON_DEVCFG_PONG (1<<9)
-#define EP93XX_SYSCON_DEVCFG_EONIDE (1<<8)
-#define EP93XX_SYSCON_DEVCFG_I2SONSSP (1<<7)
-#define EP93XX_SYSCON_DEVCFG_I2SONAC97 (1<<6)
-#define EP93XX_SYSCON_DEVCFG_RASONP3 (1<<4)
-#define EP93XX_SYSCON_DEVCFG_RAS (1<<3)
-#define EP93XX_SYSCON_DEVCFG_ADCPD (1<<2)
-#define EP93XX_SYSCON_DEVCFG_KEYS (1<<1)
-#define EP93XX_SYSCON_DEVCFG_SHENA (1<<0)
+#define EP93XX_SYSCON_DEVCFG_SWRST BIT(31)
+#define EP93XX_SYSCON_DEVCFG_D1ONG BIT(30)
+#define EP93XX_SYSCON_DEVCFG_D0ONG BIT(29)
+#define EP93XX_SYSCON_DEVCFG_IONU2 BIT(28)
+#define EP93XX_SYSCON_DEVCFG_GONK BIT(27)
+#define EP93XX_SYSCON_DEVCFG_TONG BIT(26)
+#define EP93XX_SYSCON_DEVCFG_MONG BIT(25)
+#define EP93XX_SYSCON_DEVCFG_U3EN BIT(24)
+#define EP93XX_SYSCON_DEVCFG_CPENA BIT(23)
+#define EP93XX_SYSCON_DEVCFG_A2ONG BIT(22)
+#define EP93XX_SYSCON_DEVCFG_A1ONG BIT(21)
+#define EP93XX_SYSCON_DEVCFG_U2EN BIT(20)
+#define EP93XX_SYSCON_DEVCFG_EXVC BIT(19)
+#define EP93XX_SYSCON_DEVCFG_U1EN BIT(18)
+#define EP93XX_SYSCON_DEVCFG_TIN BIT(17)
+#define EP93XX_SYSCON_DEVCFG_HC3IN BIT(15)
+#define EP93XX_SYSCON_DEVCFG_HC3EN BIT(14)
+#define EP93XX_SYSCON_DEVCFG_HC1IN BIT(13)
+#define EP93XX_SYSCON_DEVCFG_HC1EN BIT(12)
+#define EP93XX_SYSCON_DEVCFG_HONIDE BIT(11)
+#define EP93XX_SYSCON_DEVCFG_GONIDE BIT(10)
+#define EP93XX_SYSCON_DEVCFG_PONG BIT(9)
+#define EP93XX_SYSCON_DEVCFG_EONIDE BIT(8)
+#define EP93XX_SYSCON_DEVCFG_I2SONSSP BIT(7)
+#define EP93XX_SYSCON_DEVCFG_I2SONAC97 BIT(6)
+#define EP93XX_SYSCON_DEVCFG_RASONP3 BIT(4)
+#define EP93XX_SYSCON_DEVCFG_RAS BIT(3)
+#define EP93XX_SYSCON_DEVCFG_ADCPD BIT(2)
+#define EP93XX_SYSCON_DEVCFG_KEYS BIT(1)
+#define EP93XX_SYSCON_DEVCFG_SHENA BIT(0)
#define EP93XX_SYSCON_VIDCLKDIV EP93XX_SYSCON_REG(0x84)
-#define EP93XX_SYSCON_CLKDIV_ENABLE (1<<15)
-#define EP93XX_SYSCON_CLKDIV_ESEL (1<<14)
-#define EP93XX_SYSCON_CLKDIV_PSEL (1<<13)
+#define EP93XX_SYSCON_CLKDIV_ENABLE BIT(15)
+#define EP93XX_SYSCON_CLKDIV_ESEL BIT(14)
+#define EP93XX_SYSCON_CLKDIV_PSEL BIT(13)
#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8
#define EP93XX_SYSCON_I2SCLKDIV EP93XX_SYSCON_REG(0x8c)
-#define EP93XX_SYSCON_I2SCLKDIV_SENA (1<<31)
-#define EP93XX_SYSCON_I2SCLKDIV_ORIDE (1<<29)
-#define EP93XX_SYSCON_I2SCLKDIV_SPOL (1<<19)
-#define EP93XX_I2SCLKDIV_SDIV (1 << 16)
+#define EP93XX_SYSCON_I2SCLKDIV_SENA BIT(31)
+#define EP93XX_SYSCON_I2SCLKDIV_ORIDE BIT(29)
+#define EP93XX_SYSCON_I2SCLKDIV_SPOL BIT(19)
+#define EP93XX_I2SCLKDIV_SDIV BIT(16)
#define EP93XX_I2SCLKDIV_LRDIV32 (0 << 17)
#define EP93XX_I2SCLKDIV_LRDIV64 (1 << 17)
#define EP93XX_I2SCLKDIV_LRDIV128 (2 << 17)
#define EP93XX_I2SCLKDIV_LRDIV_MASK (3 << 17)
#define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN BIT(31)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV BIT(16)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN BIT(15)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV BIT(0)
#define EP93XX_SYSCON_SYSCFG EP93XX_SYSCON_REG(0x9c)
#define EP93XX_SYSCON_SYSCFG_REV_MASK (0xf0000000)
#define EP93XX_SYSCON_SYSCFG_REV_SHIFT (28)
-#define EP93XX_SYSCON_SYSCFG_SBOOT (1<<8)
-#define EP93XX_SYSCON_SYSCFG_LCSN7 (1<<7)
-#define EP93XX_SYSCON_SYSCFG_LCSN6 (1<<6)
-#define EP93XX_SYSCON_SYSCFG_LASDO (1<<5)
-#define EP93XX_SYSCON_SYSCFG_LEEDA (1<<4)
-#define EP93XX_SYSCON_SYSCFG_LEECLK (1<<3)
-#define EP93XX_SYSCON_SYSCFG_LCSN2 (1<<1)
-#define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0)
+#define EP93XX_SYSCON_SYSCFG_SBOOT BIT(8)
+#define EP93XX_SYSCON_SYSCFG_LCSN7 BIT(7)
+#define EP93XX_SYSCON_SYSCFG_LCSN6 BIT(6)
+#define EP93XX_SYSCON_SYSCFG_LASDO BIT(5)
+#define EP93XX_SYSCON_SYSCFG_LEEDA BIT(4)
+#define EP93XX_SYSCON_SYSCFG_LEECLK BIT(3)
+#define EP93XX_SYSCON_SYSCFG_LCSN2 BIT(1)
+#define EP93XX_SYSCON_SYSCFG_LCSN1 BIT(0)
#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
/* EP93xx System Controller software locked register write */
--
2.11.0
next prev parent reply other threads:[~2019-06-25 4:04 UTC|newest]
Thread overview: 134+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-23 15:12 [PATCH 00/15] cleanup cppcheck signed shifting errors Phong Tran
2019-06-23 15:12 ` Phong Tran
2019-06-23 15:12 ` [PATCH 01/15] arm: perf: cleanup cppcheck shifting error Phong Tran
2019-06-23 15:12 ` Phong Tran
2019-06-24 7:11 ` Peter Zijlstra
2019-06-24 7:11 ` Peter Zijlstra
2019-06-23 15:13 ` [PATCH 02/15] ARM: davinci: cleanup cppcheck shifting errors Phong Tran
2019-06-23 15:13 ` Phong Tran
2019-06-23 15:13 ` [PATCH 03/15] ARM: ep93xx: " Phong Tran
2019-06-23 15:13 ` Phong Tran
2019-06-23 15:23 ` Alexander Sverdlin
2019-06-23 15:23 ` Alexander Sverdlin
2019-06-23 15:13 ` [PATCH 04/15] ARM: exynos: cleanup cppcheck shifting error Phong Tran
2019-06-23 15:13 ` Phong Tran
2019-06-23 19:12 ` Krzysztof Kozlowski
2019-06-23 19:12 ` Krzysztof Kozlowski
2019-06-23 15:13 ` [PATCH 05/15] ARM: footbridge: " Phong Tran
2019-06-23 15:13 ` Phong Tran
2019-06-23 15:13 ` [PATCH 06/15] ARM: imx: cleanup cppcheck shifting errors Phong Tran
2019-06-23 15:13 ` Phong Tran
2019-06-24 3:16 ` Shawn Guo
2019-06-24 3:16 ` Shawn Guo
2019-06-23 15:13 ` [PATCH 07/15] ARM: ks8695: cleanup cppcheck shifting error Phong Tran
2019-06-23 15:13 ` Phong Tran
2019-06-23 15:13 ` [PATCH 08/15] ARM: mmp: cleanup cppcheck shifting errors Phong Tran
2019-06-23 15:13 ` Phong Tran
2019-06-24 7:35 ` Lubomir Rintel
2019-06-24 7:35 ` Lubomir Rintel
2019-06-23 15:13 ` [PATCH 09/15] ARM: omap2: cleanup cppcheck shifting error Phong Tran
2019-06-23 15:13 ` Phong Tran
2019-06-23 15:13 ` [PATCH 10/15] ARM: orion5x: cleanup cppcheck shifting errors Phong Tran
2019-06-23 15:13 ` Phong Tran
2019-06-23 15:23 ` Andrew Lunn
2019-06-23 15:23 ` Andrew Lunn
2019-06-24 7:31 ` Gregory CLEMENT
2019-06-24 7:31 ` Gregory CLEMENT
2019-06-23 15:13 ` [PATCH 11/15] ARM: pxa: " Phong Tran
2019-06-23 15:13 ` Phong Tran
2019-06-23 15:13 ` [PATCH 12/15] ARM: vexpress: cleanup cppcheck shifting error Phong Tran
2019-06-23 15:13 ` Phong Tran
2019-06-23 15:13 ` [PATCH 13/15] ARM: mm: cleanup cppcheck shifting errors Phong Tran
2019-06-23 15:13 ` Phong Tran
2019-06-23 15:13 ` [PATCH 14/15] ARM: bpf: cleanup cppcheck shifting error Phong Tran
2019-06-23 15:13 ` Phong Tran
2019-06-23 15:13 ` [PATCH 15/15] ARM: vfp: cleanup cppcheck shifting errors Phong Tran
2019-06-23 15:13 ` Phong Tran
2019-06-24 13:50 ` [PATCH V2 00/15] cleanup cppcheck signed " Phong Tran
2019-06-24 13:50 ` Phong Tran
2019-06-24 13:50 ` [PATCH V2 01/15] arm: perf: cleanup cppcheck shifting error Phong Tran
2019-06-24 13:50 ` Phong Tran
2019-06-24 13:50 ` [PATCH V2 02/15] ARM: davinci: cleanup cppcheck shifting errors Phong Tran
2019-06-24 13:50 ` Phong Tran
2019-06-24 13:50 ` [PATCH V2 03/15] ARM: ep93xx: " Phong Tran
2019-06-24 13:50 ` Phong Tran
2019-06-24 19:16 ` Alexander Sverdlin
2019-06-24 19:16 ` Alexander Sverdlin
2019-06-24 13:50 ` [PATCH V2 04/15] ARM: exynos: cleanup cppcheck shifting error Phong Tran
2019-06-24 13:50 ` Phong Tran
2019-06-24 13:58 ` Russell King - ARM Linux admin
2019-06-24 13:58 ` Russell King - ARM Linux admin
2019-06-24 13:50 ` [PATCH V2 05/15] ARM: footbridge: " Phong Tran
2019-06-24 13:50 ` Phong Tran
2019-06-24 13:50 ` [PATCH V2 06/15] ARM: imx: cleanup cppcheck shifting errors Phong Tran
2019-06-24 13:50 ` Phong Tran
2019-06-24 13:50 ` [PATCH V2 07/15] ARM: ks8695: cleanup cppcheck shifting error Phong Tran
2019-06-24 13:50 ` Phong Tran
2019-06-24 13:50 ` [PATCH V2 08/15] ARM: mmp: cleanup cppcheck shifting errors Phong Tran
2019-06-24 13:50 ` Phong Tran
2019-06-24 13:59 ` Russell King - ARM Linux admin
2019-06-24 13:59 ` Russell King - ARM Linux admin
2019-06-24 13:50 ` [PATCH V2 09/15] ARM: omap2: cleanup cppcheck shifting error Phong Tran
2019-06-24 13:50 ` Phong Tran
2019-06-24 13:51 ` [PATCH V2 10/15] ARM: orion5x: cleanup cppcheck shifting errors Phong Tran
2019-06-24 13:51 ` Phong Tran
2019-06-24 13:54 ` Andrew Lunn
2019-06-24 13:54 ` Andrew Lunn
2019-06-24 13:51 ` [PATCH V2 11/15] ARM: pxa: " Phong Tran
2019-06-24 13:51 ` Phong Tran
2019-06-24 13:51 ` [PATCH V2 12/15] ARM: vexpress: cleanup cppcheck shifting error Phong Tran
2019-06-24 13:51 ` Phong Tran
2019-06-24 13:57 ` Russell King - ARM Linux admin
2019-06-24 13:57 ` Russell King - ARM Linux admin
2019-06-24 13:51 ` [PATCH V2 13/15] ARM: mm: cleanup cppcheck shifting errors Phong Tran
2019-06-24 13:51 ` Phong Tran
2019-06-24 13:51 ` [PATCH V2 14/15] ARM: bpf: cleanup cppcheck shifting error Phong Tran
2019-06-24 13:51 ` Phong Tran
2019-06-24 14:00 ` Russell King - ARM Linux admin
2019-06-24 14:00 ` Russell King - ARM Linux admin
2019-06-24 13:51 ` [PATCH V2 15/15] ARM: vfp: cleanup cppcheck shifting errors Phong Tran
2019-06-24 13:51 ` Phong Tran
2019-06-24 14:02 ` [PATCH V2 00/15] cleanup cppcheck signed " Russell King - ARM Linux admin
2019-06-24 14:02 ` Russell King - ARM Linux admin
2019-06-24 15:27 ` Peter Zijlstra
2019-06-24 15:27 ` Peter Zijlstra
2019-06-24 15:28 ` Peter Zijlstra
2019-06-24 15:28 ` Peter Zijlstra
2019-06-25 4:03 ` [PATCH V3 " Phong Tran
2019-06-25 4:03 ` Phong Tran
2019-06-25 4:03 ` [PATCH V3 01/15] arm: perf: cleanup cppcheck shifting error Phong Tran
2019-06-25 4:03 ` Phong Tran
2019-06-25 17:21 ` Will Deacon
2019-06-25 17:21 ` Will Deacon
2019-06-25 4:03 ` [PATCH V3 02/15] ARM: davinci: cleanup cppcheck shifting errors Phong Tran
2019-06-25 4:03 ` Phong Tran
2019-06-25 4:03 ` Phong Tran [this message]
2019-06-25 4:03 ` [PATCH V3 03/15] ARM: ep93xx: " Phong Tran
2019-06-25 4:03 ` [PATCH V3 04/15] ARM: exynos: cleanup cppcheck shifting error Phong Tran
2019-06-25 4:03 ` Phong Tran
2019-06-25 18:49 ` Krzysztof Kozlowski
2019-06-25 18:49 ` Krzysztof Kozlowski
2019-06-25 4:03 ` [PATCH V3 05/15] ARM: footbridge: " Phong Tran
2019-06-25 4:03 ` Phong Tran
2019-06-25 4:03 ` [PATCH V3 06/15] ARM: imx: cleanup cppcheck shifting errors Phong Tran
2019-06-25 4:03 ` Phong Tran
2019-06-25 4:03 ` [PATCH V3 07/15] ARM: ks8695: cleanup cppcheck shifting error Phong Tran
2019-06-25 4:03 ` Phong Tran
2019-06-25 4:03 ` [PATCH V3 08/15] ARM: mmp: cleanup cppcheck shifting errors Phong Tran
2019-06-25 4:03 ` Phong Tran
2019-06-25 4:03 ` [PATCH V3 09/15] ARM: omap2: cleanup cppcheck shifting error Phong Tran
2019-06-25 4:03 ` Phong Tran
2019-06-25 4:03 ` [PATCH V3 10/15] ARM: orion5x: cleanup cppcheck shifting errors Phong Tran
2019-06-25 4:03 ` Phong Tran
2019-06-25 4:03 ` [PATCH V3 11/15] ARM: pxa: " Phong Tran
2019-06-25 4:03 ` Phong Tran
2019-06-25 4:03 ` [PATCH V3 12/15] ARM: vexpress: cleanup cppcheck shifting error Phong Tran
2019-06-25 4:03 ` Phong Tran
2019-06-25 17:24 ` Sudeep Holla
2019-06-25 17:24 ` Sudeep Holla
2019-06-25 4:03 ` [PATCH V3 13/15] ARM: mm: cleanup cppcheck shifting errors Phong Tran
2019-06-25 4:03 ` Phong Tran
2019-06-25 4:03 ` [PATCH V3 14/15] ARM: bpf: cleanup cppcheck shifting error Phong Tran
2019-06-25 4:03 ` Phong Tran
2019-06-25 4:03 ` [PATCH V3 15/15] ARM: vfp: cleanup cppcheck shifting errors Phong Tran
2019-06-25 4:03 ` Phong Tran
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190625040356.27473-4-tranmanphong@gmail.com \
--to=tranmanphong@gmail.com \
--cc=acme@kernel.org \
--cc=alexander.shishkin@linux.intel.com \
--cc=alexander.sverdlin@gmail.com \
--cc=allison@lohutok.net \
--cc=andrew@lunn.ch \
--cc=ast@kernel.org \
--cc=bgolaszewski@baylibre.com \
--cc=bpf@vger.kernel.org \
--cc=daniel@iogearbox.net \
--cc=daniel@zonque.org \
--cc=dmg@turingmachine.org \
--cc=festevam@gmail.com \
--cc=gerg@uclinux.org \
--cc=gregkh@linuxfoundation.org \
--cc=gregory.clement@bootlin.com \
--cc=haojian.zhuang@gmail.com \
--cc=hsweeten@visionengravers.com \
--cc=illusionist.neo@gmail.com \
--cc=info@metux.net \
--cc=jason@lakedaemon.net \
--cc=jolsa@redhat.com \
--cc=kafai@fb.com \
--cc=kernel@pengutronix.de \
--cc=kgene@kernel.org \
--cc=krzk@kernel.org \
--cc=kstewart@linuxfoundation.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-imx@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-omap@vger.kernel.org \
--cc=linux-samsung-soc@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=liviu.dudau@arm.com \
--cc=lkundrak@v3.sk \
--cc=lorenzo.pieralisi@arm.com \
--cc=mark.rutland@arm.com \
--cc=mingo@redhat.com \
--cc=namhyung@kernel.org \
--cc=netdev@vger.kernel.org \
--cc=nsekhar@ti.com \
--cc=peterz@infradead.org \
--cc=robert.jarzmik@free.fr \
--cc=s.hauer@pengutronix.de \
--cc=sebastian.hesselbarth@gmail.com \
--cc=shawnguo@kernel.org \
--cc=songliubraving@fb.com \
--cc=sudeep.holla@arm.com \
--cc=swinslow@gmail.com \
--cc=tglx@linutronix.de \
--cc=tony@atomide.com \
--cc=will@kernel.org \
--cc=yhs@fb.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.