From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Subject: [PATCH 14/14] drm/i915/tgl: initialize TC and TBT ports
Date: Fri, 13 Sep 2019 15:32:51 -0700 [thread overview]
Message-ID: <20190913223251.354877-15-jose.souza@intel.com> (raw)
In-Reply-To: <20190913223251.354877-1-jose.souza@intel.com>
From: Lucas De Marchi <lucas.demarchi@intel.com>
Now that TC support was added, initialize DDIs.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index cd0a248bfe49..5c52c04fef7b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15387,9 +15387,14 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
intel_tc_init(dev_priv);
if (INTEL_GEN(dev_priv) >= 12) {
- /* TODO: initialize TC ports as well */
intel_ddi_init(dev_priv, PORT_A);
intel_ddi_init(dev_priv, PORT_B);
+ intel_ddi_init(dev_priv, PORT_D);
+ intel_ddi_init(dev_priv, PORT_E);
+ intel_ddi_init(dev_priv, PORT_F);
+ intel_ddi_init(dev_priv, PORT_G);
+ intel_ddi_init(dev_priv, PORT_H);
+ intel_ddi_init(dev_priv, PORT_I);
icl_dsi_init(dev_priv);
} else if (IS_ELKHARTLAKE(dev_priv)) {
intel_ddi_init(dev_priv, PORT_A);
--
2.23.0
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next prev parent reply other threads:[~2019-09-13 22:32 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-13 22:32 [PATCH 00/14] TGL TC enabling José Roberto de Souza
2019-09-13 22:32 ` [PATCH 01/14] drm/i915/tgl: Add missing ddi clock select during DP init sequence José Roberto de Souza
2019-09-13 22:32 ` [PATCH 02/14] drm/i915/tgl: TC helper function to return pin mapping José Roberto de Souza
2019-09-14 5:54 ` Lucas De Marchi
2019-09-17 21:15 ` Souza, Jose
2019-09-13 22:32 ` [PATCH 03/14] drm/i915/tgl: Finish modular FIA support on registers José Roberto de Souza
2019-09-14 6:24 ` Lucas De Marchi
2019-09-18 1:08 ` Souza, Jose
2019-09-13 22:32 ` [PATCH 04/14] drm/i915/tgl: Fix driver crash when update_active_dpll is called José Roberto de Souza
2019-09-14 6:32 ` Lucas De Marchi
2019-09-17 22:59 ` Souza, Jose
2019-09-13 22:32 ` [PATCH 05/14] drm/i915/tgl: Add dkl phy registers José Roberto de Souza
2019-09-13 22:32 ` [PATCH 06/14] drm/i915/tgl: Add initial dkl pll support José Roberto de Souza
2019-09-13 22:32 ` [PATCH 07/14] drm/i915/tgl: Add support for dkl pll write José Roberto de Souza
2019-09-14 6:41 ` Lucas De Marchi
2019-09-16 8:48 ` Jani Nikula
2019-09-13 22:32 ` [PATCH 08/14] drm/i915/tgl: Add dkl phy programming sequences José Roberto de Souza
2019-09-13 22:32 ` [PATCH 09/14] drm/i915/icl: Unify disable and enable phy clock gating functions José Roberto de Souza
2019-09-13 22:32 ` [PATCH 10/14] drm/i915/tgl: Fix dkl phy register space addressing José Roberto de Souza
2019-09-14 7:26 ` Lucas De Marchi
2019-09-18 19:55 ` Souza, Jose
2019-09-13 22:32 ` [PATCH 11/14] drm/i915/tgl: Check the UC health of tc controllers after power on José Roberto de Souza
2019-09-13 22:32 ` [PATCH 12/14] drm/i915: Add dkl phy pll calculations José Roberto de Souza
2019-09-14 7:38 ` Lucas De Marchi
2019-09-13 22:32 ` [PATCH 13/14] drm/i915/tgl: Use dkl pll hardcoded values José Roberto de Souza
2019-09-13 22:32 ` José Roberto de Souza [this message]
2019-09-13 22:53 ` ✗ Fi.CI.CHECKPATCH: warning for TGL TC enabling Patchwork
2019-09-13 23:12 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-15 7:07 ` ✓ Fi.CI.IGT: " Patchwork
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