From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Souza, Jose" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✓ Fi.CI.BAT: success for TGL TC enabling
Date: Fri, 13 Sep 2019 23:12:46 -0000 [thread overview]
Message-ID: <20190913231246.32425.17679@emeril.freedesktop.org> (raw)
In-Reply-To: <20190913223251.354877-1-jose.souza@intel.com>
== Series Details ==
Series: TGL TC enabling
URL : https://patchwork.freedesktop.org/series/66695/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6894 -> Patchwork_14410
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14410/
Known issues
------------
Here are the changes found in Patchwork_14410 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_cpu_reloc@basic:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6894/fi-icl-u3/igt@gem_cpu_reloc@basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14410/fi-icl-u3/igt@gem_cpu_reloc@basic.html
* igt@i915_module_load@reload:
- fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724] / [fdo#111214])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6894/fi-icl-u3/igt@i915_module_load@reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14410/fi-icl-u3/igt@i915_module_load@reload.html
* igt@i915_selftest@live_execlists:
- fi-skl-gvtdvm: [PASS][5] -> [DMESG-FAIL][6] ([fdo#111108])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6894/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14410/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [PASS][7] -> [DMESG-WARN][8] ([fdo#102614])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6894/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14410/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
#### Possible fixes ####
* igt@gem_ctx_switch@legacy-render:
- {fi-icl-guc}: [INCOMPLETE][9] ([fdo#107713] / [fdo#111381]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6894/fi-icl-guc/igt@gem_ctx_switch@legacy-render.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14410/fi-icl-guc/igt@gem_ctx_switch@legacy-render.html
* igt@gem_mmap_gtt@basic-write-cpu-read-gtt:
- fi-icl-u3: [DMESG-WARN][11] ([fdo#107724]) -> [PASS][12] +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6894/fi-icl-u3/igt@gem_mmap_gtt@basic-write-cpu-read-gtt.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14410/fi-icl-u3/igt@gem_mmap_gtt@basic-write-cpu-read-gtt.html
* igt@kms_chamelium@hdmi-crc-fast:
- fi-icl-u2: [FAIL][13] ([fdo#109635 ]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6894/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14410/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html
#### Warnings ####
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][15] ([fdo#111096]) -> [FAIL][16] ([fdo#111407])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6894/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14410/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#109635 ]: https://bugs.freedesktop.org/show_bug.cgi?id=109635
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111108]: https://bugs.freedesktop.org/show_bug.cgi?id=111108
[fdo#111214]: https://bugs.freedesktop.org/show_bug.cgi?id=111214
[fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[fdo#111562]: https://bugs.freedesktop.org/show_bug.cgi?id=111562
[fdo#111597]: https://bugs.freedesktop.org/show_bug.cgi?id=111597
Participating hosts (54 -> 47)
------------------------------
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6894 -> Patchwork_14410
CI-20190529: 20190529
CI_DRM_6894: a323fd657c577491b1660662624bac36bb964222 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5182: f7104497049e3761ac297b66fd5586849b3cfcc8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14410: 2a0737c7916fe702fca52471d012f9af5032ccb6 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
2a0737c7916f drm/i915/tgl: initialize TC and TBT ports
e15b18d1f053 drm/i915/tgl: Use dkl pll hardcoded values
c375eb564833 drm/i915: Add dkl phy pll calculations
e00f55852bed drm/i915/tgl: Check the UC health of tc controllers after power on
a1c3093ee5cd drm/i915/tgl: Fix dkl phy register space addressing
9a8c52b002c1 drm/i915/icl: Unify disable and enable phy clock gating functions
777ae3564243 drm/i915/tgl: Add dkl phy programming sequences
5d7cf4a2d9b6 drm/i915/tgl: Add support for dkl pll write
fb5057c3fd44 drm/i915/tgl: Add initial dkl pll support
77a194507dda drm/i915/tgl: Add dkl phy registers
675571336c4f drm/i915/tgl: Fix driver crash when update_active_dpll is called
9c066f860365 drm/i915/tgl: Finish modular FIA support on registers
6a06996e8b87 drm/i915/tgl: TC helper function to return pin mapping
aa9a2d4bd5f2 drm/i915/tgl: Add missing ddi clock select during DP init sequence
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14410/index.html
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next prev parent reply other threads:[~2019-09-13 23:12 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-13 22:32 [PATCH 00/14] TGL TC enabling José Roberto de Souza
2019-09-13 22:32 ` [PATCH 01/14] drm/i915/tgl: Add missing ddi clock select during DP init sequence José Roberto de Souza
2019-09-13 22:32 ` [PATCH 02/14] drm/i915/tgl: TC helper function to return pin mapping José Roberto de Souza
2019-09-14 5:54 ` Lucas De Marchi
2019-09-17 21:15 ` Souza, Jose
2019-09-13 22:32 ` [PATCH 03/14] drm/i915/tgl: Finish modular FIA support on registers José Roberto de Souza
2019-09-14 6:24 ` Lucas De Marchi
2019-09-18 1:08 ` Souza, Jose
2019-09-13 22:32 ` [PATCH 04/14] drm/i915/tgl: Fix driver crash when update_active_dpll is called José Roberto de Souza
2019-09-14 6:32 ` Lucas De Marchi
2019-09-17 22:59 ` Souza, Jose
2019-09-13 22:32 ` [PATCH 05/14] drm/i915/tgl: Add dkl phy registers José Roberto de Souza
2019-09-13 22:32 ` [PATCH 06/14] drm/i915/tgl: Add initial dkl pll support José Roberto de Souza
2019-09-13 22:32 ` [PATCH 07/14] drm/i915/tgl: Add support for dkl pll write José Roberto de Souza
2019-09-14 6:41 ` Lucas De Marchi
2019-09-16 8:48 ` Jani Nikula
2019-09-13 22:32 ` [PATCH 08/14] drm/i915/tgl: Add dkl phy programming sequences José Roberto de Souza
2019-09-13 22:32 ` [PATCH 09/14] drm/i915/icl: Unify disable and enable phy clock gating functions José Roberto de Souza
2019-09-13 22:32 ` [PATCH 10/14] drm/i915/tgl: Fix dkl phy register space addressing José Roberto de Souza
2019-09-14 7:26 ` Lucas De Marchi
2019-09-18 19:55 ` Souza, Jose
2019-09-13 22:32 ` [PATCH 11/14] drm/i915/tgl: Check the UC health of tc controllers after power on José Roberto de Souza
2019-09-13 22:32 ` [PATCH 12/14] drm/i915: Add dkl phy pll calculations José Roberto de Souza
2019-09-14 7:38 ` Lucas De Marchi
2019-09-13 22:32 ` [PATCH 13/14] drm/i915/tgl: Use dkl pll hardcoded values José Roberto de Souza
2019-09-13 22:32 ` [PATCH 14/14] drm/i915/tgl: initialize TC and TBT ports José Roberto de Souza
2019-09-13 22:53 ` ✗ Fi.CI.CHECKPATCH: warning for TGL TC enabling Patchwork
2019-09-13 23:12 ` Patchwork [this message]
2019-09-15 7:07 ` ✓ Fi.CI.IGT: success " Patchwork
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