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From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH CI 0/6] TGL TC enabling v2-CI
Date: Fri, 20 Sep 2019 13:58:04 -0700	[thread overview]
Message-ID: <20190920205810.211048-1-jose.souza@intel.com> (raw)

Patches from https://patchwork.freedesktop.org/series/66695/#rev2
that got rv-b and don't have dependencies over other patches, for
CI testing.

Clinton A Taylor (2):
  drm/i915/tgl: Add missing ddi clock select during DP init sequence
  drm/i915/tgl/pll: Set update_active_dpll

José Roberto de Souza (3):
  drm/i915/tgl: Finish modular FIA support on registers
  drm/i915/icl: Unify disable and enable phy clock gating functions
  drm/i915/tgl: Check the UC health of tc controllers after power on

Vandita Kulkarni (1):
  drm/i915/tgl: Add dkl phy registers

 drivers/gpu/drm/i915/display/intel_ddi.c      |  78 +++----
 .../drm/i915/display/intel_display_power.c    |  13 ++
 .../drm/i915/display/intel_display_types.h    |   1 +
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c |   1 +
 drivers/gpu/drm/i915/display/intel_tc.c       |  72 +++----
 drivers/gpu/drm/i915/i915_reg.h               | 190 ++++++++++++++++--
 6 files changed, 256 insertions(+), 99 deletions(-)

-- 
2.23.0

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             reply	other threads:[~2019-09-20 20:58 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-20 20:58 José Roberto de Souza [this message]
2019-09-20 20:58 ` [PATCH CI 1/6] drm/i915/tgl: Add missing ddi clock select during DP init sequence José Roberto de Souza
2019-09-20 20:58 ` [PATCH CI 2/6] drm/i915/tgl: Finish modular FIA support on registers José Roberto de Souza
2019-09-20 20:58 ` [PATCH CI 3/6] drm/i915/tgl/pll: Set update_active_dpll José Roberto de Souza
2019-09-20 20:58 ` [PATCH CI 4/6] drm/i915/tgl: Add dkl phy registers José Roberto de Souza
2019-09-20 20:58 ` [PATCH CI 5/6] drm/i915/icl: Unify disable and enable phy clock gating functions José Roberto de Souza
2019-09-20 20:58 ` [PATCH CI 6/6] drm/i915/tgl: Check the UC health of tc controllers after power on José Roberto de Souza
2019-09-20 22:02 ` ✗ Fi.CI.BAT: failure for TGL TC enabling v2-CI Patchwork
2019-09-20 23:21 ` ✓ Fi.CI.BAT: success for TGL TC enabling v2-CI (rev2) Patchwork
2019-09-22 13:56 ` ✓ Fi.CI.IGT: " Patchwork
2019-09-23 17:52   ` Souza, Jose

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