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From: Andrew Murray <andrew.murray@arm.com>
To: Rob Herring <robh@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	bcm-kernel-feedback-list@broadcom.com,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Heiko Stuebner <heiko@sntech.de>,
	Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
	Ley Foon Tan <lftan@altera.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	linux-mediatek@lists.infradead.org,
	linux-renesas-soc@vger.kernel.org,
	linux-rockchip@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Ray Jui <rjui@broadcom.com>,
	rfi@lists.rocketboards.org, Ryder Lee <ryder.lee@mediatek.com>,
	Scott Branden <sbranden@broadcom.com>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	Simon Horman <horms@verge.net.au>,
	Srinath Mannam <srinath.mannam@broadcom.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Toan Le <toan@os.amperecomputing.com>,
	Tom Joseph <tjoseph@cadence.com>, Will Deacon <will@kernel.org>
Subject: Re: [PATCH v2 09/25] PCI: mobiveil: Use pci_parse_request_of_pci_ranges()
Date: Fri, 18 Oct 2019 16:41:41 +0100	[thread overview]
Message-ID: <20191018154141.GJ47056@e119886-lin.cambridge.arm.com> (raw)
In-Reply-To: <20191016200647.32050-10-robh@kernel.org>

On Wed, Oct 16, 2019 at 03:06:31PM -0500, Rob Herring wrote:
> Convert the Mobiveil host bridge to use the common
> pci_parse_request_of_pci_ranges().
> 
> There's no need to assign the resources to a temporary list first. Just
> use bridge->windows directly and remove all the temporary list handling.
> 
> Cc: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>
> Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Andrew Murray <andrew.murray@arm.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---

Reviewed-by: Andrew Murray <andrew.murray@arm.com>

> v2:
> - New patch
> 
>  drivers/pci/controller/pcie-mobiveil.c | 26 +++++++-------------------
>  1 file changed, 7 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
> index a45a6447b01d..4eab8624ce4d 100644
> --- a/drivers/pci/controller/pcie-mobiveil.c
> +++ b/drivers/pci/controller/pcie-mobiveil.c
> @@ -140,7 +140,6 @@ struct mobiveil_msi {			/* MSI information */
> 
>  struct mobiveil_pcie {
>  	struct platform_device *pdev;
> -	struct list_head resources;
>  	void __iomem *config_axi_slave_base;	/* endpoint config base */
>  	void __iomem *csr_axi_slave_base;	/* root port config base */
>  	void __iomem *apb_csr_base;	/* MSI register base */
> @@ -575,6 +574,7 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie)
> 
>  static int mobiveil_host_init(struct mobiveil_pcie *pcie)
>  {
> +	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
>  	u32 value, pab_ctrl, type;
>  	struct resource_entry *win;
> 
> @@ -631,7 +631,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
>  	program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
> 
>  	/* Get the I/O and memory ranges from DT */
> -	resource_list_for_each_entry(win, &pcie->resources) {
> +	resource_list_for_each_entry(win, &bridge->windows) {
>  		if (resource_type(win->res) == IORESOURCE_MEM)
>  			type = MEM_WINDOW_TYPE;
>  		else if (resource_type(win->res) == IORESOURCE_IO)
> @@ -857,7 +857,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	struct pci_bus *child;
>  	struct pci_host_bridge *bridge;
>  	struct device *dev = &pdev->dev;
> -	resource_size_t iobase;
>  	int ret;
> 
>  	/* allocate the PCIe port */
> @@ -875,11 +874,8 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  		return ret;
>  	}
> 
> -	INIT_LIST_HEAD(&pcie->resources);
> -
>  	/* parse the host bridge base addresses from the device tree file */
> -	ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
> -						    &pcie->resources, &iobase);
> +	ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL);
>  	if (ret) {
>  		dev_err(dev, "Getting bridge resources failed\n");
>  		return ret;
> @@ -892,24 +888,19 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	ret = mobiveil_host_init(pcie);
>  	if (ret) {
>  		dev_err(dev, "Failed to initialize host\n");
> -		goto error;
> +		return ret;
>  	}
> 
>  	/* initialize the IRQ domains */
>  	ret = mobiveil_pcie_init_irq_domain(pcie);
>  	if (ret) {
>  		dev_err(dev, "Failed creating IRQ Domain\n");
> -		goto error;
> +		return ret;
>  	}
> 
>  	irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie);
> 
> -	ret = devm_request_pci_bus_resources(dev, &pcie->resources);
> -	if (ret)
> -		goto error;
> -
>  	/* Initialize bridge */
> -	list_splice_init(&pcie->resources, &bridge->windows);
>  	bridge->dev.parent = dev;
>  	bridge->sysdata = pcie;
>  	bridge->busnr = pcie->root_bus_nr;
> @@ -920,13 +911,13 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	ret = mobiveil_bringup_link(pcie);
>  	if (ret) {
>  		dev_info(dev, "link bring-up failed\n");
> -		goto error;
> +		return ret;
>  	}
> 
>  	/* setup the kernel resources for the newly added PCIe root bus */
>  	ret = pci_scan_root_bus_bridge(bridge);
>  	if (ret)
> -		goto error;
> +		return ret;
> 
>  	bus = bridge->bus;
> 
> @@ -936,9 +927,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	pci_bus_add_devices(bus);
> 
>  	return 0;
> -error:
> -	pci_free_resource_list(&pcie->resources);
> -	return ret;
>  }
> 
>  static const struct of_device_id mobiveil_pcie_of_match[] = {
> --
> 2.20.1

WARNING: multiple messages have this Message-ID (diff)
From: Andrew Murray <andrew.murray@arm.com>
To: Rob Herring <robh@kernel.org>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
	linux-pci@vger.kernel.org, Shawn Lin <shawn.lin@rock-chips.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Toan Le <toan@os.amperecomputing.com>,
	Will Deacon <will@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Michal Simek <michal.simek@xilinx.com>,
	linux-rockchip@lists.infradead.org,
	bcm-kernel-feedback-list@broadcom.com,
	Linus Walleij <linus.walleij@linaro.org>,
	Ray Jui <rjui@broadcom.com>, Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
	Ryder Lee <ryder.lee@mediatek.com>,
	linux-mediatek@lists.infradead.org,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-arm-kernel@lists.infradead.org,
	Scott Branden <sbranden@broadcom.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	rfi@lists.rocketboards.org, linux-renesas-soc@vger.kernel.org,
	Tom Joseph <tjos>
Subject: Re: [PATCH v2 09/25] PCI: mobiveil: Use pci_parse_request_of_pci_ranges()
Date: Fri, 18 Oct 2019 16:41:41 +0100	[thread overview]
Message-ID: <20191018154141.GJ47056@e119886-lin.cambridge.arm.com> (raw)
In-Reply-To: <20191016200647.32050-10-robh@kernel.org>

On Wed, Oct 16, 2019 at 03:06:31PM -0500, Rob Herring wrote:
> Convert the Mobiveil host bridge to use the common
> pci_parse_request_of_pci_ranges().
> 
> There's no need to assign the resources to a temporary list first. Just
> use bridge->windows directly and remove all the temporary list handling.
> 
> Cc: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>
> Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Andrew Murray <andrew.murray@arm.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---

Reviewed-by: Andrew Murray <andrew.murray@arm.com>

> v2:
> - New patch
> 
>  drivers/pci/controller/pcie-mobiveil.c | 26 +++++++-------------------
>  1 file changed, 7 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
> index a45a6447b01d..4eab8624ce4d 100644
> --- a/drivers/pci/controller/pcie-mobiveil.c
> +++ b/drivers/pci/controller/pcie-mobiveil.c
> @@ -140,7 +140,6 @@ struct mobiveil_msi {			/* MSI information */
> 
>  struct mobiveil_pcie {
>  	struct platform_device *pdev;
> -	struct list_head resources;
>  	void __iomem *config_axi_slave_base;	/* endpoint config base */
>  	void __iomem *csr_axi_slave_base;	/* root port config base */
>  	void __iomem *apb_csr_base;	/* MSI register base */
> @@ -575,6 +574,7 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie)
> 
>  static int mobiveil_host_init(struct mobiveil_pcie *pcie)
>  {
> +	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
>  	u32 value, pab_ctrl, type;
>  	struct resource_entry *win;
> 
> @@ -631,7 +631,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
>  	program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
> 
>  	/* Get the I/O and memory ranges from DT */
> -	resource_list_for_each_entry(win, &pcie->resources) {
> +	resource_list_for_each_entry(win, &bridge->windows) {
>  		if (resource_type(win->res) == IORESOURCE_MEM)
>  			type = MEM_WINDOW_TYPE;
>  		else if (resource_type(win->res) == IORESOURCE_IO)
> @@ -857,7 +857,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	struct pci_bus *child;
>  	struct pci_host_bridge *bridge;
>  	struct device *dev = &pdev->dev;
> -	resource_size_t iobase;
>  	int ret;
> 
>  	/* allocate the PCIe port */
> @@ -875,11 +874,8 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  		return ret;
>  	}
> 
> -	INIT_LIST_HEAD(&pcie->resources);
> -
>  	/* parse the host bridge base addresses from the device tree file */
> -	ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
> -						    &pcie->resources, &iobase);
> +	ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL);
>  	if (ret) {
>  		dev_err(dev, "Getting bridge resources failed\n");
>  		return ret;
> @@ -892,24 +888,19 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	ret = mobiveil_host_init(pcie);
>  	if (ret) {
>  		dev_err(dev, "Failed to initialize host\n");
> -		goto error;
> +		return ret;
>  	}
> 
>  	/* initialize the IRQ domains */
>  	ret = mobiveil_pcie_init_irq_domain(pcie);
>  	if (ret) {
>  		dev_err(dev, "Failed creating IRQ Domain\n");
> -		goto error;
> +		return ret;
>  	}
> 
>  	irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie);
> 
> -	ret = devm_request_pci_bus_resources(dev, &pcie->resources);
> -	if (ret)
> -		goto error;
> -
>  	/* Initialize bridge */
> -	list_splice_init(&pcie->resources, &bridge->windows);
>  	bridge->dev.parent = dev;
>  	bridge->sysdata = pcie;
>  	bridge->busnr = pcie->root_bus_nr;
> @@ -920,13 +911,13 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	ret = mobiveil_bringup_link(pcie);
>  	if (ret) {
>  		dev_info(dev, "link bring-up failed\n");
> -		goto error;
> +		return ret;
>  	}
> 
>  	/* setup the kernel resources for the newly added PCIe root bus */
>  	ret = pci_scan_root_bus_bridge(bridge);
>  	if (ret)
> -		goto error;
> +		return ret;
> 
>  	bus = bridge->bus;
> 
> @@ -936,9 +927,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	pci_bus_add_devices(bus);
> 
>  	return 0;
> -error:
> -	pci_free_resource_list(&pcie->resources);
> -	return ret;
>  }
> 
>  static const struct of_device_id mobiveil_pcie_of_match[] = {
> --
> 2.20.1

WARNING: multiple messages have this Message-ID (diff)
From: Andrew Murray <andrew.murray@arm.com>
To: Rob Herring <robh@kernel.org>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
	linux-pci@vger.kernel.org, Shawn Lin <shawn.lin@rock-chips.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Toan Le <toan@os.amperecomputing.com>,
	Will Deacon <will@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Michal Simek <michal.simek@xilinx.com>,
	linux-rockchip@lists.infradead.org,
	bcm-kernel-feedback-list@broadcom.com,
	Linus Walleij <linus.walleij@linaro.org>,
	Ray Jui <rjui@broadcom.com>, Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
	Ryder Lee <ryder.lee@mediatek.com>,
	linux-mediatek@lists.infradead.org,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-arm-kernel@lists.infradead.org,
	Scott Branden <sbranden@broadcom.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	rfi@lists.rocketboards.org, linux-renesas-soc@vger.kernel.org,
	Tom Joseph <tjoseph@cadence.com>,
	Simon Horman <horms@verge.net.au>,
	Srinath Mannam <srinath.mannam@broadcom.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Ley Foon Tan <lftan@altera.com>
Subject: Re: [PATCH v2 09/25] PCI: mobiveil: Use pci_parse_request_of_pci_ranges()
Date: Fri, 18 Oct 2019 16:41:41 +0100	[thread overview]
Message-ID: <20191018154141.GJ47056@e119886-lin.cambridge.arm.com> (raw)
In-Reply-To: <20191016200647.32050-10-robh@kernel.org>

On Wed, Oct 16, 2019 at 03:06:31PM -0500, Rob Herring wrote:
> Convert the Mobiveil host bridge to use the common
> pci_parse_request_of_pci_ranges().
> 
> There's no need to assign the resources to a temporary list first. Just
> use bridge->windows directly and remove all the temporary list handling.
> 
> Cc: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>
> Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Andrew Murray <andrew.murray@arm.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---

Reviewed-by: Andrew Murray <andrew.murray@arm.com>

> v2:
> - New patch
> 
>  drivers/pci/controller/pcie-mobiveil.c | 26 +++++++-------------------
>  1 file changed, 7 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
> index a45a6447b01d..4eab8624ce4d 100644
> --- a/drivers/pci/controller/pcie-mobiveil.c
> +++ b/drivers/pci/controller/pcie-mobiveil.c
> @@ -140,7 +140,6 @@ struct mobiveil_msi {			/* MSI information */
> 
>  struct mobiveil_pcie {
>  	struct platform_device *pdev;
> -	struct list_head resources;
>  	void __iomem *config_axi_slave_base;	/* endpoint config base */
>  	void __iomem *csr_axi_slave_base;	/* root port config base */
>  	void __iomem *apb_csr_base;	/* MSI register base */
> @@ -575,6 +574,7 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie)
> 
>  static int mobiveil_host_init(struct mobiveil_pcie *pcie)
>  {
> +	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
>  	u32 value, pab_ctrl, type;
>  	struct resource_entry *win;
> 
> @@ -631,7 +631,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
>  	program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
> 
>  	/* Get the I/O and memory ranges from DT */
> -	resource_list_for_each_entry(win, &pcie->resources) {
> +	resource_list_for_each_entry(win, &bridge->windows) {
>  		if (resource_type(win->res) == IORESOURCE_MEM)
>  			type = MEM_WINDOW_TYPE;
>  		else if (resource_type(win->res) == IORESOURCE_IO)
> @@ -857,7 +857,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	struct pci_bus *child;
>  	struct pci_host_bridge *bridge;
>  	struct device *dev = &pdev->dev;
> -	resource_size_t iobase;
>  	int ret;
> 
>  	/* allocate the PCIe port */
> @@ -875,11 +874,8 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  		return ret;
>  	}
> 
> -	INIT_LIST_HEAD(&pcie->resources);
> -
>  	/* parse the host bridge base addresses from the device tree file */
> -	ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
> -						    &pcie->resources, &iobase);
> +	ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL);
>  	if (ret) {
>  		dev_err(dev, "Getting bridge resources failed\n");
>  		return ret;
> @@ -892,24 +888,19 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	ret = mobiveil_host_init(pcie);
>  	if (ret) {
>  		dev_err(dev, "Failed to initialize host\n");
> -		goto error;
> +		return ret;
>  	}
> 
>  	/* initialize the IRQ domains */
>  	ret = mobiveil_pcie_init_irq_domain(pcie);
>  	if (ret) {
>  		dev_err(dev, "Failed creating IRQ Domain\n");
> -		goto error;
> +		return ret;
>  	}
> 
>  	irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie);
> 
> -	ret = devm_request_pci_bus_resources(dev, &pcie->resources);
> -	if (ret)
> -		goto error;
> -
>  	/* Initialize bridge */
> -	list_splice_init(&pcie->resources, &bridge->windows);
>  	bridge->dev.parent = dev;
>  	bridge->sysdata = pcie;
>  	bridge->busnr = pcie->root_bus_nr;
> @@ -920,13 +911,13 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	ret = mobiveil_bringup_link(pcie);
>  	if (ret) {
>  		dev_info(dev, "link bring-up failed\n");
> -		goto error;
> +		return ret;
>  	}
> 
>  	/* setup the kernel resources for the newly added PCIe root bus */
>  	ret = pci_scan_root_bus_bridge(bridge);
>  	if (ret)
> -		goto error;
> +		return ret;
> 
>  	bus = bridge->bus;
> 
> @@ -936,9 +927,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	pci_bus_add_devices(bus);
> 
>  	return 0;
> -error:
> -	pci_free_resource_list(&pcie->resources);
> -	return ret;
>  }
> 
>  static const struct of_device_id mobiveil_pcie_of_match[] = {
> --
> 2.20.1

_______________________________________________
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Linux-mediatek@lists.infradead.org
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WARNING: multiple messages have this Message-ID (diff)
From: Andrew Murray <andrew.murray@arm.com>
To: Rob Herring <robh@kernel.org>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
	linux-pci@vger.kernel.org, Shawn Lin <shawn.lin@rock-chips.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Toan Le <toan@os.amperecomputing.com>,
	Will Deacon <will@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Michal Simek <michal.simek@xilinx.com>,
	linux-rockchip@lists.infradead.org,
	bcm-kernel-feedback-list@broadcom.com,
	Linus Walleij <linus.walleij@linaro.org>,
	Ray Jui <rjui@broadcom.com>, Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
	Ryder Lee <ryder.lee@mediatek.com>,
	linux-mediatek@lists.infradead.org,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-arm-kernel@lists.infradead.org,
	Scott Branden <sbranden@broadcom.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	rfi@lists.rocketboards.org, linux-renesas-soc@vger.kernel.org,
	Tom Joseph <tjoseph@cadence.com>,
	Simon Horman <horms@verge.net.au>,
	Srinath Mannam <srinath.mannam@broadcom.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Ley Foon Tan <lftan@altera.com>
Subject: Re: [PATCH v2 09/25] PCI: mobiveil: Use pci_parse_request_of_pci_ranges()
Date: Fri, 18 Oct 2019 16:41:41 +0100	[thread overview]
Message-ID: <20191018154141.GJ47056@e119886-lin.cambridge.arm.com> (raw)
In-Reply-To: <20191016200647.32050-10-robh@kernel.org>

On Wed, Oct 16, 2019 at 03:06:31PM -0500, Rob Herring wrote:
> Convert the Mobiveil host bridge to use the common
> pci_parse_request_of_pci_ranges().
> 
> There's no need to assign the resources to a temporary list first. Just
> use bridge->windows directly and remove all the temporary list handling.
> 
> Cc: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>
> Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Andrew Murray <andrew.murray@arm.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---

Reviewed-by: Andrew Murray <andrew.murray@arm.com>

> v2:
> - New patch
> 
>  drivers/pci/controller/pcie-mobiveil.c | 26 +++++++-------------------
>  1 file changed, 7 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
> index a45a6447b01d..4eab8624ce4d 100644
> --- a/drivers/pci/controller/pcie-mobiveil.c
> +++ b/drivers/pci/controller/pcie-mobiveil.c
> @@ -140,7 +140,6 @@ struct mobiveil_msi {			/* MSI information */
> 
>  struct mobiveil_pcie {
>  	struct platform_device *pdev;
> -	struct list_head resources;
>  	void __iomem *config_axi_slave_base;	/* endpoint config base */
>  	void __iomem *csr_axi_slave_base;	/* root port config base */
>  	void __iomem *apb_csr_base;	/* MSI register base */
> @@ -575,6 +574,7 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie)
> 
>  static int mobiveil_host_init(struct mobiveil_pcie *pcie)
>  {
> +	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
>  	u32 value, pab_ctrl, type;
>  	struct resource_entry *win;
> 
> @@ -631,7 +631,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
>  	program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
> 
>  	/* Get the I/O and memory ranges from DT */
> -	resource_list_for_each_entry(win, &pcie->resources) {
> +	resource_list_for_each_entry(win, &bridge->windows) {
>  		if (resource_type(win->res) == IORESOURCE_MEM)
>  			type = MEM_WINDOW_TYPE;
>  		else if (resource_type(win->res) == IORESOURCE_IO)
> @@ -857,7 +857,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	struct pci_bus *child;
>  	struct pci_host_bridge *bridge;
>  	struct device *dev = &pdev->dev;
> -	resource_size_t iobase;
>  	int ret;
> 
>  	/* allocate the PCIe port */
> @@ -875,11 +874,8 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  		return ret;
>  	}
> 
> -	INIT_LIST_HEAD(&pcie->resources);
> -
>  	/* parse the host bridge base addresses from the device tree file */
> -	ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
> -						    &pcie->resources, &iobase);
> +	ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL);
>  	if (ret) {
>  		dev_err(dev, "Getting bridge resources failed\n");
>  		return ret;
> @@ -892,24 +888,19 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	ret = mobiveil_host_init(pcie);
>  	if (ret) {
>  		dev_err(dev, "Failed to initialize host\n");
> -		goto error;
> +		return ret;
>  	}
> 
>  	/* initialize the IRQ domains */
>  	ret = mobiveil_pcie_init_irq_domain(pcie);
>  	if (ret) {
>  		dev_err(dev, "Failed creating IRQ Domain\n");
> -		goto error;
> +		return ret;
>  	}
> 
>  	irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie);
> 
> -	ret = devm_request_pci_bus_resources(dev, &pcie->resources);
> -	if (ret)
> -		goto error;
> -
>  	/* Initialize bridge */
> -	list_splice_init(&pcie->resources, &bridge->windows);
>  	bridge->dev.parent = dev;
>  	bridge->sysdata = pcie;
>  	bridge->busnr = pcie->root_bus_nr;
> @@ -920,13 +911,13 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	ret = mobiveil_bringup_link(pcie);
>  	if (ret) {
>  		dev_info(dev, "link bring-up failed\n");
> -		goto error;
> +		return ret;
>  	}
> 
>  	/* setup the kernel resources for the newly added PCIe root bus */
>  	ret = pci_scan_root_bus_bridge(bridge);
>  	if (ret)
> -		goto error;
> +		return ret;
> 
>  	bus = bridge->bus;
> 
> @@ -936,9 +927,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
>  	pci_bus_add_devices(bus);
> 
>  	return 0;
> -error:
> -	pci_free_resource_list(&pcie->resources);
> -	return ret;
>  }
> 
>  static const struct of_device_id mobiveil_pcie_of_match[] = {
> --
> 2.20.1

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  reply	other threads:[~2019-10-18 15:42 UTC|newest]

Thread overview: 148+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-16 20:06 [PATCH v2 00/25] PCI host resource consolidation Rob Herring
2019-10-16 20:06 ` Rob Herring
2019-10-16 20:06 ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 01/25] resource: Add a resource_list_get_entry_of_type helper Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-17  7:25   ` Christoph Hellwig
2019-10-17  7:25     ` Christoph Hellwig
2019-10-17  7:25     ` Christoph Hellwig
2019-10-18 12:14     ` Andrew Murray
2019-10-18 12:14       ` Andrew Murray
2019-10-18 12:14       ` Andrew Murray
2019-10-18 12:14       ` Andrew Murray
2019-10-16 20:06 ` [PATCH v2 02/25] PCI: Export pci_parse_request_of_pci_ranges() Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-18 12:06   ` Andrew Murray
2019-10-18 12:06     ` Andrew Murray
2019-10-18 12:06     ` Andrew Murray
2019-10-18 12:06     ` Andrew Murray
2019-10-16 20:06 ` [PATCH v2 03/25] PCI: aardvark: Use pci_parse_request_of_pci_ranges() Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 04/25] PCI: altera: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-18 12:09   ` Andrew Murray
2019-10-18 12:09     ` Andrew Murray
2019-10-18 12:09     ` Andrew Murray
2019-10-18 12:09     ` Andrew Murray
2019-10-16 20:06 ` [PATCH v2 05/25] PCI: dwc: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-18 12:35   ` Andrew Murray
2019-10-18 12:35     ` Andrew Murray
2019-10-18 12:35     ` Andrew Murray
2019-10-18 12:35     ` Andrew Murray
2019-10-20 21:39     ` Rob Herring
2019-10-20 21:39       ` Rob Herring
2019-10-20 21:39       ` Rob Herring
2019-10-20 21:39       ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 06/25] PCI: faraday: Use pci_parse_request_of_pci_ranges Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-18 12:57   ` Andrew Murray
2019-10-18 12:57     ` Andrew Murray
2019-10-18 12:57     ` Andrew Murray
2019-10-18 12:57     ` Andrew Murray
2019-10-16 20:06 ` [PATCH v2 07/25] PCI: iproc: Use pci_parse_request_of_pci_ranges() Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-18 13:00   ` Andrew Murray
2019-10-18 13:00     ` Andrew Murray
2019-10-18 13:00     ` Andrew Murray
2019-10-18 13:00     ` Andrew Murray
2019-10-16 20:06 ` [PATCH v2 08/25] PCI: mediatek: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 09/25] PCI: mobiveil: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-18 15:41   ` Andrew Murray [this message]
2019-10-18 15:41     ` Andrew Murray
2019-10-18 15:41     ` Andrew Murray
2019-10-18 15:41     ` Andrew Murray
2019-10-16 20:06 ` [PATCH v2 10/25] PCI: rockchip: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-18 15:51   ` Andrew Murray
2019-10-18 15:51     ` Andrew Murray
2019-10-18 15:51     ` Andrew Murray
2019-10-18 15:51     ` Andrew Murray
2019-10-20 21:36     ` Rob Herring
2019-10-20 21:36       ` Rob Herring
2019-10-20 21:36       ` Rob Herring
2019-10-20 21:36       ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 11/25] PCI: rockchip: Drop storing driver private outbound resource data Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-17  7:26   ` Christoph Hellwig
2019-10-17  7:26     ` Christoph Hellwig
2019-10-17  7:26     ` Christoph Hellwig
2019-10-17 12:24     ` Rob Herring
2019-10-17 12:24       ` Rob Herring
2019-10-17 12:24       ` Rob Herring
2019-10-17 12:24       ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 12/25] PCI: v3-semi: Use pci_parse_request_of_pci_ranges() Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-21  0:38   ` Linus Walleij
2019-10-21  0:38     ` Linus Walleij
2019-10-21  0:38     ` Linus Walleij
2019-10-21  0:38     ` Linus Walleij
2019-10-16 20:06 ` [PATCH v2 13/25] PCI: xgene: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 14/25] PCI: xilinx: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 15/25] PCI: xilinx-nwl: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 16/25] PCI: versatile: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-21  0:39   ` Linus Walleij
2019-10-21  0:39     ` Linus Walleij
2019-10-21  0:39     ` Linus Walleij
2019-10-21  0:39     ` Linus Walleij
2019-10-16 20:06 ` [PATCH v2 17/25] PCI: versatile: Remove usage of PHYS_OFFSET Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-21  0:40   ` Linus Walleij
2019-10-21  0:40     ` Linus Walleij
2019-10-21  0:40     ` Linus Walleij
2019-10-21  0:40     ` Linus Walleij
2019-10-16 20:06 ` [PATCH v2 18/25] PCI: versatile: Enable COMPILE_TEST Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-21  0:41   ` Linus Walleij
2019-10-21  0:41     ` Linus Walleij
2019-10-21  0:41     ` Linus Walleij
2019-10-21  0:41     ` Linus Walleij
2019-10-16 20:06 ` [PATCH v2 19/25] PCI: of: Add inbound resource parsing to helpers Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 20/25] PCI: ftpci100: Use inbound resources for setup Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-21  0:41   ` Linus Walleij
2019-10-21  0:41     ` Linus Walleij
2019-10-21  0:41     ` Linus Walleij
2019-10-21  0:41     ` Linus Walleij
2019-10-16 20:06 ` [PATCH v2 21/25] PCI: v3-semi: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 22/25] PCI: xgene: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 23/25] PCI: iproc: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 24/25] PCI: rcar: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 25/25] PCI: Make devm_of_pci_get_host_bridge_resources() static Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring

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