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From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 5/5] drm/i915/tgl: Add AUX B & C to DC_OFF_POWER_DOMAINS
Date: Fri, 25 Oct 2019 16:06:23 -0700	[thread overview]
Message-ID: <20191025230623.27829-6-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20191025230623.27829-1-matthew.d.roper@intel.com>

Our TGL CI platforms are running into cases where aux transactions have
failed to complete or declare a timeout well after the timeout limit
that the hardware is supposed to enforce.  From the logs it appears that
these failures arise when aux transactions happen after we've entered
DC6.  On TGL AUX B & C are in PG1 (managed by the DMC firmware) rather
than PG3 as they were on ICL.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 6f9e7927e248..707ac110e271 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -2682,6 +2682,8 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
 	TGL_PW_2_POWER_DOMAINS |			\
 	BIT_ULL(POWER_DOMAIN_MODESET) |			\
 	BIT_ULL(POWER_DOMAIN_AUX_A) |			\
+	BIT_ULL(POWER_DOMAIN_AUX_B) |			\
+	BIT_ULL(POWER_DOMAIN_AUX_C) |			\
 	BIT_ULL(POWER_DOMAIN_INIT))
 
 #define TGL_DDI_IO_D_TC1_POWER_DOMAINS (	\
-- 
2.21.0

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 5/5] drm/i915/tgl: Add AUX B & C to DC_OFF_POWER_DOMAINS
Date: Fri, 25 Oct 2019 16:06:23 -0700	[thread overview]
Message-ID: <20191025230623.27829-6-matthew.d.roper@intel.com> (raw)
Message-ID: <20191025230623.kmr_tl20HFZbWetRJEluB1WBARbtB9pTgPSXm3Y15UM@z> (raw)
In-Reply-To: <20191025230623.27829-1-matthew.d.roper@intel.com>

Our TGL CI platforms are running into cases where aux transactions have
failed to complete or declare a timeout well after the timeout limit
that the hardware is supposed to enforce.  From the logs it appears that
these failures arise when aux transactions happen after we've entered
DC6.  On TGL AUX B & C are in PG1 (managed by the DMC firmware) rather
than PG3 as they were on ICL.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 6f9e7927e248..707ac110e271 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -2682,6 +2682,8 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
 	TGL_PW_2_POWER_DOMAINS |			\
 	BIT_ULL(POWER_DOMAIN_MODESET) |			\
 	BIT_ULL(POWER_DOMAIN_AUX_A) |			\
+	BIT_ULL(POWER_DOMAIN_AUX_B) |			\
+	BIT_ULL(POWER_DOMAIN_AUX_C) |			\
 	BIT_ULL(POWER_DOMAIN_INIT))
 
 #define TGL_DDI_IO_D_TC1_POWER_DOMAINS (	\
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-10-25 23:06 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-25 23:06 [PATCH 0/5] DP AUX updates Matt Roper
2019-10-25 23:06 ` [Intel-gfx] " Matt Roper
2019-10-25 23:06 ` [PATCH 1/5] drm/i915/tgl: Handle AUX interrupts for TC ports Matt Roper
2019-10-25 23:06   ` [Intel-gfx] " Matt Roper
2019-10-25 23:11   ` Lucas De Marchi
2019-10-25 23:11     ` [Intel-gfx] " Lucas De Marchi
2019-10-25 23:06 ` [PATCH 2/5] drm/i915: Drop unused AUX register offsets Matt Roper
2019-10-25 23:06   ` [Intel-gfx] " Matt Roper
2019-10-25 23:11   ` Lucas De Marchi
2019-10-25 23:11     ` [Intel-gfx] " Lucas De Marchi
2019-10-26  5:12   ` Matt Roper
2019-10-26  5:12     ` [Intel-gfx] " Matt Roper
2019-10-25 23:06 ` [PATCH 3/5] drm/i915: Add missing AUX channel H & I support Matt Roper
2019-10-25 23:06   ` [Intel-gfx] " Matt Roper
2019-10-25 23:13   ` Lucas De Marchi
2019-10-25 23:13     ` [Intel-gfx] " Lucas De Marchi
2019-10-28 14:57     ` Matt Roper
2019-10-28 14:57       ` [Intel-gfx] " Matt Roper
2019-10-29 17:59       ` Lucas De Marchi
2019-10-29 17:59         ` [Intel-gfx] " Lucas De Marchi
2019-10-25 23:06 ` [PATCH 4/5] drm/i915: Provide more information on DP AUX failures Matt Roper
2019-10-25 23:06   ` [Intel-gfx] " Matt Roper
2019-10-25 23:19   ` Lucas De Marchi
2019-10-25 23:19     ` [Intel-gfx] " Lucas De Marchi
2019-10-25 23:25     ` Matt Roper
2019-10-25 23:25       ` [Intel-gfx] " Matt Roper
2019-10-25 23:32       ` Lucas De Marchi
2019-10-25 23:32         ` [Intel-gfx] " Lucas De Marchi
2019-10-29 17:31     ` [PATCH v2 " Matt Roper
2019-10-29 17:31       ` [Intel-gfx] " Matt Roper
2019-10-29 19:33       ` Lucas De Marchi
2019-10-29 19:33         ` [Intel-gfx] " Lucas De Marchi
2019-10-28 16:43   ` [PATCH " Ville Syrjälä
2019-10-28 16:43     ` [Intel-gfx] " Ville Syrjälä
2019-10-25 23:06 ` Matt Roper [this message]
2019-10-25 23:06   ` [Intel-gfx] [PATCH 5/5] drm/i915/tgl: Add AUX B & C to DC_OFF_POWER_DOMAINS Matt Roper
2019-10-25 23:24   ` Lucas De Marchi
2019-10-25 23:24     ` [Intel-gfx] " Lucas De Marchi
2019-10-26  8:57   ` Imre Deak
2019-10-26  8:57     ` [Intel-gfx] " Imre Deak
2019-10-26  1:09 ` ✗ Fi.CI.BUILD: failure for DP AUX updates Patchwork
2019-10-26  1:09   ` [Intel-gfx] " Patchwork
2019-10-26  5:37 ` ✗ Fi.CI.CHECKPATCH: warning for DP AUX updates (rev2) Patchwork
2019-10-26  5:37   ` [Intel-gfx] " Patchwork
2019-10-26  5:57 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-10-26  5:57   ` [Intel-gfx] " Patchwork
2019-10-26  6:26 ` ✗ Fi.CI.CHECKPATCH: warning for DP AUX updates (rev3) Patchwork
2019-10-26  6:26   ` [Intel-gfx] " Patchwork
2019-10-26  6:47 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-26  6:47   ` [Intel-gfx] " Patchwork
2019-10-28  1:02 ` ✓ Fi.CI.IGT: " Patchwork
2019-10-28  1:02   ` [Intel-gfx] " Patchwork
2019-10-29 17:58   ` Matt Roper
2019-10-29 17:58     ` [Intel-gfx] " Matt Roper
2019-10-29 19:56     ` Matt Roper
2019-10-29 19:56       ` [Intel-gfx] " Matt Roper

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