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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2 04/14] drm/i915/fbc: Remove the FBC_RT_BASE setup for ILK/SNB
Date: Wed, 27 Nov 2019 22:12:12 +0200	[thread overview]
Message-ID: <20191127201222.16669-5-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20191127201222.16669-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We don't want to use the FBC hardware render tracking so let's not
enable it. To use the hw tracking properly we'd anyway need to
integrate this into the command submissing path as the register is
context saved, and if rendering happens via the ppgtt we'd have
to configure it with the ppgtt address instead of the ggtt address.
Easier to use software tracking instead.

Note that on pre-ilk we can't actually disable render tracking.
However we can't rely on it because it requires that DSPSURF to
match the render target address, and since we play tricks
with DSPSURF that may not be the case. Hence we shall rely on
software render tracking on all platforms.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 2b64b172407d..eefa5a88b304 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -248,8 +248,6 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv)
 	}
 
 	I915_WRITE(ILK_DPFC_FENCE_YOFF, params->crtc.fence_y_offset);
-	I915_WRITE(ILK_FBC_RT_BASE,
-		   i915_ggtt_offset(params->vma) | ILK_FBC_RT_VALID);
 	/* enable it... */
 	I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
 
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 04/14] drm/i915/fbc: Remove the FBC_RT_BASE setup for ILK/SNB
Date: Wed, 27 Nov 2019 22:12:12 +0200	[thread overview]
Message-ID: <20191127201222.16669-5-ville.syrjala@linux.intel.com> (raw)
Message-ID: <20191127201212.6q71NspqBSSRdtJI3_1Vz6OD0EA5huxUw1yQPjes9XQ@z> (raw)
In-Reply-To: <20191127201222.16669-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We don't want to use the FBC hardware render tracking so let's not
enable it. To use the hw tracking properly we'd anyway need to
integrate this into the command submissing path as the register is
context saved, and if rendering happens via the ppgtt we'd have
to configure it with the ppgtt address instead of the ggtt address.
Easier to use software tracking instead.

Note that on pre-ilk we can't actually disable render tracking.
However we can't rely on it because it requires that DSPSURF to
match the render target address, and since we play tricks
with DSPSURF that may not be the case. Hence we shall rely on
software render tracking on all platforms.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 2b64b172407d..eefa5a88b304 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -248,8 +248,6 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv)
 	}
 
 	I915_WRITE(ILK_DPFC_FENCE_YOFF, params->crtc.fence_y_offset);
-	I915_WRITE(ILK_FBC_RT_BASE,
-		   i915_ggtt_offset(params->vma) | ILK_FBC_RT_VALID);
 	/* enable it... */
 	I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
 
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-11-27 20:12 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-27 20:12 [PATCH v2 00/14] drm/i915/fbc: Fix FBC for glk+ Ville Syrjala
2019-11-27 20:12 ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 01/14] drm/i915/fbc: Disable fbc by default on all glk+ Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-29 18:34   ` Sasha Levin
2019-11-29 18:34     ` [Intel-gfx] " Sasha Levin
2019-11-27 20:12 ` [PATCH v2 02/14] drm/i915/fbc: Nuke bogus single pipe fbc1 restriction Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 03/14] drm/i915: Relocate intel_crtc_active() Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` Ville Syrjala [this message]
2019-11-27 20:12   ` [Intel-gfx] [PATCH v2 04/14] drm/i915/fbc: Remove the FBC_RT_BASE setup for ILK/SNB Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 05/14] drm/i915/fbc: Precompute gen9 cfb stride w/a Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 06/14] drm/i915/fbc: Track plane visibility Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 07/14] drm/i915/fbc: Store fence_id direction in fbc cache/params Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 08/14] drm/i915/fbc: Make fence_id optional for i965gm Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 09/14] drm/i915/fbc: s/gen9 && !glk/gen9_bc || bxt/ Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 10/14] drm/i915/fbc: Nuke fbc.enabled Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 11/14] drm/i915/fbc: Start using flip nuke Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 12/14] drm/i915/fbc: Wait for vblank after FBC disable on glk+ Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-28 15:03   ` [PATCH v3 " Ville Syrjala
2019-11-28 15:03     ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 13/14] drm/i915/fbc: Enable fbc by default on glk+ once again Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 14/14] drm/i915/fbc: Reallocate cfb if we need more of it Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-28 15:48   ` Maarten Lankhorst
2019-11-28 15:48     ` [Intel-gfx] " Maarten Lankhorst
2019-11-28 15:59     ` Ville Syrjälä
2019-11-28 15:59       ` [Intel-gfx] " Ville Syrjälä
2019-11-29  8:48       ` Maarten Lankhorst
2019-11-29  8:48         ` [Intel-gfx] " Maarten Lankhorst
2019-11-29 11:37         ` Ville Syrjälä
2019-11-29 11:37           ` [Intel-gfx] " Ville Syrjälä
2019-12-03  8:45           ` Maarten Lankhorst
2019-12-03  8:45             ` [Intel-gfx] " Maarten Lankhorst
2019-12-03 13:04             ` Ville Syrjälä
2019-12-09 14:17     ` Ville Syrjälä
2019-11-27 23:15 ` ✗ Fi.CI.BAT: failure for drm/i915/fbc: Fix FBC for glk+ (rev4) Patchwork
2019-11-27 23:15   ` [Intel-gfx] " Patchwork
2019-11-28  1:33 ` [PATCH v2 00/14] drm/i915/fbc: Fix FBC for glk+ Daniel Drake
2019-11-28  1:33   ` [Intel-gfx] " Daniel Drake
2019-11-28 18:02 ` ✓ Fi.CI.BAT: success for drm/i915/fbc: Fix FBC for glk+ (rev5) Patchwork
2019-11-28 18:02   ` [Intel-gfx] " Patchwork
2019-11-29 23:51 ` ✓ Fi.CI.IGT: " Patchwork
2019-11-29 23:51   ` [Intel-gfx] " Patchwork

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