From: Lu Baolu <baolu.lu@linux.intel.com> To: Joerg Roedel <joro@8bytes.org>, David Woodhouse <dwmw2@infradead.org>, Alex Williamson <alex.williamson@redhat.com> Cc: ashok.raj@intel.com, sanjay.k.kumar@intel.com, jacob.jun.pan@linux.intel.com, kevin.tian@intel.com, yi.l.liu@intel.com, yi.y.sun@intel.com, Peter Xu <peterx@redhat.com>, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Lu Baolu <baolu.lu@linux.intel.com> Subject: [PATCH v5 1/9] iommu/vt-d: Identify domains using first level page table Date: Tue, 24 Dec 2019 15:44:54 +0800 [thread overview] Message-ID: <20191224074502.5545-2-baolu.lu@linux.intel.com> (raw) In-Reply-To: <20191224074502.5545-1-baolu.lu@linux.intel.com> This checks whether a domain should use the first level page table for map/unmap and marks it in the domain structure. Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> --- drivers/iommu/intel-iommu.c | 39 +++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 34723f6be672..71ad5e5feae2 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -307,6 +307,14 @@ static int hw_pass_through = 1; */ #define DOMAIN_FLAG_LOSE_CHILDREN BIT(1) +/* + * When VT-d works in the scalable mode, it allows DMA translation to + * happen through either first level or second level page table. This + * bit marks that the DMA translation for the domain goes through the + * first level page table, otherwise, it goes through the second level. + */ +#define DOMAIN_FLAG_USE_FIRST_LEVEL BIT(2) + #define for_each_domain_iommu(idx, domain) \ for (idx = 0; idx < g_num_of_iommus; idx++) \ if (domain->iommu_refcnt[idx]) @@ -1714,6 +1722,35 @@ static void free_dmar_iommu(struct intel_iommu *iommu) #endif } +/* + * Check and return whether first level is used by default for + * DMA translation. Currently, we make it off by setting + * first_level_support = 0, and will change it to -1 after all + * map/unmap paths support first level page table. + */ +static bool first_level_by_default(void) +{ + struct dmar_drhd_unit *drhd; + struct intel_iommu *iommu; + static int first_level_support = 0; + + if (likely(first_level_support != -1)) + return first_level_support; + + first_level_support = 1; + + rcu_read_lock(); + for_each_active_iommu(iommu, drhd) { + if (!sm_supported(iommu) || !ecap_flts(iommu->ecap)) { + first_level_support = 0; + break; + } + } + rcu_read_unlock(); + + return first_level_support; +} + static struct dmar_domain *alloc_domain(int flags) { struct dmar_domain *domain; @@ -1725,6 +1762,8 @@ static struct dmar_domain *alloc_domain(int flags) memset(domain, 0, sizeof(*domain)); domain->nid = NUMA_NO_NODE; domain->flags = flags; + if (first_level_by_default()) + domain->flags |= DOMAIN_FLAG_USE_FIRST_LEVEL; domain->has_iotlb_device = false; INIT_LIST_HEAD(&domain->devices); -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Lu Baolu <baolu.lu@linux.intel.com> To: Joerg Roedel <joro@8bytes.org>, David Woodhouse <dwmw2@infradead.org>, Alex Williamson <alex.williamson@redhat.com> Cc: kevin.tian@intel.com, ashok.raj@intel.com, kvm@vger.kernel.org, sanjay.k.kumar@intel.com, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, yi.y.sun@intel.com Subject: [PATCH v5 1/9] iommu/vt-d: Identify domains using first level page table Date: Tue, 24 Dec 2019 15:44:54 +0800 [thread overview] Message-ID: <20191224074502.5545-2-baolu.lu@linux.intel.com> (raw) In-Reply-To: <20191224074502.5545-1-baolu.lu@linux.intel.com> This checks whether a domain should use the first level page table for map/unmap and marks it in the domain structure. Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> --- drivers/iommu/intel-iommu.c | 39 +++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 34723f6be672..71ad5e5feae2 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -307,6 +307,14 @@ static int hw_pass_through = 1; */ #define DOMAIN_FLAG_LOSE_CHILDREN BIT(1) +/* + * When VT-d works in the scalable mode, it allows DMA translation to + * happen through either first level or second level page table. This + * bit marks that the DMA translation for the domain goes through the + * first level page table, otherwise, it goes through the second level. + */ +#define DOMAIN_FLAG_USE_FIRST_LEVEL BIT(2) + #define for_each_domain_iommu(idx, domain) \ for (idx = 0; idx < g_num_of_iommus; idx++) \ if (domain->iommu_refcnt[idx]) @@ -1714,6 +1722,35 @@ static void free_dmar_iommu(struct intel_iommu *iommu) #endif } +/* + * Check and return whether first level is used by default for + * DMA translation. Currently, we make it off by setting + * first_level_support = 0, and will change it to -1 after all + * map/unmap paths support first level page table. + */ +static bool first_level_by_default(void) +{ + struct dmar_drhd_unit *drhd; + struct intel_iommu *iommu; + static int first_level_support = 0; + + if (likely(first_level_support != -1)) + return first_level_support; + + first_level_support = 1; + + rcu_read_lock(); + for_each_active_iommu(iommu, drhd) { + if (!sm_supported(iommu) || !ecap_flts(iommu->ecap)) { + first_level_support = 0; + break; + } + } + rcu_read_unlock(); + + return first_level_support; +} + static struct dmar_domain *alloc_domain(int flags) { struct dmar_domain *domain; @@ -1725,6 +1762,8 @@ static struct dmar_domain *alloc_domain(int flags) memset(domain, 0, sizeof(*domain)); domain->nid = NUMA_NO_NODE; domain->flags = flags; + if (first_level_by_default()) + domain->flags |= DOMAIN_FLAG_USE_FIRST_LEVEL; domain->has_iotlb_device = false; INIT_LIST_HEAD(&domain->devices); -- 2.17.1 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
next prev parent reply other threads:[~2019-12-24 7:46 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-12-24 7:44 [PATCH v5 0/9] Use 1st-level for IOVA translation Lu Baolu 2019-12-24 7:44 ` Lu Baolu 2019-12-24 7:44 ` Lu Baolu [this message] 2019-12-24 7:44 ` [PATCH v5 1/9] iommu/vt-d: Identify domains using first level page table Lu Baolu 2019-12-24 7:44 ` [PATCH v5 2/9] iommu/vt-d: Add set domain DOMAIN_ATTR_NESTING attr Lu Baolu 2019-12-24 7:44 ` Lu Baolu 2019-12-24 7:44 ` [PATCH v5 3/9] iommu/vt-d: Add PASID_FLAG_FL5LP for first-level pasid setup Lu Baolu 2019-12-24 7:44 ` Lu Baolu 2019-12-24 7:44 ` [PATCH v5 4/9] iommu/vt-d: Setup pasid entries for iova over first level Lu Baolu 2019-12-24 7:44 ` Lu Baolu 2019-12-24 7:44 ` [PATCH v5 5/9] iommu/vt-d: Flush PASID-based iotlb " Lu Baolu 2019-12-24 7:44 ` Lu Baolu 2019-12-24 7:44 ` [PATCH v5 6/9] iommu/vt-d: Make first level IOVA canonical Lu Baolu 2019-12-24 7:44 ` Lu Baolu 2019-12-24 7:45 ` [PATCH v5 7/9] iommu/vt-d: Update first level super page capability Lu Baolu 2019-12-24 7:45 ` Lu Baolu 2019-12-24 7:45 ` [PATCH v5 8/9] iommu/vt-d: Use iova over first level Lu Baolu 2019-12-24 7:45 ` Lu Baolu 2019-12-24 7:45 ` [PATCH v5 9/9] iommu/vt-d: debugfs: Add support to show page table internals Lu Baolu 2019-12-24 7:45 ` Lu Baolu 2020-01-01 23:38 ` [PATCH v5 0/9] Use 1st-level for IOVA translation Lu Baolu 2020-01-01 23:38 ` Lu Baolu 2020-01-02 2:31 ` Liu, Yi L 2020-01-02 2:31 ` Liu, Yi L 2020-01-02 2:32 ` Lu Baolu 2020-01-02 2:32 ` Lu Baolu
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