From: Andrew Murray <andrew.murray@arm.com> To: "Z.q. Hou" <zhiqiang.hou@nxp.com> Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "bhelgaas@google.com" <bhelgaas@google.com>, "robh+dt@kernel.org" <robh+dt@kernel.org>, "arnd@arndb.de" <arnd@arndb.de>, "mark.rutland@arm.com" <mark.rutland@arm.com>, "l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>, "shawnguo@kernel.org" <shawnguo@kernel.org>, "m.karthikeyan@mobiveil.co.in" <m.karthikeyan@mobiveil.co.in>, Leo Li <leoyang.li@nxp.com>, "lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>, "catalin.marinas@arm.com" <catalin.marinas@arm.com>, "will.deacon@arm.com" <will.deacon@arm.com>, Mingkai Hu <mingkai.hu@nxp.com>, "M.h. Lian" <minghuan.lian@nxp.com>, Xiaowei Bao <xiaowei.bao@nxp.com> Subject: Re: [PATCHv9 08/12] PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors Date: Mon, 13 Jan 2020 11:31:35 +0000 [thread overview] Message-ID: <20200113113135.GN42593@e119886-lin.cambridge.arm.com> (raw) In-Reply-To: <20191120034451.30102-9-Zhiqiang.Hou@nxp.com> On Wed, Nov 20, 2019 at 03:46:10AM +0000, Z.q. Hou wrote: > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > There are some 8-bit and 16-bit registers in PCIe configuration > space, so add these accessors accordingly. > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> > Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> > --- > V9: > - No change > > .../pci/controller/mobiveil/pcie-mobiveil.h | 23 +++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h > index 37116c2a19fe..750a7fd95bc1 100644 > --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h > +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h > @@ -182,10 +182,33 @@ static inline u32 mobiveil_csr_readl(struct mobiveil_pcie *pcie, u32 off) > return mobiveil_csr_read(pcie, off, 0x4); > } > > +static inline u32 mobiveil_csr_readw(struct mobiveil_pcie *pcie, u32 off) > +{ > + return mobiveil_csr_read(pcie, off, 0x2); > +} > + > +static inline u32 mobiveil_csr_readb(struct mobiveil_pcie *pcie, u32 off) > +{ > + return mobiveil_csr_read(pcie, off, 0x1); > +} Do you think the above two return types should reflect the size of the access? Thanks, Andrew Murray > + > + > static inline void mobiveil_csr_writel(struct mobiveil_pcie *pcie, u32 val, > u32 off) > { > mobiveil_csr_write(pcie, val, off, 0x4); > } > > +static inline void mobiveil_csr_writew(struct mobiveil_pcie *pcie, u32 val, > + u32 off) > +{ > + mobiveil_csr_write(pcie, val, off, 0x2); > +} > + > +static inline void mobiveil_csr_writeb(struct mobiveil_pcie *pcie, u32 val, > + u32 off) > +{ > + mobiveil_csr_write(pcie, val, off, 0x1); > +} > + > #endif /* _PCIE_MOBIVEIL_H */ > -- > 2.17.1 >
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Murray <andrew.murray@arm.com> To: "Z.q. Hou" <zhiqiang.hou@nxp.com> Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, "lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>, "m.karthikeyan@mobiveil.co.in" <m.karthikeyan@mobiveil.co.in>, "arnd@arndb.de" <arnd@arndb.de>, "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>, "l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>, "will.deacon@arm.com" <will.deacon@arm.com>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, Leo Li <leoyang.li@nxp.com>, "M.h. Lian" <minghuan.lian@nxp.com>, "robh+dt@kernel.org" <robh+dt@kernel.org>, Mingkai Hu <mingkai.hu@nxp.com>, Xiaowei Bao <xiaowei.bao@nxp.com>, "catalin.marinas@arm.com" <catalin.marinas@arm.com>, "bhelgaas@google.com" <bhelgaas@google.com>, "shawnguo@kernel.org" <shawnguo@kernel.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCHv9 08/12] PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors Date: Mon, 13 Jan 2020 11:31:35 +0000 [thread overview] Message-ID: <20200113113135.GN42593@e119886-lin.cambridge.arm.com> (raw) In-Reply-To: <20191120034451.30102-9-Zhiqiang.Hou@nxp.com> On Wed, Nov 20, 2019 at 03:46:10AM +0000, Z.q. Hou wrote: > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > There are some 8-bit and 16-bit registers in PCIe configuration > space, so add these accessors accordingly. > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> > Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> > --- > V9: > - No change > > .../pci/controller/mobiveil/pcie-mobiveil.h | 23 +++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h > index 37116c2a19fe..750a7fd95bc1 100644 > --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h > +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h > @@ -182,10 +182,33 @@ static inline u32 mobiveil_csr_readl(struct mobiveil_pcie *pcie, u32 off) > return mobiveil_csr_read(pcie, off, 0x4); > } > > +static inline u32 mobiveil_csr_readw(struct mobiveil_pcie *pcie, u32 off) > +{ > + return mobiveil_csr_read(pcie, off, 0x2); > +} > + > +static inline u32 mobiveil_csr_readb(struct mobiveil_pcie *pcie, u32 off) > +{ > + return mobiveil_csr_read(pcie, off, 0x1); > +} Do you think the above two return types should reflect the size of the access? Thanks, Andrew Murray > + > + > static inline void mobiveil_csr_writel(struct mobiveil_pcie *pcie, u32 val, > u32 off) > { > mobiveil_csr_write(pcie, val, off, 0x4); > } > > +static inline void mobiveil_csr_writew(struct mobiveil_pcie *pcie, u32 val, > + u32 off) > +{ > + mobiveil_csr_write(pcie, val, off, 0x2); > +} > + > +static inline void mobiveil_csr_writeb(struct mobiveil_pcie *pcie, u32 val, > + u32 off) > +{ > + mobiveil_csr_write(pcie, val, off, 0x1); > +} > + > #endif /* _PCIE_MOBIVEIL_H */ > -- > 2.17.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-01-13 11:31 UTC|newest] Thread overview: 128+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-20 3:45 [PATCHv9 00/12] PCI: Recode Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Z.q. Hou 2019-11-20 3:45 ` Z.q. Hou 2019-11-20 3:45 ` [PATCHv9 01/12] PCI: mobiveil: Re-abstract the private structure Z.q. Hou 2019-11-20 3:45 ` Z.q. Hou 2020-01-13 10:09 ` Andrew Murray 2020-01-13 10:09 ` Andrew Murray 2020-02-06 11:04 ` Z.q. Hou 2020-02-06 11:04 ` Z.q. Hou 2020-02-06 11:27 ` Andrew Murray 2020-02-06 11:27 ` Andrew Murray 2019-11-20 3:45 ` [PATCHv9 02/12] PCI: mobiveil: Move the host initialization into a routine Z.q. Hou 2019-11-20 3:45 ` Z.q. Hou 2020-01-13 10:19 ` Andrew Murray 2020-01-13 10:19 ` Andrew Murray 2020-02-06 11:14 ` Z.q. Hou 2020-02-06 11:14 ` Z.q. Hou 2019-11-20 3:45 ` [PATCHv9 03/12] PCI: mobiveil: Collect the interrupt related operations " Z.q. Hou 2019-11-20 3:45 ` Z.q. Hou 2020-01-13 10:34 ` Andrew Murray 2020-01-13 10:34 ` Andrew Murray 2020-02-06 11:30 ` Z.q. Hou 2020-02-06 11:30 ` Z.q. Hou 2019-11-20 3:45 ` [PATCHv9 04/12] PCI: mobiveil: Modularize the Mobiveil PCIe Host Bridge IP driver Z.q. Hou 2019-11-20 3:45 ` Z.q. Hou 2020-01-13 11:05 ` Andrew Murray 2020-01-13 11:05 ` Andrew Murray 2020-02-06 12:25 ` Z.q. Hou 2020-02-06 12:25 ` Z.q. Hou 2019-11-20 3:45 ` [PATCHv9 05/12] PCI: mobiveil: Add callback function for interrupt initialization Z.q. Hou 2019-11-20 3:45 ` Z.q. Hou 2020-01-13 11:19 ` Andrew Murray 2020-01-13 11:19 ` Andrew Murray 2020-02-06 13:25 ` Z.q. Hou 2020-02-06 13:25 ` Z.q. Hou 2019-11-20 3:45 ` [PATCHv9 06/12] PCI: mobiveil: Add callback function for link up check Z.q. Hou 2019-11-20 3:45 ` Z.q. Hou 2020-01-13 11:22 ` Andrew Murray 2020-01-13 11:22 ` Andrew Murray 2020-02-06 13:25 ` Z.q. Hou 2020-02-06 13:25 ` Z.q. Hou 2019-11-20 3:46 ` [PATCHv9 07/12] PCI: mobiveil: Make mobiveil_host_init() can be used to re-init host Z.q. Hou 2019-11-20 3:46 ` Z.q. Hou 2020-01-13 11:26 ` Andrew Murray 2020-01-13 11:26 ` Andrew Murray 2020-02-06 13:27 ` Z.q. Hou 2020-02-06 13:27 ` Z.q. Hou 2019-11-20 3:46 ` [PATCHv9 08/12] PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors Z.q. Hou 2019-11-20 3:46 ` Z.q. Hou 2020-01-13 11:31 ` Andrew Murray [this message] 2020-01-13 11:31 ` Andrew Murray 2020-02-06 13:45 ` Z.q. Hou 2020-02-06 13:45 ` Z.q. Hou 2019-11-20 3:46 ` [PATCHv9 09/12] dt-bindings: PCI: Add NXP Layerscape SoCs PCIe Gen4 controller Z.q. Hou 2019-11-20 3:46 ` Z.q. Hou 2019-11-20 3:46 ` [PATCHv9 10/12] PCI: mobiveil: Add PCIe Gen4 RC driver for NXP Layerscape SoCs Z.q. Hou 2019-11-20 3:46 ` Z.q. Hou 2020-01-13 12:02 ` Andrew Murray 2020-01-13 12:02 ` Andrew Murray 2020-02-06 13:45 ` Z.q. Hou 2020-02-06 13:45 ` Z.q. Hou 2020-02-06 14:29 ` Andrew Murray 2020-02-06 14:29 ` Andrew Murray 2019-11-20 3:46 ` [PATCHv9 11/12] arm64: dts: lx2160a: Add PCIe controller DT nodes Z.q. Hou 2019-11-20 3:46 ` Z.q. Hou 2019-11-20 3:46 ` [PATCHv9 12/12] arm64: defconfig: Enable CONFIG_PCIE_LAYERSCAPE_GEN4 Z.q. Hou 2019-11-20 3:46 ` Z.q. Hou 2019-11-20 9:57 ` [PATCHv9 00/12] PCI: Recode Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Russell King - ARM Linux admin 2019-11-20 9:57 ` Russell King - ARM Linux admin 2019-11-20 10:30 ` Z.q. Hou 2019-11-20 10:30 ` Z.q. Hou 2019-12-13 18:37 ` Olof Johansson 2019-12-13 18:37 ` Olof Johansson 2019-12-17 2:50 ` Z.q. Hou 2019-12-17 2:50 ` Z.q. Hou 2020-01-10 15:33 ` Lorenzo Pieralisi 2020-01-10 15:33 ` Lorenzo Pieralisi 2020-01-10 17:05 ` Olof Johansson 2020-01-10 17:05 ` Olof Johansson 2020-02-06 10:57 ` Z.q. Hou 2020-02-06 10:57 ` Z.q. Hou 2020-02-10 15:12 ` Olof Johansson 2020-02-10 15:12 ` Olof Johansson 2020-02-10 15:22 ` Russell King - ARM Linux admin 2020-02-10 15:22 ` Russell King - ARM Linux admin 2020-02-10 15:28 ` Olof Johansson 2020-02-10 15:28 ` Olof Johansson 2020-02-10 16:15 ` Russell King - ARM Linux admin 2020-02-10 16:15 ` Russell King - ARM Linux admin 2020-02-10 17:20 ` Russell King - ARM Linux admin 2020-02-10 17:20 ` Russell King - ARM Linux admin 2020-02-10 18:33 ` Olof Johansson 2020-02-10 18:33 ` Olof Johansson 2020-02-10 18:41 ` Li Yang 2020-02-10 18:41 ` Li Yang 2020-02-10 19:48 ` Li Yang 2020-02-10 19:48 ` Li Yang 2020-02-11 12:13 ` Laurentiu Tudor 2020-02-11 12:13 ` Laurentiu Tudor 2020-02-11 13:04 ` Robin Murphy 2020-02-11 13:04 ` Robin Murphy 2020-02-11 13:55 ` Laurentiu Tudor 2020-02-11 13:55 ` Laurentiu Tudor 2020-02-11 14:51 ` Robin Murphy 2020-02-11 14:51 ` Robin Murphy 2020-02-11 14:48 ` Olof Johansson 2020-02-11 14:48 ` Olof Johansson 2020-02-11 15:14 ` Laurentiu Tudor 2020-02-11 15:14 ` Laurentiu Tudor 2020-02-29 9:55 ` Russell King - ARM Linux admin 2020-02-29 9:55 ` Russell King - ARM Linux admin 2020-02-29 11:04 ` Russell King - ARM Linux admin 2020-02-29 11:04 ` Russell King - ARM Linux admin 2020-02-29 12:08 ` Russell King - ARM Linux admin 2020-02-29 12:08 ` Russell King - ARM Linux admin 2020-02-29 13:32 ` Russell King - ARM Linux admin 2020-02-29 13:32 ` Russell King - ARM Linux admin 2020-02-29 15:19 ` Theodore Y. Ts'o 2020-02-29 15:19 ` Theodore Y. Ts'o 2020-02-29 17:03 ` Russell King - ARM Linux admin 2020-02-29 17:03 ` Russell King - ARM Linux admin 2020-02-29 18:03 ` Theodore Y. Ts'o 2020-02-29 18:03 ` Theodore Y. Ts'o 2020-06-05 23:53 ` Russell King - ARM Linux admin 2020-06-05 23:53 ` Russell King - ARM Linux admin 2020-06-06 10:19 ` Russell King - ARM Linux admin 2020-06-06 10:19 ` Russell King - ARM Linux admin 2020-02-10 15:33 ` Lorenzo Pieralisi 2020-02-10 15:33 ` Lorenzo Pieralisi
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