From: Anand Moon <linux.amoon@gmail.com> To: linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Felipe Balbi <balbi@kernel.org>, Krzysztof Kozlowski <krzk@kernel.org>, Marek Szyprowski <m.szyprowski@samsung.com>, Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCHv2 3/3] usb: dwc3: exynos: Add support for Exynos5422 suspend clk Date: Sun, 1 Mar 2020 21:20:18 +0000 [thread overview] Message-ID: <20200301212019.2248-4-linux.amoon@gmail.com> (raw) In-Reply-To: <20200301212019.2248-1-linux.amoon@gmail.com> Exynos5422 DWC3 module support two clk USBD300 and SCLK_USBD300 so add missing code to enable/disable code and suspend clk, for this add a new compatible samsung,exynos5420-dwusb3 to help configure dwc3 code and dwc3 suspend clock. Suspend clock controls the PHY power change from P0 to P1/P2/P3 during U0 to U1/U2/U3 transition. Signed-off-by: Anand Moon <linux.amoon@gmail.com> --- Append the Power Managment State control by the suspend clk for USB3.0 --- drivers/usb/dwc3/dwc3-exynos.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c index 90bb022737da..48b68b6f0dc8 100644 --- a/drivers/usb/dwc3/dwc3-exynos.c +++ b/drivers/usb/dwc3/dwc3-exynos.c @@ -162,6 +162,12 @@ static const struct dwc3_exynos_driverdata exynos5250_drvdata = { .suspend_clk_idx = -1, }; +static const struct dwc3_exynos_driverdata exynos5420_drvdata = { + .clk_names = { "usbdrd30", "usbdrd30_susp_clk"}, + .num_clks = 2, + .suspend_clk_idx = 1, +}; + static const struct dwc3_exynos_driverdata exynos5433_drvdata = { .clk_names = { "aclk", "susp_clk", "pipe_pclk", "phyclk" }, .num_clks = 4, @@ -178,6 +184,9 @@ static const struct of_device_id exynos_dwc3_match[] = { { .compatible = "samsung,exynos5250-dwusb3", .data = &exynos5250_drvdata, + }, { + .compatible = "samsung,exynos5420-dwusb3", + .data = &exynos5420_drvdata, }, { .compatible = "samsung,exynos5433-dwusb3", .data = &exynos5433_drvdata, -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Anand Moon <linux.amoon@gmail.com> To: linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Mark Rutland <mark.rutland@arm.com>, Felipe Balbi <balbi@kernel.org>, linux-samsung-soc@vger.kernel.org, Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, linux-kernel@vger.kernel.org, Krzysztof Kozlowski <krzk@kernel.org>, Rob Herring <robh+dt@kernel.org>, Marek Szyprowski <m.szyprowski@samsung.com> Subject: [PATCHv2 3/3] usb: dwc3: exynos: Add support for Exynos5422 suspend clk Date: Sun, 1 Mar 2020 21:20:18 +0000 [thread overview] Message-ID: <20200301212019.2248-4-linux.amoon@gmail.com> (raw) In-Reply-To: <20200301212019.2248-1-linux.amoon@gmail.com> Exynos5422 DWC3 module support two clk USBD300 and SCLK_USBD300 so add missing code to enable/disable code and suspend clk, for this add a new compatible samsung,exynos5420-dwusb3 to help configure dwc3 code and dwc3 suspend clock. Suspend clock controls the PHY power change from P0 to P1/P2/P3 during U0 to U1/U2/U3 transition. Signed-off-by: Anand Moon <linux.amoon@gmail.com> --- Append the Power Managment State control by the suspend clk for USB3.0 --- drivers/usb/dwc3/dwc3-exynos.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c index 90bb022737da..48b68b6f0dc8 100644 --- a/drivers/usb/dwc3/dwc3-exynos.c +++ b/drivers/usb/dwc3/dwc3-exynos.c @@ -162,6 +162,12 @@ static const struct dwc3_exynos_driverdata exynos5250_drvdata = { .suspend_clk_idx = -1, }; +static const struct dwc3_exynos_driverdata exynos5420_drvdata = { + .clk_names = { "usbdrd30", "usbdrd30_susp_clk"}, + .num_clks = 2, + .suspend_clk_idx = 1, +}; + static const struct dwc3_exynos_driverdata exynos5433_drvdata = { .clk_names = { "aclk", "susp_clk", "pipe_pclk", "phyclk" }, .num_clks = 4, @@ -178,6 +184,9 @@ static const struct of_device_id exynos_dwc3_match[] = { { .compatible = "samsung,exynos5250-dwusb3", .data = &exynos5250_drvdata, + }, { + .compatible = "samsung,exynos5420-dwusb3", + .data = &exynos5420_drvdata, }, { .compatible = "samsung,exynos5433-dwusb3", .data = &exynos5433_drvdata, -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-03-01 21:20 UTC|newest] Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-03-01 21:20 [PATCHv2 0/3] Add support for suspend clk for Exynos5422 SoC Anand Moon 2020-03-01 21:20 ` Anand Moon 2020-03-01 21:20 ` [PATCHv2 1/3] devicetree: bindings: exynos: Add new compatible for Exynos5420 dwc3 clocks support Anand Moon 2020-03-01 21:20 ` Anand Moon 2020-03-03 9:46 ` Krzysztof Kozlowski 2020-03-03 9:46 ` Krzysztof Kozlowski 2020-03-05 4:07 ` Anand Moon 2020-03-05 4:07 ` Anand Moon 2020-03-04 17:00 ` Rob Herring 2020-03-04 17:00 ` Rob Herring 2020-03-15 9:28 ` Felipe Balbi 2020-03-15 9:28 ` Felipe Balbi 2020-03-01 21:20 ` [PATCHv2 2/3] ARM: dts: exynos: Add missing usbdrd3 suspend clk Anand Moon 2020-03-01 21:20 ` Anand Moon 2020-03-01 21:20 ` Anand Moon [this message] 2020-03-01 21:20 ` [PATCHv2 3/3] usb: dwc3: exynos: Add support for Exynos5422 " Anand Moon 2020-03-04 8:11 ` [PATCHv2 0/3] Add support for suspend clk for Exynos5422 SoC Krzysztof Kozlowski 2020-03-04 8:11 ` Krzysztof Kozlowski 2020-03-04 17:53 ` Anand Moon 2020-03-04 17:53 ` Anand Moon
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