From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Jason Cooper <jason@lakedaemon.net>,
Robert Richter <rrichter@marvell.com>,
Thomas Gleixner <tglx@linutronix.de>,
Zenghui Yu <yuzenghui@huawei.com>,
Eric Auger <eric.auger@redhat.com>,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: [PATCH v5 07/23] irqchip/gic-v4.1: Map the ITS SGIR register page
Date: Wed, 4 Mar 2020 20:33:14 +0000 [thread overview]
Message-ID: <20200304203330.4967-8-maz@kernel.org> (raw)
In-Reply-To: <20200304203330.4967-1-maz@kernel.org>
One of the new features of GICv4.1 is to allow virtual SGIs to be
directly signaled to a VPE. For that, the ITS has grown a new
64kB page containing only a single register that is used to
signal a SGI to a given VPE.
Add a second mapping covering this new 64kB range, and take this
opportunity to limit the original mapping to 64kB, which is enough
to cover the span of the ITS registers.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
---
drivers/irqchip/irq-gic-v3-its.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index bcc1a0957cda..54d6fdf7a28e 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -96,6 +96,7 @@ struct its_node {
struct mutex dev_alloc_lock;
struct list_head entry;
void __iomem *base;
+ void __iomem *sgir_base;
phys_addr_t phys_base;
struct its_cmd_block *cmd_base;
struct its_cmd_block *cmd_write;
@@ -4456,7 +4457,7 @@ static int __init its_probe_one(struct resource *res,
struct page *page;
int err;
- its_base = ioremap(res->start, resource_size(res));
+ its_base = ioremap(res->start, SZ_64K);
if (!its_base) {
pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start);
return -ENOMEM;
@@ -4507,6 +4508,13 @@ static int __init its_probe_one(struct resource *res,
if (is_v4_1(its)) {
u32 svpet = FIELD_GET(GITS_TYPER_SVPET, typer);
+
+ its->sgir_base = ioremap(res->start + SZ_128K, SZ_64K);
+ if (!its->sgir_base) {
+ err = -ENOMEM;
+ goto out_free_its;
+ }
+
its->mpidr = readl_relaxed(its_base + GITS_MPIDR);
pr_info("ITS@%pa: Using GICv4.1 mode %08x %08x\n",
@@ -4520,7 +4528,7 @@ static int __init its_probe_one(struct resource *res,
get_order(ITS_CMD_QUEUE_SZ));
if (!page) {
err = -ENOMEM;
- goto out_free_its;
+ goto out_unmap_sgir;
}
its->cmd_base = (void *)page_address(page);
its->cmd_write = its->cmd_base;
@@ -4587,6 +4595,9 @@ static int __init its_probe_one(struct resource *res,
its_free_tables(its);
out_free_cmd:
free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ));
+out_unmap_sgir:
+ if (its->sgir_base)
+ iounmap(its->sgir_base);
out_free_its:
kfree(its);
out_unmap:
--
2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Jason Cooper <jason@lakedaemon.net>,
Robert Richter <rrichter@marvell.com>,
Thomas Gleixner <tglx@linutronix.de>
Subject: [PATCH v5 07/23] irqchip/gic-v4.1: Map the ITS SGIR register page
Date: Wed, 4 Mar 2020 20:33:14 +0000 [thread overview]
Message-ID: <20200304203330.4967-8-maz@kernel.org> (raw)
In-Reply-To: <20200304203330.4967-1-maz@kernel.org>
One of the new features of GICv4.1 is to allow virtual SGIs to be
directly signaled to a VPE. For that, the ITS has grown a new
64kB page containing only a single register that is used to
signal a SGI to a given VPE.
Add a second mapping covering this new 64kB range, and take this
opportunity to limit the original mapping to 64kB, which is enough
to cover the span of the ITS registers.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
---
drivers/irqchip/irq-gic-v3-its.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index bcc1a0957cda..54d6fdf7a28e 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -96,6 +96,7 @@ struct its_node {
struct mutex dev_alloc_lock;
struct list_head entry;
void __iomem *base;
+ void __iomem *sgir_base;
phys_addr_t phys_base;
struct its_cmd_block *cmd_base;
struct its_cmd_block *cmd_write;
@@ -4456,7 +4457,7 @@ static int __init its_probe_one(struct resource *res,
struct page *page;
int err;
- its_base = ioremap(res->start, resource_size(res));
+ its_base = ioremap(res->start, SZ_64K);
if (!its_base) {
pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start);
return -ENOMEM;
@@ -4507,6 +4508,13 @@ static int __init its_probe_one(struct resource *res,
if (is_v4_1(its)) {
u32 svpet = FIELD_GET(GITS_TYPER_SVPET, typer);
+
+ its->sgir_base = ioremap(res->start + SZ_128K, SZ_64K);
+ if (!its->sgir_base) {
+ err = -ENOMEM;
+ goto out_free_its;
+ }
+
its->mpidr = readl_relaxed(its_base + GITS_MPIDR);
pr_info("ITS@%pa: Using GICv4.1 mode %08x %08x\n",
@@ -4520,7 +4528,7 @@ static int __init its_probe_one(struct resource *res,
get_order(ITS_CMD_QUEUE_SZ));
if (!page) {
err = -ENOMEM;
- goto out_free_its;
+ goto out_unmap_sgir;
}
its->cmd_base = (void *)page_address(page);
its->cmd_write = its->cmd_base;
@@ -4587,6 +4595,9 @@ static int __init its_probe_one(struct resource *res,
its_free_tables(its);
out_free_cmd:
free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ));
+out_unmap_sgir:
+ if (its->sgir_base)
+ iounmap(its->sgir_base);
out_free_its:
kfree(its);
out_unmap:
--
2.20.1
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Jason Cooper <jason@lakedaemon.net>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Eric Auger <eric.auger@redhat.com>,
Robert Richter <rrichter@marvell.com>,
James Morse <james.morse@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Thomas Gleixner <tglx@linutronix.de>,
Julien Thierry <julien.thierry.kdev@gmail.com>
Subject: [PATCH v5 07/23] irqchip/gic-v4.1: Map the ITS SGIR register page
Date: Wed, 4 Mar 2020 20:33:14 +0000 [thread overview]
Message-ID: <20200304203330.4967-8-maz@kernel.org> (raw)
In-Reply-To: <20200304203330.4967-1-maz@kernel.org>
One of the new features of GICv4.1 is to allow virtual SGIs to be
directly signaled to a VPE. For that, the ITS has grown a new
64kB page containing only a single register that is used to
signal a SGI to a given VPE.
Add a second mapping covering this new 64kB range, and take this
opportunity to limit the original mapping to 64kB, which is enough
to cover the span of the ITS registers.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
---
drivers/irqchip/irq-gic-v3-its.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index bcc1a0957cda..54d6fdf7a28e 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -96,6 +96,7 @@ struct its_node {
struct mutex dev_alloc_lock;
struct list_head entry;
void __iomem *base;
+ void __iomem *sgir_base;
phys_addr_t phys_base;
struct its_cmd_block *cmd_base;
struct its_cmd_block *cmd_write;
@@ -4456,7 +4457,7 @@ static int __init its_probe_one(struct resource *res,
struct page *page;
int err;
- its_base = ioremap(res->start, resource_size(res));
+ its_base = ioremap(res->start, SZ_64K);
if (!its_base) {
pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start);
return -ENOMEM;
@@ -4507,6 +4508,13 @@ static int __init its_probe_one(struct resource *res,
if (is_v4_1(its)) {
u32 svpet = FIELD_GET(GITS_TYPER_SVPET, typer);
+
+ its->sgir_base = ioremap(res->start + SZ_128K, SZ_64K);
+ if (!its->sgir_base) {
+ err = -ENOMEM;
+ goto out_free_its;
+ }
+
its->mpidr = readl_relaxed(its_base + GITS_MPIDR);
pr_info("ITS@%pa: Using GICv4.1 mode %08x %08x\n",
@@ -4520,7 +4528,7 @@ static int __init its_probe_one(struct resource *res,
get_order(ITS_CMD_QUEUE_SZ));
if (!page) {
err = -ENOMEM;
- goto out_free_its;
+ goto out_unmap_sgir;
}
its->cmd_base = (void *)page_address(page);
its->cmd_write = its->cmd_base;
@@ -4587,6 +4595,9 @@ static int __init its_probe_one(struct resource *res,
its_free_tables(its);
out_free_cmd:
free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ));
+out_unmap_sgir:
+ if (its->sgir_base)
+ iounmap(its->sgir_base);
out_free_its:
kfree(its);
out_unmap:
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-03-04 20:34 UTC|newest]
Thread overview: 312+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-04 20:33 [PATCH v5 00/23] irqchip/gic-v4: GICv4.1 architecture support Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 01/23] irqchip/gic-v3: Use SGIs without active state if offered Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-12 6:30 ` Zenghui Yu
2020-03-12 6:30 ` Zenghui Yu
2020-03-12 6:30 ` Zenghui Yu
2020-03-12 9:28 ` Marc Zyngier
2020-03-12 9:28 ` Marc Zyngier
2020-03-12 9:28 ` Marc Zyngier
2020-03-12 12:05 ` Marc Zyngier
2020-03-12 12:05 ` Marc Zyngier
2020-03-12 12:05 ` Marc Zyngier
2020-03-13 1:39 ` Zenghui Yu
2020-03-13 1:39 ` Zenghui Yu
2020-03-13 1:39 ` Zenghui Yu
2020-03-12 17:16 ` Auger Eric
2020-03-12 17:16 ` Auger Eric
2020-03-12 17:16 ` Auger Eric
2020-03-12 17:23 ` Marc Zyngier
2020-03-12 17:23 ` Marc Zyngier
2020-03-12 17:23 ` Marc Zyngier
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 02/23] irqchip/gic-v4.1: Skip absent CPUs while iterating over redistributors Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-16 17:10 ` Auger Eric
2020-03-16 17:10 ` Auger Eric
2020-03-16 17:10 ` Auger Eric
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 03/23] irqchip/gic-v4.1: Ensure mutual exclusion between vPE affinity change and RD access Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-12 6:56 ` Zenghui Yu
2020-03-12 6:56 ` Zenghui Yu
2020-03-12 6:56 ` Zenghui Yu
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 04/23] irqchip/gic-v4.1: Wait for completion of redistributor's INVALL operation Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-20 14:23 ` Auger Eric
2020-03-20 14:23 ` Auger Eric
2020-03-20 14:23 ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 05/23] irqchip/gic-v4.1: Ensure mutual exclusion betwen invalidations on the same RD Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-12 7:11 ` Zenghui Yu
2020-03-12 7:11 ` Zenghui Yu
2020-03-12 7:11 ` Zenghui Yu
2020-03-20 14:23 ` Auger Eric
2020-03-20 14:23 ` Auger Eric
2020-03-20 14:23 ` Auger Eric
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 06/23] irqchip/gic-v4.1: Advertise support v4.1 to KVM Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-16 17:10 ` Auger Eric
2020-03-16 17:10 ` Auger Eric
2020-03-16 17:10 ` Auger Eric
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier [this message]
2020-03-04 20:33 ` [PATCH v5 07/23] irqchip/gic-v4.1: Map the ITS SGIR register page Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-16 17:10 ` Auger Eric
2020-03-16 17:10 ` Auger Eric
2020-03-16 17:10 ` Auger Eric
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 08/23] irqchip/gic-v4.1: Plumb skeletal VSGI irqchip Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-16 17:10 ` Auger Eric
2020-03-16 17:10 ` Auger Eric
2020-03-16 17:10 ` Auger Eric
2020-03-19 10:03 ` Marc Zyngier
2020-03-19 10:03 ` Marc Zyngier
2020-03-19 10:03 ` Marc Zyngier
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 09/23] irqchip/gic-v4.1: Add initial SGI configuration Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-16 17:53 ` Auger Eric
2020-03-16 17:53 ` Auger Eric
2020-03-16 17:53 ` Auger Eric
2020-03-17 2:02 ` Zenghui Yu
2020-03-17 2:02 ` Zenghui Yu
2020-03-17 2:02 ` Zenghui Yu
2020-03-17 8:36 ` Auger Eric
2020-03-17 8:36 ` Auger Eric
2020-03-17 8:36 ` Auger Eric
2020-03-19 10:20 ` Marc Zyngier
2020-03-19 10:20 ` Marc Zyngier
2020-03-19 10:20 ` Marc Zyngier
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 10/23] irqchip/gic-v4.1: Plumb mask/unmask SGI callbacks Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-16 18:15 ` Auger Eric
2020-03-16 18:15 ` Auger Eric
2020-03-16 18:15 ` Auger Eric
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 11/23] irqchip/gic-v4.1: Plumb get/set_irqchip_state " Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-12 7:41 ` Zenghui Yu
2020-03-12 7:41 ` Zenghui Yu
2020-03-12 7:41 ` Zenghui Yu
2020-03-16 21:43 ` Auger Eric
2020-03-16 21:43 ` Auger Eric
2020-03-16 21:43 ` Auger Eric
2020-03-19 10:27 ` Marc Zyngier
2020-03-19 10:27 ` Marc Zyngier
2020-03-19 10:27 ` Marc Zyngier
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 12/23] irqchip/gic-v4.1: Plumb set_vcpu_affinity " Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-17 10:35 ` Auger Eric
2020-03-17 10:35 ` Auger Eric
2020-03-17 10:35 ` Auger Eric
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 13/23] irqchip/gic-v4.1: Move doorbell management to the GICv4 abstraction layer Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-12 8:20 ` Zenghui Yu
2020-03-12 8:20 ` Zenghui Yu
2020-03-12 8:20 ` Zenghui Yu
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 14/23] irqchip/gic-v4.1: Add VSGI allocation/teardown Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-12 8:06 ` Zenghui Yu
2020-03-12 8:06 ` Zenghui Yu
2020-03-12 8:06 ` Zenghui Yu
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 15/23] irqchip/gic-v4.1: Add VSGI property setup Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-12 8:09 ` Zenghui Yu
2020-03-12 8:09 ` Zenghui Yu
2020-03-12 8:09 ` Zenghui Yu
2020-03-17 10:30 ` Auger Eric
2020-03-17 10:30 ` Auger Eric
2020-03-17 10:30 ` Auger Eric
2020-03-19 10:57 ` Marc Zyngier
2020-03-19 10:57 ` Marc Zyngier
2020-03-19 10:57 ` Marc Zyngier
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 16/23] irqchip/gic-v4.1: Eagerly vmap vPEs Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-12 8:12 ` Zenghui Yu
2020-03-12 8:12 ` Zenghui Yu
2020-03-12 8:12 ` Zenghui Yu
2020-03-17 2:49 ` Zenghui Yu
2020-03-17 2:49 ` Zenghui Yu
2020-03-17 2:49 ` Zenghui Yu
2020-03-19 10:55 ` Marc Zyngier
2020-03-19 10:55 ` Marc Zyngier
2020-03-19 10:55 ` Marc Zyngier
2020-03-20 2:31 ` Zenghui Yu
2020-03-20 2:31 ` Zenghui Yu
2020-03-20 2:31 ` Zenghui Yu
2020-03-29 20:26 ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 17/23] KVM: arm64: GICv4.1: Let doorbells be auto-enabled Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-12 8:15 ` Zenghui Yu
2020-03-12 8:15 ` Zenghui Yu
2020-03-12 8:15 ` Zenghui Yu
2020-03-17 11:04 ` Auger Eric
2020-03-17 11:04 ` Auger Eric
2020-03-17 11:04 ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 18/23] KVM: arm64: GICv4.1: Add direct injection capability to SGI registers Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-18 3:28 ` Zenghui Yu
2020-03-18 3:28 ` Zenghui Yu
2020-03-18 3:28 ` Zenghui Yu
2020-03-20 8:11 ` Auger Eric
2020-03-20 8:11 ` Auger Eric
2020-03-20 8:11 ` Auger Eric
2020-03-20 10:05 ` Marc Zyngier
2020-03-20 10:05 ` Marc Zyngier
2020-03-20 10:05 ` Marc Zyngier
2020-03-20 10:56 ` Auger Eric
2020-03-20 10:56 ` Auger Eric
2020-03-20 10:56 ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 19/23] KVM: arm64: GICv4.1: Allow SGIs to switch between HW and SW interrupts Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-19 16:16 ` Auger Eric
2020-03-19 16:16 ` Auger Eric
2020-03-19 16:16 ` Auger Eric
2020-03-19 19:52 ` Marc Zyngier
2020-03-19 19:52 ` Marc Zyngier
2020-03-19 19:52 ` Marc Zyngier
2020-03-19 20:13 ` Auger Eric
2020-03-19 20:13 ` Auger Eric
2020-03-19 20:13 ` Auger Eric
2020-03-20 9:17 ` Marc Zyngier
2020-03-20 9:17 ` Marc Zyngier
2020-03-20 9:17 ` Marc Zyngier
2020-03-20 4:22 ` Zenghui Yu
2020-03-20 4:22 ` Zenghui Yu
2020-03-20 4:22 ` Zenghui Yu
2020-03-04 20:33 ` [PATCH v5 20/23] KVM: arm64: GICv4.1: Plumb SGI implementation selection in the distributor Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-18 6:34 ` Zenghui Yu
2020-03-18 6:34 ` Zenghui Yu
2020-03-18 6:34 ` Zenghui Yu
2020-03-19 12:10 ` Marc Zyngier
2020-03-19 12:10 ` Marc Zyngier
2020-03-19 12:10 ` Marc Zyngier
2020-03-19 20:38 ` Auger Eric
2020-03-19 20:38 ` Auger Eric
2020-03-19 20:38 ` Auger Eric
2020-03-20 3:08 ` Zenghui Yu
2020-03-20 3:08 ` Zenghui Yu
2020-03-20 3:08 ` Zenghui Yu
2020-03-20 7:59 ` Auger Eric
2020-03-20 7:59 ` Auger Eric
2020-03-20 7:59 ` Auger Eric
2020-03-20 9:46 ` Marc Zyngier
2020-03-20 9:46 ` Marc Zyngier
2020-03-20 9:46 ` Marc Zyngier
2020-03-20 11:09 ` Auger Eric
2020-03-20 11:09 ` Auger Eric
2020-03-20 11:09 ` Auger Eric
2020-03-20 11:20 ` Marc Zyngier
2020-03-20 11:20 ` Marc Zyngier
2020-03-20 11:20 ` Marc Zyngier
2020-03-20 3:53 ` Zenghui Yu
2020-03-20 3:53 ` Zenghui Yu
2020-03-20 3:53 ` Zenghui Yu
2020-03-20 9:01 ` Marc Zyngier
2020-03-20 9:01 ` Marc Zyngier
2020-03-20 9:01 ` Marc Zyngier
2020-03-23 8:11 ` Zenghui Yu
2020-03-23 8:11 ` Zenghui Yu
2020-03-23 8:11 ` Zenghui Yu
2020-03-23 8:25 ` Marc Zyngier
2020-03-23 8:25 ` Marc Zyngier
2020-03-23 8:25 ` Marc Zyngier
2020-03-23 12:40 ` Zenghui Yu
2020-03-23 12:40 ` Zenghui Yu
2020-03-23 12:40 ` Zenghui Yu
2020-03-04 20:33 ` [PATCH v5 21/23] KVM: arm64: GICv4.1: Reload VLPI configuration on distributor enable/disable Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-18 3:17 ` Zenghui Yu
2020-03-18 3:17 ` Zenghui Yu
2020-03-18 3:17 ` Zenghui Yu
2020-03-19 12:18 ` Marc Zyngier
2020-03-19 12:18 ` Marc Zyngier
2020-03-19 12:18 ` Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 22/23] KVM: arm64: GICv4.1: Allow non-trapping WFI when using HW SGIs Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-20 4:23 ` Zenghui Yu
2020-03-20 4:23 ` Zenghui Yu
2020-03-20 4:23 ` Zenghui Yu
2020-03-20 8:12 ` Auger Eric
2020-03-20 8:12 ` Auger Eric
2020-03-20 8:12 ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 23/23] KVM: arm64: GICv4.1: Expose HW-based SGIs in debugfs Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-04 20:33 ` Marc Zyngier
2020-03-18 3:19 ` Zenghui Yu
2020-03-18 3:19 ` Zenghui Yu
2020-03-18 3:19 ` Zenghui Yu
2020-03-19 15:05 ` Auger Eric
2020-03-19 15:05 ` Auger Eric
2020-03-19 15:05 ` Auger Eric
2020-03-19 15:21 ` Marc Zyngier
2020-03-19 15:21 ` Marc Zyngier
2020-03-19 15:21 ` Marc Zyngier
2020-03-19 15:43 ` Auger Eric
2020-03-19 15:43 ` Auger Eric
2020-03-19 15:43 ` Auger Eric
2020-03-19 16:16 ` Marc Zyngier
2020-03-19 16:16 ` Marc Zyngier
2020-03-19 16:16 ` Marc Zyngier
2020-03-19 16:17 ` Auger Eric
2020-03-19 16:17 ` Auger Eric
2020-03-19 16:17 ` Auger Eric
2020-03-20 4:38 ` Zenghui Yu
2020-03-20 4:38 ` Zenghui Yu
2020-03-20 4:38 ` Zenghui Yu
2020-03-20 9:09 ` Marc Zyngier
2020-03-20 9:09 ` Marc Zyngier
2020-03-20 9:09 ` Marc Zyngier
2020-03-20 11:35 ` Zenghui Yu
2020-03-20 11:35 ` Zenghui Yu
2020-03-20 11:35 ` Zenghui Yu
2020-03-20 11:46 ` Marc Zyngier
2020-03-20 11:46 ` Marc Zyngier
2020-03-20 11:46 ` Marc Zyngier
2020-03-20 12:09 ` Zenghui Yu
2020-03-20 12:09 ` Zenghui Yu
2020-03-20 12:09 ` Zenghui Yu
2020-03-05 3:39 ` [PATCH v5 00/23] irqchip/gic-v4: GICv4.1 architecture support Zenghui Yu
2020-03-05 3:39 ` Zenghui Yu
2020-03-05 3:39 ` Zenghui Yu
2020-03-09 8:17 ` Zenghui Yu
2020-03-09 8:17 ` Zenghui Yu
2020-03-09 8:17 ` Zenghui Yu
2020-03-09 8:46 ` Marc Zyngier
2020-03-09 8:46 ` Marc Zyngier
2020-03-09 8:46 ` Marc Zyngier
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