From: Pavel Tatashin <pasha.tatashin@soleen.com> To: pasha.tatashin@soleen.com, jmorris@namei.org, sashal@kernel.org, ebiederm@xmission.com, kexec@lists.infradead.org, linux-kernel@vger.kernel.org, corbet@lwn.net, catalin.marinas@arm.com, will@kernel.org, linux-arm-kernel@lists.infradead.org, maz@kernel.org, james.morse@arm.com, vladimir.murzin@arm.com, matthias.bgg@gmail.com, bhsharma@redhat.com, linux-mm@kvack.org, mark.rutland@arm.com, steve.capper@arm.com, rfontana@redhat.com, tglx@linutronix.de, selindag@gmail.com Subject: [PATCH v9 06/18] arm64: mm: Always update TCR_EL1 from __cpu_set_tcr_t0sz() Date: Wed, 25 Mar 2020 23:24:08 -0400 [thread overview] Message-ID: <20200326032420.27220-7-pasha.tatashin@soleen.com> (raw) In-Reply-To: <20200326032420.27220-1-pasha.tatashin@soleen.com> From: James Morse <james.morse@arm.com> Because only the idmap sets a non-standard T0SZ, __cpu_set_tcr_t0sz() can check for platforms that need to do this using __cpu_uses_extended_idmap() before doing its work. The idmap is only built with enough levels, (and T0SZ bits) to map its single page. To allow hibernate, and then kexec to idmap their single page copy routines, __cpu_set_tcr_t0sz() needs to consider additional users, who may need a different number of levels/T0SZ-bits to the idmap. (i.e. VA_BITS may be enough for the idmap, but not hibernate/kexec) Always read TCR_EL1, and check whether any work needs doing for this request. __cpu_uses_extended_idmap() remains as it is used by KVM, whose idmap is also part of the kernel image. This mostly affects the cpuidle path, where we now get an extra system register read . CC: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com> CC: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Pavel Tatashin <pasha.tatashin@soleen.com> --- arch/arm64/include/asm/mmu_context.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index 3827ff4040a3..09ecbfd0ad2e 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -79,16 +79,15 @@ static inline bool __cpu_uses_extended_idmap_level(void) } /* - * Set TCR.T0SZ to its default value (based on VA_BITS) + * Ensure TCR.T0SZ is set to the provided value. */ static inline void __cpu_set_tcr_t0sz(unsigned long t0sz) { - unsigned long tcr; + unsigned long tcr = read_sysreg(tcr_el1); - if (!__cpu_uses_extended_idmap()) + if ((tcr & TCR_T0SZ_MASK) >> TCR_T0SZ_OFFSET == t0sz) return; - tcr = read_sysreg(tcr_el1); tcr &= ~TCR_T0SZ_MASK; tcr |= t0sz << TCR_T0SZ_OFFSET; write_sysreg(tcr, tcr_el1); -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Pavel Tatashin <pasha.tatashin@soleen.com> To: pasha.tatashin@soleen.com, jmorris@namei.org, sashal@kernel.org, ebiederm@xmission.com, kexec@lists.infradead.org, linux-kernel@vger.kernel.org, corbet@lwn.net, catalin.marinas@arm.com, will@kernel.org, linux-arm-kernel@lists.infradead.org, maz@kernel.org, james.morse@arm.com, vladimir.murzin@arm.com, matthias.bgg@gmail.com, bhsharma@redhat.com, linux-mm@kvack.org, mark.rutland@arm.com, steve.capper@arm.com, rfontana@redhat.com, tglx@linutronix.de, selindag@gmail.com Subject: [PATCH v9 06/18] arm64: mm: Always update TCR_EL1 from __cpu_set_tcr_t0sz() Date: Wed, 25 Mar 2020 23:24:08 -0400 [thread overview] Message-ID: <20200326032420.27220-7-pasha.tatashin@soleen.com> (raw) In-Reply-To: <20200326032420.27220-1-pasha.tatashin@soleen.com> From: James Morse <james.morse@arm.com> Because only the idmap sets a non-standard T0SZ, __cpu_set_tcr_t0sz() can check for platforms that need to do this using __cpu_uses_extended_idmap() before doing its work. The idmap is only built with enough levels, (and T0SZ bits) to map its single page. To allow hibernate, and then kexec to idmap their single page copy routines, __cpu_set_tcr_t0sz() needs to consider additional users, who may need a different number of levels/T0SZ-bits to the idmap. (i.e. VA_BITS may be enough for the idmap, but not hibernate/kexec) Always read TCR_EL1, and check whether any work needs doing for this request. __cpu_uses_extended_idmap() remains as it is used by KVM, whose idmap is also part of the kernel image. This mostly affects the cpuidle path, where we now get an extra system register read . CC: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com> CC: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Pavel Tatashin <pasha.tatashin@soleen.com> --- arch/arm64/include/asm/mmu_context.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index 3827ff4040a3..09ecbfd0ad2e 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -79,16 +79,15 @@ static inline bool __cpu_uses_extended_idmap_level(void) } /* - * Set TCR.T0SZ to its default value (based on VA_BITS) + * Ensure TCR.T0SZ is set to the provided value. */ static inline void __cpu_set_tcr_t0sz(unsigned long t0sz) { - unsigned long tcr; + unsigned long tcr = read_sysreg(tcr_el1); - if (!__cpu_uses_extended_idmap()) + if ((tcr & TCR_T0SZ_MASK) >> TCR_T0SZ_OFFSET == t0sz) return; - tcr = read_sysreg(tcr_el1); tcr &= ~TCR_T0SZ_MASK; tcr |= t0sz << TCR_T0SZ_OFFSET; write_sysreg(tcr, tcr_el1); -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-03-26 3:25 UTC|newest] Thread overview: 126+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-03-26 3:24 [PATCH v9 00/18] arm64: MMU enabled kexec relocation Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-03-26 3:24 ` [PATCH v9 01/18] arm64: kexec: make dtb_mem always enabled Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-04-29 17:00 ` James Morse 2020-04-29 17:00 ` James Morse 2020-04-29 17:00 ` James Morse 2021-01-23 0:17 ` Pavel Tatashin 2021-01-23 0:17 ` Pavel Tatashin 2021-01-23 0:17 ` Pavel Tatashin 2021-01-23 0:17 ` Pavel Tatashin 2020-03-26 3:24 ` [PATCH v9 02/18] arm64: hibernate: move page handling function to new trans_pgd.c Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-04-29 17:00 ` James Morse 2020-04-29 17:00 ` James Morse 2020-04-29 17:00 ` James Morse 2021-01-23 0:18 ` Pavel Tatashin 2021-01-23 0:18 ` Pavel Tatashin 2021-01-23 0:18 ` Pavel Tatashin 2021-01-23 0:18 ` Pavel Tatashin 2020-03-26 3:24 ` [PATCH v9 03/18] arm64: trans_pgd: make trans_pgd_map_page generic Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-04-29 17:01 ` James Morse 2020-04-29 17:01 ` James Morse 2020-04-29 17:01 ` James Morse 2021-01-22 21:52 ` Pavel Tatashin 2021-01-22 21:52 ` Pavel Tatashin 2021-01-22 21:52 ` Pavel Tatashin 2021-01-22 21:52 ` Pavel Tatashin 2020-03-26 3:24 ` [PATCH v9 04/18] arm64: trans_pgd: pass allocator trans_pgd_create_copy Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-04-29 17:01 ` James Morse 2020-04-29 17:01 ` James Morse 2020-04-29 17:01 ` James Morse 2021-01-23 0:20 ` Pavel Tatashin 2021-01-23 0:20 ` Pavel Tatashin 2021-01-23 0:20 ` Pavel Tatashin 2021-01-23 0:20 ` Pavel Tatashin 2020-03-26 3:24 ` [PATCH v9 05/18] arm64: trans_pgd: pass NULL instead of init_mm to *_populate functions Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-04-29 17:01 ` James Morse 2020-04-29 17:01 ` James Morse 2020-04-29 17:01 ` James Morse 2021-01-23 0:22 ` Pavel Tatashin 2021-01-23 0:22 ` Pavel Tatashin 2021-01-23 0:22 ` Pavel Tatashin 2021-01-23 0:22 ` Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin [this message] 2020-03-26 3:24 ` [PATCH v9 06/18] arm64: mm: Always update TCR_EL1 from __cpu_set_tcr_t0sz() Pavel Tatashin 2020-03-26 3:24 ` [PATCH v9 07/18] arm64: trans_pgd: hibernate: idmap the single page that holds the copy page routines Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-04-29 17:01 ` James Morse 2020-04-29 17:01 ` James Morse 2020-04-29 17:01 ` James Morse 2021-01-23 0:35 ` Pavel Tatashin 2021-01-23 0:35 ` Pavel Tatashin 2021-01-23 0:35 ` Pavel Tatashin 2021-01-23 0:35 ` Pavel Tatashin 2020-03-26 3:24 ` [PATCH v9 08/18] arm64: kexec: move relocation function setup Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-04-29 17:01 ` James Morse 2020-04-29 17:01 ` James Morse 2020-04-29 17:01 ` James Morse 2021-01-23 1:01 ` Pavel Tatashin 2021-01-23 1:01 ` Pavel Tatashin 2021-01-23 1:01 ` Pavel Tatashin 2021-01-23 1:01 ` Pavel Tatashin 2020-03-26 3:24 ` [PATCH v9 09/18] arm64: kexec: call kexec_image_info only once Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-04-29 17:01 ` James Morse 2020-04-29 17:01 ` James Morse 2020-04-29 17:01 ` James Morse 2020-03-26 3:24 ` [PATCH v9 10/18] arm64: kexec: cpu_soft_restart change argument types Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-04-29 17:01 ` James Morse 2020-04-29 17:01 ` James Morse 2020-04-29 17:01 ` James Morse 2021-01-23 1:14 ` Pavel Tatashin 2021-01-23 1:14 ` Pavel Tatashin 2021-01-23 1:14 ` Pavel Tatashin 2021-01-23 1:14 ` Pavel Tatashin 2020-03-26 3:24 ` [PATCH v9 11/18] arm64: kexec: arm64_relocate_new_kernel clean-ups Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-05-07 16:22 ` James Morse 2020-05-07 16:22 ` James Morse 2020-05-07 16:22 ` James Morse 2020-03-26 3:24 ` [PATCH v9 12/18] arm64: kexec: arm64_relocate_new_kernel don't use x0 as temp Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-05-07 16:22 ` James Morse 2020-05-07 16:22 ` James Morse 2020-05-07 16:22 ` James Morse 2020-03-26 3:24 ` [PATCH v9 13/18] arm64: kexec: add expandable argument to relocation function Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-05-07 16:22 ` James Morse 2020-05-07 16:22 ` James Morse 2020-05-07 16:22 ` James Morse 2021-01-23 2:49 ` Pavel Tatashin 2021-01-23 2:49 ` Pavel Tatashin 2021-01-23 2:49 ` Pavel Tatashin 2021-01-23 2:49 ` Pavel Tatashin 2020-03-26 3:24 ` [PATCH v9 14/18] arm64: kexec: offset for " Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-05-07 16:22 ` James Morse 2020-05-07 16:22 ` James Morse 2020-05-07 16:22 ` James Morse 2020-03-26 3:24 ` [PATCH v9 15/18] arm64: kexec: kexec EL2 vectors Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-04-29 17:35 ` Marc Zyngier 2020-04-29 17:35 ` Marc Zyngier 2020-04-29 17:35 ` Marc Zyngier 2021-01-25 19:07 ` Pavel Tatashin 2021-01-25 19:07 ` Pavel Tatashin 2021-01-25 19:07 ` Pavel Tatashin 2021-01-25 19:07 ` Pavel Tatashin 2020-05-07 16:21 ` James Morse 2020-05-07 16:21 ` James Morse 2020-05-07 16:21 ` James Morse 2020-03-26 3:24 ` [PATCH v9 16/18] arm64: kexec: configure trans_pgd page table for kexec Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-05-07 16:22 ` James Morse 2020-05-07 16:22 ` James Morse 2020-05-07 16:22 ` James Morse 2020-03-26 3:24 ` [PATCH v9 17/18] arm64: kexec: enable MMU during kexec relocation Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin 2020-03-26 3:24 ` [PATCH v9 18/18] arm64: kexec: remove head from relocation argument Pavel Tatashin 2020-03-26 3:24 ` Pavel Tatashin
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