From: Lars Povlsen <lars.povlsen@microchip.com> To: SoC Team <soc@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Stephen Boyd <sboyd@kernel.org>, Linus Walleij <linus.walleij@linaro.org> Cc: Lars Povlsen <lars.povlsen@microchip.com>, Steen Hegelund <Steen.Hegelund@microchip.com>, Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>, Olof Johansson <olof@lixom.net>, "Michael Turquette" <mturquette@baylibre.com>, <devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-gpio@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, Alexandre Belloni <alexandre.belloni@bootlin.com> Subject: [PATCH 02/14] pinctrl: ocelot: Remove instance number from pin functions Date: Wed, 13 May 2020 14:55:20 +0200 [thread overview] Message-ID: <20200513125532.24585-3-lars.povlsen@microchip.com> (raw) In-Reply-To: <20200513125532.24585-1-lars.povlsen@microchip.com> This patch removes the instance number from the "miim", "reco_clk" and "sfp" pin function. The change needed is to prepare the driver for adding new platforms with more of these instances. The instance number is also redundant, as this is implicit for each pin. Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> --- drivers/pinctrl/pinctrl-ocelot.c | 94 ++++++++++---------------------- 1 file changed, 30 insertions(+), 64 deletions(-) diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c index d4ac65b1efc0b..375f3ea3b80c4 100644 --- a/drivers/pinctrl/pinctrl-ocelot.c +++ b/drivers/pinctrl/pinctrl-ocelot.c @@ -46,32 +46,15 @@ enum { FUNC_IRQ0_OUT, FUNC_IRQ1_IN, FUNC_IRQ1_OUT, - FUNC_MIIM1, - FUNC_MIIM2, + FUNC_MIIM, FUNC_PCI_WAKE, FUNC_PTP0, FUNC_PTP1, FUNC_PTP2, FUNC_PTP3, FUNC_PWM, - FUNC_RECO_CLK0, - FUNC_RECO_CLK1, - FUNC_SFP0, - FUNC_SFP1, - FUNC_SFP2, - FUNC_SFP3, - FUNC_SFP4, - FUNC_SFP5, - FUNC_SFP6, - FUNC_SFP7, - FUNC_SFP8, - FUNC_SFP9, - FUNC_SFP10, - FUNC_SFP11, - FUNC_SFP12, - FUNC_SFP13, - FUNC_SFP14, - FUNC_SFP15, + FUNC_RECO_CLK, + FUNC_SFP, FUNC_SG0, FUNC_SG1, FUNC_SG2, @@ -92,32 +75,15 @@ static const char *const ocelot_function_names[] = { [FUNC_IRQ0_OUT] = "irq0_out", [FUNC_IRQ1_IN] = "irq1_in", [FUNC_IRQ1_OUT] = "irq1_out", - [FUNC_MIIM1] = "miim1", - [FUNC_MIIM2] = "miim2", + [FUNC_MIIM] = "miim", [FUNC_PCI_WAKE] = "pci_wake", [FUNC_PTP0] = "ptp0", [FUNC_PTP1] = "ptp1", [FUNC_PTP2] = "ptp2", [FUNC_PTP3] = "ptp3", [FUNC_PWM] = "pwm", - [FUNC_RECO_CLK0] = "reco_clk0", - [FUNC_RECO_CLK1] = "reco_clk1", - [FUNC_SFP0] = "sfp0", - [FUNC_SFP1] = "sfp1", - [FUNC_SFP2] = "sfp2", - [FUNC_SFP3] = "sfp3", - [FUNC_SFP4] = "sfp4", - [FUNC_SFP5] = "sfp5", - [FUNC_SFP6] = "sfp6", - [FUNC_SFP7] = "sfp7", - [FUNC_SFP8] = "sfp8", - [FUNC_SFP9] = "sfp9", - [FUNC_SFP10] = "sfp10", - [FUNC_SFP11] = "sfp11", - [FUNC_SFP12] = "sfp12", - [FUNC_SFP13] = "sfp13", - [FUNC_SFP14] = "sfp14", - [FUNC_SFP15] = "sfp15", + [FUNC_RECO_CLK] = "reco_clk", + [FUNC_SFP] = "sfp", [FUNC_SG0] = "sg0", [FUNC_SG1] = "sg1", [FUNC_SG2] = "sg2", @@ -168,18 +134,18 @@ OCELOT_P(6, UART, TWI_SCL_M, NONE); OCELOT_P(7, UART, TWI_SCL_M, NONE); OCELOT_P(8, SI, TWI_SCL_M, IRQ0_OUT); OCELOT_P(9, SI, TWI_SCL_M, IRQ1_OUT); -OCELOT_P(10, PTP2, TWI_SCL_M, SFP0); -OCELOT_P(11, PTP3, TWI_SCL_M, SFP1); -OCELOT_P(12, UART2, TWI_SCL_M, SFP2); -OCELOT_P(13, UART2, TWI_SCL_M, SFP3); -OCELOT_P(14, MIIM1, TWI_SCL_M, SFP4); -OCELOT_P(15, MIIM1, TWI_SCL_M, SFP5); +OCELOT_P(10, PTP2, TWI_SCL_M, SFP); +OCELOT_P(11, PTP3, TWI_SCL_M, SFP); +OCELOT_P(12, UART2, TWI_SCL_M, SFP); +OCELOT_P(13, UART2, TWI_SCL_M, SFP); +OCELOT_P(14, MIIM, TWI_SCL_M, SFP); +OCELOT_P(15, MIIM, TWI_SCL_M, SFP); OCELOT_P(16, TWI, NONE, SI); OCELOT_P(17, TWI, TWI_SCL_M, SI); OCELOT_P(18, PTP0, TWI_SCL_M, NONE); OCELOT_P(19, PTP1, TWI_SCL_M, NONE); -OCELOT_P(20, RECO_CLK0, TACHO, NONE); -OCELOT_P(21, RECO_CLK1, PWM, NONE); +OCELOT_P(20, RECO_CLK, TACHO, TWI_SCL_M); +OCELOT_P(21, RECO_CLK, PWM, TWI_SCL_M); #define OCELOT_PIN(n) { \ .number = n, \ @@ -264,22 +230,22 @@ JAGUAR2_P(40, NONE, TWI_SCL_M); JAGUAR2_P(41, NONE, TWI_SCL_M); JAGUAR2_P(42, NONE, TWI_SCL_M); JAGUAR2_P(43, NONE, TWI_SCL_M); -JAGUAR2_P(44, NONE, SFP8); -JAGUAR2_P(45, NONE, SFP9); -JAGUAR2_P(46, NONE, SFP10); -JAGUAR2_P(47, NONE, SFP11); -JAGUAR2_P(48, SFP0, NONE); -JAGUAR2_P(49, SFP1, SI); -JAGUAR2_P(50, SFP2, SI); -JAGUAR2_P(51, SFP3, SI); -JAGUAR2_P(52, SFP4, NONE); -JAGUAR2_P(53, SFP5, NONE); -JAGUAR2_P(54, SFP6, NONE); -JAGUAR2_P(55, SFP7, NONE); -JAGUAR2_P(56, MIIM1, SFP12); -JAGUAR2_P(57, MIIM1, SFP13); -JAGUAR2_P(58, MIIM2, SFP14); -JAGUAR2_P(59, MIIM2, SFP15); +JAGUAR2_P(44, NONE, SFP); +JAGUAR2_P(45, NONE, SFP); +JAGUAR2_P(46, NONE, SFP); +JAGUAR2_P(47, NONE, SFP); +JAGUAR2_P(48, SFP, NONE); +JAGUAR2_P(49, SFP, SI); +JAGUAR2_P(50, SFP, SI); +JAGUAR2_P(51, SFP, SI); +JAGUAR2_P(52, SFP, NONE); +JAGUAR2_P(53, SFP, NONE); +JAGUAR2_P(54, SFP, NONE); +JAGUAR2_P(55, SFP, NONE); +JAGUAR2_P(56, MIIM, SFP); +JAGUAR2_P(57, MIIM, SFP); +JAGUAR2_P(58, MIIM, SFP); +JAGUAR2_P(59, MIIM, SFP); JAGUAR2_P(60, NONE, NONE); JAGUAR2_P(61, NONE, NONE); JAGUAR2_P(62, NONE, NONE); -- 2.26.2
WARNING: multiple messages have this Message-ID (diff)
From: Lars Povlsen <lars.povlsen@microchip.com> To: SoC Team <soc@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Stephen Boyd <sboyd@kernel.org>, Linus Walleij <linus.walleij@linaro.org> Cc: devicetree@vger.kernel.org, Alexandre Belloni <alexandre.belloni@bootlin.com>, Steen Hegelund <Steen.Hegelund@microchip.com>, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Olof Johansson <olof@lixom.net>, Michael Turquette <mturquette@baylibre.com>, Lars Povlsen <lars.povlsen@microchip.com> Subject: [PATCH 02/14] pinctrl: ocelot: Remove instance number from pin functions Date: Wed, 13 May 2020 14:55:20 +0200 [thread overview] Message-ID: <20200513125532.24585-3-lars.povlsen@microchip.com> (raw) In-Reply-To: <20200513125532.24585-1-lars.povlsen@microchip.com> This patch removes the instance number from the "miim", "reco_clk" and "sfp" pin function. The change needed is to prepare the driver for adding new platforms with more of these instances. The instance number is also redundant, as this is implicit for each pin. Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> --- drivers/pinctrl/pinctrl-ocelot.c | 94 ++++++++++---------------------- 1 file changed, 30 insertions(+), 64 deletions(-) diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c index d4ac65b1efc0b..375f3ea3b80c4 100644 --- a/drivers/pinctrl/pinctrl-ocelot.c +++ b/drivers/pinctrl/pinctrl-ocelot.c @@ -46,32 +46,15 @@ enum { FUNC_IRQ0_OUT, FUNC_IRQ1_IN, FUNC_IRQ1_OUT, - FUNC_MIIM1, - FUNC_MIIM2, + FUNC_MIIM, FUNC_PCI_WAKE, FUNC_PTP0, FUNC_PTP1, FUNC_PTP2, FUNC_PTP3, FUNC_PWM, - FUNC_RECO_CLK0, - FUNC_RECO_CLK1, - FUNC_SFP0, - FUNC_SFP1, - FUNC_SFP2, - FUNC_SFP3, - FUNC_SFP4, - FUNC_SFP5, - FUNC_SFP6, - FUNC_SFP7, - FUNC_SFP8, - FUNC_SFP9, - FUNC_SFP10, - FUNC_SFP11, - FUNC_SFP12, - FUNC_SFP13, - FUNC_SFP14, - FUNC_SFP15, + FUNC_RECO_CLK, + FUNC_SFP, FUNC_SG0, FUNC_SG1, FUNC_SG2, @@ -92,32 +75,15 @@ static const char *const ocelot_function_names[] = { [FUNC_IRQ0_OUT] = "irq0_out", [FUNC_IRQ1_IN] = "irq1_in", [FUNC_IRQ1_OUT] = "irq1_out", - [FUNC_MIIM1] = "miim1", - [FUNC_MIIM2] = "miim2", + [FUNC_MIIM] = "miim", [FUNC_PCI_WAKE] = "pci_wake", [FUNC_PTP0] = "ptp0", [FUNC_PTP1] = "ptp1", [FUNC_PTP2] = "ptp2", [FUNC_PTP3] = "ptp3", [FUNC_PWM] = "pwm", - [FUNC_RECO_CLK0] = "reco_clk0", - [FUNC_RECO_CLK1] = "reco_clk1", - [FUNC_SFP0] = "sfp0", - [FUNC_SFP1] = "sfp1", - [FUNC_SFP2] = "sfp2", - [FUNC_SFP3] = "sfp3", - [FUNC_SFP4] = "sfp4", - [FUNC_SFP5] = "sfp5", - [FUNC_SFP6] = "sfp6", - [FUNC_SFP7] = "sfp7", - [FUNC_SFP8] = "sfp8", - [FUNC_SFP9] = "sfp9", - [FUNC_SFP10] = "sfp10", - [FUNC_SFP11] = "sfp11", - [FUNC_SFP12] = "sfp12", - [FUNC_SFP13] = "sfp13", - [FUNC_SFP14] = "sfp14", - [FUNC_SFP15] = "sfp15", + [FUNC_RECO_CLK] = "reco_clk", + [FUNC_SFP] = "sfp", [FUNC_SG0] = "sg0", [FUNC_SG1] = "sg1", [FUNC_SG2] = "sg2", @@ -168,18 +134,18 @@ OCELOT_P(6, UART, TWI_SCL_M, NONE); OCELOT_P(7, UART, TWI_SCL_M, NONE); OCELOT_P(8, SI, TWI_SCL_M, IRQ0_OUT); OCELOT_P(9, SI, TWI_SCL_M, IRQ1_OUT); -OCELOT_P(10, PTP2, TWI_SCL_M, SFP0); -OCELOT_P(11, PTP3, TWI_SCL_M, SFP1); -OCELOT_P(12, UART2, TWI_SCL_M, SFP2); -OCELOT_P(13, UART2, TWI_SCL_M, SFP3); -OCELOT_P(14, MIIM1, TWI_SCL_M, SFP4); -OCELOT_P(15, MIIM1, TWI_SCL_M, SFP5); +OCELOT_P(10, PTP2, TWI_SCL_M, SFP); +OCELOT_P(11, PTP3, TWI_SCL_M, SFP); +OCELOT_P(12, UART2, TWI_SCL_M, SFP); +OCELOT_P(13, UART2, TWI_SCL_M, SFP); +OCELOT_P(14, MIIM, TWI_SCL_M, SFP); +OCELOT_P(15, MIIM, TWI_SCL_M, SFP); OCELOT_P(16, TWI, NONE, SI); OCELOT_P(17, TWI, TWI_SCL_M, SI); OCELOT_P(18, PTP0, TWI_SCL_M, NONE); OCELOT_P(19, PTP1, TWI_SCL_M, NONE); -OCELOT_P(20, RECO_CLK0, TACHO, NONE); -OCELOT_P(21, RECO_CLK1, PWM, NONE); +OCELOT_P(20, RECO_CLK, TACHO, TWI_SCL_M); +OCELOT_P(21, RECO_CLK, PWM, TWI_SCL_M); #define OCELOT_PIN(n) { \ .number = n, \ @@ -264,22 +230,22 @@ JAGUAR2_P(40, NONE, TWI_SCL_M); JAGUAR2_P(41, NONE, TWI_SCL_M); JAGUAR2_P(42, NONE, TWI_SCL_M); JAGUAR2_P(43, NONE, TWI_SCL_M); -JAGUAR2_P(44, NONE, SFP8); -JAGUAR2_P(45, NONE, SFP9); -JAGUAR2_P(46, NONE, SFP10); -JAGUAR2_P(47, NONE, SFP11); -JAGUAR2_P(48, SFP0, NONE); -JAGUAR2_P(49, SFP1, SI); -JAGUAR2_P(50, SFP2, SI); -JAGUAR2_P(51, SFP3, SI); -JAGUAR2_P(52, SFP4, NONE); -JAGUAR2_P(53, SFP5, NONE); -JAGUAR2_P(54, SFP6, NONE); -JAGUAR2_P(55, SFP7, NONE); -JAGUAR2_P(56, MIIM1, SFP12); -JAGUAR2_P(57, MIIM1, SFP13); -JAGUAR2_P(58, MIIM2, SFP14); -JAGUAR2_P(59, MIIM2, SFP15); +JAGUAR2_P(44, NONE, SFP); +JAGUAR2_P(45, NONE, SFP); +JAGUAR2_P(46, NONE, SFP); +JAGUAR2_P(47, NONE, SFP); +JAGUAR2_P(48, SFP, NONE); +JAGUAR2_P(49, SFP, SI); +JAGUAR2_P(50, SFP, SI); +JAGUAR2_P(51, SFP, SI); +JAGUAR2_P(52, SFP, NONE); +JAGUAR2_P(53, SFP, NONE); +JAGUAR2_P(54, SFP, NONE); +JAGUAR2_P(55, SFP, NONE); +JAGUAR2_P(56, MIIM, SFP); +JAGUAR2_P(57, MIIM, SFP); +JAGUAR2_P(58, MIIM, SFP); +JAGUAR2_P(59, MIIM, SFP); JAGUAR2_P(60, NONE, NONE); JAGUAR2_P(61, NONE, NONE); JAGUAR2_P(62, NONE, NONE); -- 2.26.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-05-13 12:56 UTC|newest] Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-05-13 12:55 [PATCH 00/14] Adding support for Microchip Sparx5 SoC Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 01/14] pinctrl: ocelot: Should register GPIO's even if not irq controller Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-18 7:29 ` Linus Walleij 2020-05-18 7:29 ` Linus Walleij 2020-05-13 12:55 ` Lars Povlsen [this message] 2020-05-13 12:55 ` [PATCH 02/14] pinctrl: ocelot: Remove instance number from pin functions Lars Povlsen 2020-05-18 7:31 ` Linus Walleij 2020-05-18 7:31 ` Linus Walleij 2020-05-13 12:55 ` [PATCH 03/14] pinctrl: ocelot: Fix GPIO interrupt decoding on Jaguar2 Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-18 7:31 ` Linus Walleij 2020-05-18 7:31 ` Linus Walleij 2020-05-13 12:55 ` [PATCH 04/14] arm64: sparx5: Add support for Microchip 2xA53 SoC Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 05/14] dt-bindings: arm: sparx5: Add documentation for Microchip Sparx5 SoC Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-28 2:11 ` Rob Herring 2020-05-28 2:11 ` Rob Herring 2020-06-02 9:10 ` Lars Povlsen 2020-06-02 9:10 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 06/14] arm64: dts: sparx5: Add basic cpu support Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 15:39 ` Marc Zyngier 2020-05-13 15:39 ` Marc Zyngier 2020-05-15 15:09 ` Lars Povlsen 2020-05-15 15:09 ` Lars Povlsen 2020-05-15 15:30 ` Robin Murphy 2020-05-15 15:30 ` Robin Murphy 2020-05-18 7:43 ` Lars Povlsen 2020-05-18 7:43 ` Lars Povlsen 2020-05-15 16:31 ` Marc Zyngier 2020-05-13 12:55 ` [PATCH 07/14] dt-bindings: pinctrl: ocelot: Add Sparx5 SoC support Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-18 7:33 ` Linus Walleij 2020-05-18 7:33 ` Linus Walleij 2020-05-13 12:55 ` [PATCH 08/14] arm64: dts: sparx5: Add pinctrl support Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 09/14] pinctrl: ocelot: Add Sparx5 SoC support Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-14 18:09 ` kbuild test robot 2020-05-14 18:09 ` kbuild test robot 2020-05-14 18:09 ` kbuild test robot 2020-05-15 15:52 ` Lars Povlsen 2020-05-15 15:52 ` Lars Povlsen 2020-05-15 15:52 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 10/14] dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-27 2:46 ` Stephen Boyd 2020-05-29 14:04 ` Lars Povlsen 2020-05-29 14:04 ` Lars Povlsen 2020-05-28 2:18 ` Rob Herring 2020-05-28 2:18 ` Rob Herring 2020-06-02 8:39 ` Lars Povlsen 2020-06-02 8:39 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 11/14] dt-bindings: clock: sparx5: Add bindings include file Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-27 2:56 ` Stephen Boyd 2020-05-13 12:55 ` [PATCH 12/14] clk: sparx5: Add Sparx5 SoC DPLL clock driver Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-27 2:56 ` Stephen Boyd 2020-05-27 14:29 ` Lars Povlsen 2020-05-27 14:29 ` Lars Povlsen 2020-05-27 19:08 ` Stephen Boyd 2020-05-13 12:55 ` [PATCH 13/14] arm64: dts: sparx5: Add Sparx5 SoC DPLL clock Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 14/14] arm64: dts: sparx5: Add i2c devices, i2c muxes Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-21 10:16 ` [PATCH 00/14] Adding support for Microchip Sparx5 SoC Arnd Bergmann 2020-05-21 10:16 ` Arnd Bergmann
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