From: Kishon Vijay Abraham I <kishon@ti.com>
To: Tom Joseph <tjoseph@cadence.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Rob Herring <robh@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>
Cc: <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Arnd Bergmann <arnd@arndb.de>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
<devicetree@vger.kernel.org>, <linux-omap@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Kishon Vijay Abraham I <kishon@ti.com>
Subject: [PATCH v5 06/14] dt-bindings: PCI: cadence: Remove "mem" from reg binding
Date: Fri, 22 May 2020 09:06:23 +0530 [thread overview]
Message-ID: <20200522033631.32574-7-kishon@ti.com> (raw)
In-Reply-To: <20200522033631.32574-1-kishon@ti.com>
"mem" is not a memory resource and it overlaps with PCIe config space
and memory region. Removve "mem" from reg binding.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../devicetree/bindings/pci/cdns,cdns-pcie-host.yaml | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
index 84a8f095d031..6d67067843bf 100644
--- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
@@ -18,13 +18,12 @@ properties:
const: cdns,cdns-pcie-host
reg:
- maxItems: 3
+ maxItems: 2
reg-names:
items:
- const: reg
- const: cfg
- - const: mem
msi-parent: true
@@ -49,9 +48,8 @@ examples:
device-id = <0x0200>;
reg = <0x0 0xfb000000 0x0 0x01000000>,
- <0x0 0x41000000 0x0 0x00001000>,
- <0x0 0x40000000 0x0 0x04000000>;
- reg-names = "reg", "cfg", "mem";
+ <0x0 0x41000000 0x0 0x00001000>;
+ reg-names = "reg", "cfg";
ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>,
<0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>;
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Tom Joseph <tjoseph@cadence.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Rob Herring <robh@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>
Cc: devicetree@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Kishon Vijay Abraham I <kishon@ti.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 06/14] dt-bindings: PCI: cadence: Remove "mem" from reg binding
Date: Fri, 22 May 2020 09:06:23 +0530 [thread overview]
Message-ID: <20200522033631.32574-7-kishon@ti.com> (raw)
In-Reply-To: <20200522033631.32574-1-kishon@ti.com>
"mem" is not a memory resource and it overlaps with PCIe config space
and memory region. Removve "mem" from reg binding.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../devicetree/bindings/pci/cdns,cdns-pcie-host.yaml | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
index 84a8f095d031..6d67067843bf 100644
--- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
@@ -18,13 +18,12 @@ properties:
const: cdns,cdns-pcie-host
reg:
- maxItems: 3
+ maxItems: 2
reg-names:
items:
- const: reg
- const: cfg
- - const: mem
msi-parent: true
@@ -49,9 +48,8 @@ examples:
device-id = <0x0200>;
reg = <0x0 0xfb000000 0x0 0x01000000>,
- <0x0 0x41000000 0x0 0x00001000>,
- <0x0 0x40000000 0x0 0x04000000>;
- reg-names = "reg", "cfg", "mem";
+ <0x0 0x41000000 0x0 0x00001000>;
+ reg-names = "reg", "cfg";
ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>,
<0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-05-22 3:37 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-22 3:36 [PATCH v5 00/14] Add PCIe support to TI's J721E SoC Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I
2020-05-22 3:36 ` [PATCH v5 01/14] PCI: cadence: Fix cdns_pcie_{host|ep}_setup() error path Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I
2020-05-22 3:36 ` [PATCH v5 02/14] linux/kernel.h: Add PTR_ALIGN_DOWN macro Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I
2020-05-22 3:36 ` [PATCH v5 03/14] PCI: cadence: Convert all r/w accessors to perform only 32-bit accesses Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I
2020-05-22 15:54 ` Rob Herring
2020-05-22 15:54 ` Rob Herring
2020-05-25 3:30 ` Kishon Vijay Abraham I
2020-05-25 3:30 ` Kishon Vijay Abraham I
2020-05-26 15:12 ` Rob Herring
2020-05-26 15:12 ` Rob Herring
2020-05-27 10:49 ` Kishon Vijay Abraham I
2020-05-27 10:49 ` Kishon Vijay Abraham I
2020-05-27 16:37 ` Rob Herring
2020-05-27 16:37 ` Rob Herring
2020-05-27 22:06 ` Kishon Vijay Abraham I
2020-05-27 22:06 ` Kishon Vijay Abraham I
2020-06-01 1:16 ` Kishon Vijay Abraham I
2020-06-01 1:16 ` Kishon Vijay Abraham I
2020-06-08 15:58 ` Kishon Vijay Abraham I
2020-06-08 15:58 ` Kishon Vijay Abraham I
2020-05-22 3:36 ` [PATCH v5 04/14] PCI: cadence: Add support to start link and verify link status Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I
2020-05-22 3:36 ` [PATCH v5 05/14] PCI: cadence: Allow pci_host_bridge to have custom pci_ops Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I [this message]
2020-05-22 3:36 ` [PATCH v5 06/14] dt-bindings: PCI: cadence: Remove "mem" from reg binding Kishon Vijay Abraham I
2020-05-26 22:53 ` Rob Herring
2020-05-26 22:53 ` Rob Herring
2020-05-22 3:36 ` [PATCH v5 07/14] PCI: cadence: Add new *ops* for CPU addr fixup Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I
2020-05-22 3:36 ` [PATCH v5 08/14] PCI: cadence: Fix updating Vendor ID and Subsystem Vendor ID register Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I
2020-05-22 3:36 ` [PATCH v5 09/14] PCI: cadence: Add MSI-X support to Endpoint driver Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I
2020-05-22 3:36 ` [PATCH v5 10/14] dt-bindings: PCI: Add host mode dt-bindings for TI's J721E SoC Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I
2020-05-22 3:36 ` [PATCH v5 11/14] dt-bindings: PCI: Add EP " Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I
2020-05-22 3:36 ` [PATCH v5 12/14] PCI: j721e: Add TI J721E PCIe driver Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I
2020-05-22 3:36 ` [PATCH v5 13/14] misc: pci_endpoint_test: Add J721E in pci_device_id table Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I
2020-05-22 3:36 ` [PATCH v5 14/14] MAINTAINERS: Add Kishon Vijay Abraham I for TI J721E SoC PCIe Kishon Vijay Abraham I
2020-05-22 3:36 ` Kishon Vijay Abraham I
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200522033631.32574-7-kishon@ti.com \
--to=kishon@ti.com \
--cc=arnd@arndb.de \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-omap@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=robh@kernel.org \
--cc=tjoseph@cadence.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.