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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Paul Durrant" <paul@xen.org>, "Andrew Jeffery" <andrew@aj.id.au>,
	"Helge Deller" <deller@gmx.de>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Joel Stanley" <joel@jms.id.au>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-trivial@nongnu.org, qemu-arm@nongnu.org,
	"Hervé Poussineau" <hpoussin@reactos.org>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Anthony Perard" <anthony.perard@citrix.com>,
	xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org,
	"Richard Henderson" <rth@twiddle.net>
Subject: [PATCH 3/8] hw/pci/pci_bridge: Correct pci_bridge_io memory region size
Date: Sun, 31 May 2020 19:38:09 +0200	[thread overview]
Message-ID: <20200531173814.8734-4-f4bug@amsat.org> (raw)
In-Reply-To: <20200531173814.8734-1-f4bug@amsat.org>

memory_region_set_size() handle the 16 Exabytes limit by
special-casing the UINT64_MAX value. This is not a problem
for the 32-bit maximum, 4 GiB.
By using the UINT32_MAX value, the pci_bridge_io MemoryRegion
ends up missing 1 byte:

  (qemu) info mtree
  memory-region: pci_bridge_io
    0000000000000000-00000000fffffffe (prio 0, i/o): pci_bridge_io
      0000000000000060-0000000000000060 (prio 0, i/o): i8042-data
      0000000000000064-0000000000000064 (prio 0, i/o): i8042-cmd
      00000000000001ce-00000000000001d1 (prio 0, i/o): vbe
      0000000000000378-000000000000037f (prio 0, i/o): parallel
      00000000000003b4-00000000000003b5 (prio 0, i/o): vga
      ...

Fix by using the correct value. We now have:

  memory-region: pci_bridge_io
    0000000000000000-00000000ffffffff (prio 0, i/o): pci_bridge_io
      0000000000000060-0000000000000060 (prio 0, i/o): i8042-data
      0000000000000064-0000000000000064 (prio 0, i/o): i8042-cmd
      ...

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/pci/pci_bridge.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 97967d12eb..3ba3203f72 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -30,6 +30,7 @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu/units.h"
 #include "hw/pci/pci_bridge.h"
 #include "hw/pci/pci_bus.h"
 #include "qemu/module.h"
@@ -381,7 +382,7 @@ void pci_bridge_initfn(PCIDevice *dev, const char *typename)
     memory_region_init(&br->address_space_mem, OBJECT(br), "pci_bridge_pci", UINT64_MAX);
     sec_bus->address_space_io = &br->address_space_io;
     memory_region_init(&br->address_space_io, OBJECT(br), "pci_bridge_io",
-                       UINT32_MAX);
+                       4 * GiB);
     br->windows = pci_bridge_region_init(br);
     QLIST_INIT(&sec_bus->child);
     QLIST_INSERT_HEAD(&parent->child, sec_bus, sibling);
-- 
2.21.3



WARNING: multiple messages have this Message-ID (diff)
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Paul Durrant" <paul@xen.org>, "Andrew Jeffery" <andrew@aj.id.au>,
	"Helge Deller" <deller@gmx.de>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Joel Stanley" <joel@jms.id.au>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-trivial@nongnu.org, qemu-arm@nongnu.org,
	"Hervé Poussineau" <hpoussin@reactos.org>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Anthony Perard" <anthony.perard@citrix.com>,
	xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org,
	"Richard Henderson" <rth@twiddle.net>
Subject: [PATCH 3/8] hw/pci/pci_bridge: Correct pci_bridge_io memory region size
Date: Sun, 31 May 2020 19:38:09 +0200	[thread overview]
Message-ID: <20200531173814.8734-4-f4bug@amsat.org> (raw)
In-Reply-To: <20200531173814.8734-1-f4bug@amsat.org>

memory_region_set_size() handle the 16 Exabytes limit by
special-casing the UINT64_MAX value. This is not a problem
for the 32-bit maximum, 4 GiB.
By using the UINT32_MAX value, the pci_bridge_io MemoryRegion
ends up missing 1 byte:

  (qemu) info mtree
  memory-region: pci_bridge_io
    0000000000000000-00000000fffffffe (prio 0, i/o): pci_bridge_io
      0000000000000060-0000000000000060 (prio 0, i/o): i8042-data
      0000000000000064-0000000000000064 (prio 0, i/o): i8042-cmd
      00000000000001ce-00000000000001d1 (prio 0, i/o): vbe
      0000000000000378-000000000000037f (prio 0, i/o): parallel
      00000000000003b4-00000000000003b5 (prio 0, i/o): vga
      ...

Fix by using the correct value. We now have:

  memory-region: pci_bridge_io
    0000000000000000-00000000ffffffff (prio 0, i/o): pci_bridge_io
      0000000000000060-0000000000000060 (prio 0, i/o): i8042-data
      0000000000000064-0000000000000064 (prio 0, i/o): i8042-cmd
      ...

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/pci/pci_bridge.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 97967d12eb..3ba3203f72 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -30,6 +30,7 @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu/units.h"
 #include "hw/pci/pci_bridge.h"
 #include "hw/pci/pci_bus.h"
 #include "qemu/module.h"
@@ -381,7 +382,7 @@ void pci_bridge_initfn(PCIDevice *dev, const char *typename)
     memory_region_init(&br->address_space_mem, OBJECT(br), "pci_bridge_pci", UINT64_MAX);
     sec_bus->address_space_io = &br->address_space_io;
     memory_region_init(&br->address_space_io, OBJECT(br), "pci_bridge_io",
-                       UINT32_MAX);
+                       4 * GiB);
     br->windows = pci_bridge_region_init(br);
     QLIST_INIT(&sec_bus->child);
     QLIST_INSERT_HEAD(&parent->child, sec_bus, sibling);
-- 
2.21.3



  parent reply	other threads:[~2020-05-31 17:40 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-31 17:38 [PATCH 0/8] hw: Fix some incomplete memory region size Philippe Mathieu-Daudé
2020-05-31 17:38 ` Philippe Mathieu-Daudé
2020-05-31 17:38 ` [PATCH 1/8] hw/arm/aspeed: Correct DRAM container " Philippe Mathieu-Daudé
2020-05-31 17:38   ` Philippe Mathieu-Daudé
2020-05-31 17:38 ` [PATCH 2/8] hw/pci-host/prep: Correct RAVEN bus bridge memory " Philippe Mathieu-Daudé
2020-05-31 17:38   ` Philippe Mathieu-Daudé
2020-05-31 17:38 ` Philippe Mathieu-Daudé [this message]
2020-05-31 17:38   ` [PATCH 3/8] hw/pci/pci_bridge: Correct pci_bridge_io " Philippe Mathieu-Daudé
2020-05-31 17:38 ` [PATCH 4/8] hw/pci/pci_bridge: Use the IEC binary prefix definitions Philippe Mathieu-Daudé
2020-05-31 17:38   ` Philippe Mathieu-Daudé
2020-05-31 17:38 ` [PATCH 5/8] hw/pci-host: " Philippe Mathieu-Daudé
2020-05-31 17:38   ` Philippe Mathieu-Daudé
2020-05-31 17:38 ` [PATCH 6/8] hw/hppa/dino: " Philippe Mathieu-Daudé
2020-05-31 17:38   ` Philippe Mathieu-Daudé
2020-05-31 17:38 ` [PATCH 7/8] hw/i386/xen/xen-hvm: " Philippe Mathieu-Daudé
2020-05-31 17:38   ` Philippe Mathieu-Daudé
2020-06-01  7:26   ` Paul Durrant
2020-06-01  7:26     ` Paul Durrant
2020-06-01  8:33     ` Philippe Mathieu-Daudé
2020-06-01  8:33       ` Philippe Mathieu-Daudé
2020-06-01 11:15       ` Philippe Mathieu-Daudé
2020-05-31 17:38 ` [PATCH 8/8] target/i386/cpu: " Philippe Mathieu-Daudé
2020-05-31 17:38   ` Philippe Mathieu-Daudé
2020-05-31 19:48 ` [PATCH 0/8] hw: Fix some incomplete memory region size Peter Maydell
2020-05-31 19:48   ` Peter Maydell

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