From: Dmitry Osipenko <digetx@gmail.com> To: Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Georgi Djakov <georgi.djakov@linaro.org>, Rob Herring <robh+dt@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Peter De Schrijver <pdeschrijver@nvidia.com>, MyungJoo Ham <myungjoo.ham@samsung.com>, Kyungmin Park <kyungmin.park@samsung.com>, Chanwoo Choi <cw00.choi@samsung.com>, Mikko Perttunen <cyndis@kapsi.fi> Cc: "Artur Świgoń" <a.swigon@samsung.com>, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [PATCH v3 34/39] memory: tegra30-emc: Register as interconnect provider Date: Sun, 7 Jun 2020 21:55:25 +0300 [thread overview] Message-ID: <20200607185530.18113-35-digetx@gmail.com> (raw) In-Reply-To: <20200607185530.18113-1-digetx@gmail.com> Now external memory controller is a memory interconnection provider. This allows us to use interconnect API to change memory configuration. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- drivers/memory/tegra/tegra30-emc.c | 115 +++++++++++++++++++++++++++++ 1 file changed, 115 insertions(+) diff --git a/drivers/memory/tegra/tegra30-emc.c b/drivers/memory/tegra/tegra30-emc.c index 76586edb34ee..096ec5265084 100644 --- a/drivers/memory/tegra/tegra30-emc.c +++ b/drivers/memory/tegra/tegra30-emc.c @@ -14,6 +14,7 @@ #include <linux/debugfs.h> #include <linux/delay.h> #include <linux/err.h> +#include <linux/interconnect-provider.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/iopoll.h> @@ -327,6 +328,7 @@ struct tegra_emc { struct device *dev; struct tegra_mc *mc; struct notifier_block clk_nb; + struct icc_provider provider; struct clk *clk; void __iomem *regs; unsigned int irq; @@ -1264,6 +1266,112 @@ static void tegra_emc_debugfs_init(struct tegra_emc *emc) emc, &tegra_emc_debug_max_rate_fops); } +static inline struct tegra_emc * +to_tegra_emc_provider(struct icc_provider *provider) +{ + return container_of(provider, struct tegra_emc, provider); +} + +static struct icc_node * +emc_of_icc_xlate(struct of_phandle_args *spec, void *data) +{ + struct icc_provider *provider = data; + struct icc_node *node; + + /* External Memory is the only possible ICC route */ + list_for_each_entry(node, &provider->nodes, node_list) { + if (node->id == TEGRA_ICC_EMEM) + return node; + } + + return ERR_PTR(-EINVAL); +} + +static int emc_icc_set(struct icc_node *src, struct icc_node *dst) +{ + struct tegra_emc *emc = to_tegra_emc_provider(dst->provider); + unsigned long long rate = icc_units_to_bps(dst->avg_bw); + unsigned int dram_data_bus_width_bytes = 4; + unsigned int ddr = 2; + int err; + + do_div(rate, ddr * dram_data_bus_width_bytes); + rate = min_t(u64, rate, U32_MAX); + + err = clk_set_min_rate(emc->clk, rate); + if (err) + return err; + + err = clk_set_rate(emc->clk, rate); + if (err) + return err; + + return 0; +} + +static int emc_icc_aggregate(struct icc_node *node, + u32 tag, u32 avg_bw, u32 peak_bw, + u32 *agg_avg, u32 *agg_peak) +{ + *agg_avg = min((u64)avg_bw + (*agg_avg), (u64)U32_MAX); + *agg_peak = max(*agg_peak, peak_bw); + + return 0; +} + +static int tegra_emc_interconnect_init(struct tegra_emc *emc) +{ + struct icc_node *node; + int err; + + /* older device-trees don't have interconnect properties */ + if (!of_find_property(emc->dev->of_node, "#interconnect-cells", NULL)) + return 0; + + emc->provider.dev = emc->dev; + emc->provider.set = emc_icc_set; + emc->provider.data = &emc->provider; + emc->provider.xlate = emc_of_icc_xlate; + emc->provider.aggregate = emc_icc_aggregate; + + err = icc_provider_add(&emc->provider); + if (err) + return err; + + /* create External Memory Controller node */ + node = icc_node_create(TEGRA_ICC_EMC); + err = PTR_ERR_OR_ZERO(node); + if (err) + goto del_provider; + + node->name = "External Memory Controller"; + icc_node_add(node, &emc->provider); + + /* link External Memory Controller to External Memory (DRAM) */ + err = icc_link_create(node, TEGRA_ICC_EMEM); + if (err) + goto remove_nodes; + + /* create External Memory node */ + node = icc_node_create(TEGRA_ICC_EMEM); + err = PTR_ERR_OR_ZERO(node); + if (err) + goto remove_nodes; + + node->name = "External Memory (DRAM)"; + icc_node_add(node, &emc->provider); + + return 0; + +remove_nodes: + icc_nodes_remove(&emc->provider); + +del_provider: + icc_provider_del(&emc->provider); + + return err; +} + static int tegra_emc_probe(struct platform_device *pdev) { struct platform_device *mc; @@ -1344,6 +1452,13 @@ static int tegra_emc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, emc); tegra_emc_debugfs_init(emc); + if (IS_ENABLED(CONFIG_INTERCONNECT)) { + err = tegra_emc_interconnect_init(emc); + if (err) + dev_err(&pdev->dev, "failed to initialize ICC: %d\n", + err); + } + /* * Don't allow the kernel module to be unloaded. Unloading adds some * extra complexity which doesn't really worth the effort in a case of -- 2.26.0
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com> To: Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Georgi Djakov <georgi.djakov@linaro.org>, Rob Herring <robh+dt@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Peter De Schrijver <pdeschrijver@nvidia.com>, MyungJoo Ham <myungjoo.ham@samsung.com>, Kyungmin Park <kyungmin.park@samsung.com>, Chanwoo Choi <cw00.choi@samsung.com>, Mikko Perttunen <cyndis@kapsi.fi> Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, "Artur Świgoń" <a.swigon@samsung.com>, linux-tegra@vger.kernel.org Subject: [PATCH v3 34/39] memory: tegra30-emc: Register as interconnect provider Date: Sun, 7 Jun 2020 21:55:25 +0300 [thread overview] Message-ID: <20200607185530.18113-35-digetx@gmail.com> (raw) In-Reply-To: <20200607185530.18113-1-digetx@gmail.com> Now external memory controller is a memory interconnection provider. This allows us to use interconnect API to change memory configuration. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- drivers/memory/tegra/tegra30-emc.c | 115 +++++++++++++++++++++++++++++ 1 file changed, 115 insertions(+) diff --git a/drivers/memory/tegra/tegra30-emc.c b/drivers/memory/tegra/tegra30-emc.c index 76586edb34ee..096ec5265084 100644 --- a/drivers/memory/tegra/tegra30-emc.c +++ b/drivers/memory/tegra/tegra30-emc.c @@ -14,6 +14,7 @@ #include <linux/debugfs.h> #include <linux/delay.h> #include <linux/err.h> +#include <linux/interconnect-provider.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/iopoll.h> @@ -327,6 +328,7 @@ struct tegra_emc { struct device *dev; struct tegra_mc *mc; struct notifier_block clk_nb; + struct icc_provider provider; struct clk *clk; void __iomem *regs; unsigned int irq; @@ -1264,6 +1266,112 @@ static void tegra_emc_debugfs_init(struct tegra_emc *emc) emc, &tegra_emc_debug_max_rate_fops); } +static inline struct tegra_emc * +to_tegra_emc_provider(struct icc_provider *provider) +{ + return container_of(provider, struct tegra_emc, provider); +} + +static struct icc_node * +emc_of_icc_xlate(struct of_phandle_args *spec, void *data) +{ + struct icc_provider *provider = data; + struct icc_node *node; + + /* External Memory is the only possible ICC route */ + list_for_each_entry(node, &provider->nodes, node_list) { + if (node->id == TEGRA_ICC_EMEM) + return node; + } + + return ERR_PTR(-EINVAL); +} + +static int emc_icc_set(struct icc_node *src, struct icc_node *dst) +{ + struct tegra_emc *emc = to_tegra_emc_provider(dst->provider); + unsigned long long rate = icc_units_to_bps(dst->avg_bw); + unsigned int dram_data_bus_width_bytes = 4; + unsigned int ddr = 2; + int err; + + do_div(rate, ddr * dram_data_bus_width_bytes); + rate = min_t(u64, rate, U32_MAX); + + err = clk_set_min_rate(emc->clk, rate); + if (err) + return err; + + err = clk_set_rate(emc->clk, rate); + if (err) + return err; + + return 0; +} + +static int emc_icc_aggregate(struct icc_node *node, + u32 tag, u32 avg_bw, u32 peak_bw, + u32 *agg_avg, u32 *agg_peak) +{ + *agg_avg = min((u64)avg_bw + (*agg_avg), (u64)U32_MAX); + *agg_peak = max(*agg_peak, peak_bw); + + return 0; +} + +static int tegra_emc_interconnect_init(struct tegra_emc *emc) +{ + struct icc_node *node; + int err; + + /* older device-trees don't have interconnect properties */ + if (!of_find_property(emc->dev->of_node, "#interconnect-cells", NULL)) + return 0; + + emc->provider.dev = emc->dev; + emc->provider.set = emc_icc_set; + emc->provider.data = &emc->provider; + emc->provider.xlate = emc_of_icc_xlate; + emc->provider.aggregate = emc_icc_aggregate; + + err = icc_provider_add(&emc->provider); + if (err) + return err; + + /* create External Memory Controller node */ + node = icc_node_create(TEGRA_ICC_EMC); + err = PTR_ERR_OR_ZERO(node); + if (err) + goto del_provider; + + node->name = "External Memory Controller"; + icc_node_add(node, &emc->provider); + + /* link External Memory Controller to External Memory (DRAM) */ + err = icc_link_create(node, TEGRA_ICC_EMEM); + if (err) + goto remove_nodes; + + /* create External Memory node */ + node = icc_node_create(TEGRA_ICC_EMEM); + err = PTR_ERR_OR_ZERO(node); + if (err) + goto remove_nodes; + + node->name = "External Memory (DRAM)"; + icc_node_add(node, &emc->provider); + + return 0; + +remove_nodes: + icc_nodes_remove(&emc->provider); + +del_provider: + icc_provider_del(&emc->provider); + + return err; +} + static int tegra_emc_probe(struct platform_device *pdev) { struct platform_device *mc; @@ -1344,6 +1452,13 @@ static int tegra_emc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, emc); tegra_emc_debugfs_init(emc); + if (IS_ENABLED(CONFIG_INTERCONNECT)) { + err = tegra_emc_interconnect_init(emc); + if (err) + dev_err(&pdev->dev, "failed to initialize ICC: %d\n", + err); + } + /* * Don't allow the kernel module to be unloaded. Unloading adds some * extra complexity which doesn't really worth the effort in a case of -- 2.26.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2020-06-07 18:55 UTC|newest] Thread overview: 122+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-06-07 18:54 [PATCH v3 00/39] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` [PATCH v3 02/39] clk: tegra: Remove Memory Controller lock Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 12/39] PM / devfreq: tegra20: Use MC timings for building OPP table Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 13/39] PM / devfreq: tegra30: " Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 17/39] PM / devfreq: tegra20: Relax Kconfig dependency Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 19/39] dt-bindings: memory: tegra20: emc: Document new interconnect property Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 22/39] dt-bindings: host1x: Document new interconnect properties Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 30/39] memory: tegra20-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 33/39] memory: tegra30-emc: " Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko [this message] 2020-06-07 18:55 ` [PATCH v3 34/39] memory: tegra30-emc: Register as interconnect provider Dmitry Osipenko [not found] ` <20200607185530.18113-1-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-06-07 18:54 ` [PATCH v3 01/39] clk: Export clk_hw_reparent() Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` [PATCH v3 03/39] clk: tegra: Export Tegra20 EMC kernel symbols Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` [PATCH v3 04/39] memory: tegra20-emc: Make driver modular Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` [PATCH v3 05/39] memory: tegra30-emc: " Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` [PATCH v3 06/39] memory: tegra124-emc: " Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` [PATCH v3 07/39] memory: tegra124-emc: Use devm_platform_ioremap_resource Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` [PATCH v3 08/39] soc/tegra: fuse: Export tegra_read_ram_code() Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:54 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 09/39] memory: tegra20-emc: Initialize MC timings Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 10/39] PM / devfreq: tegra20: Silence deferred probe error Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 11/39] PM / devfreq: tegra30: " Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 14/39] PM / devfreq: tegra20: Add error messages to tegra_devfreq_target() Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 15/39] PM / devfreq: tegra30: " Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 16/39] PM / devfreq: tegra20: Adjust clocks conversion ratio and polling interval Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 18/39] dt-bindings: memory: tegra20: mc: Document new interconnect property Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 20/39] dt-bindings: memory: tegra30: " Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 21/39] dt-bindings: memory: tegra30: emc: " Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 23/39] dt-bindings: memory: tegra20: Add memory client IDs Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko [not found] ` <20200607185530.18113-24-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-06-09 20:01 ` Rob Herring 2020-06-09 20:01 ` Rob Herring 2020-06-09 20:01 ` Rob Herring 2020-06-07 18:55 ` [PATCH v3 24/39] dt-bindings: memory: tegra30: " Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko [not found] ` <20200607185530.18113-25-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-06-09 20:02 ` Rob Herring 2020-06-09 20:02 ` Rob Herring 2020-06-09 20:02 ` Rob Herring 2020-06-07 18:55 ` [PATCH v3 25/39] ARM: tegra: Add interconnect properties to Tegra20 device-tree Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 26/39] ARM: tegra: Add interconnect properties to Tegra30 device-tree Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 27/39] interconnect: Relax requirement in of_icc_get_from_provider() Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 28/39] memory: tegra: Register as interconnect provider Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 23:06 ` kernel test robot 2020-06-07 23:38 ` kernel test robot 2020-06-08 0:13 ` kernel test robot 2020-06-07 18:55 ` [PATCH v3 29/39] memory: tegra20-emc: Use devm_platform_ioremap_resource Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 31/39] memory: tegra20-emc: Register as interconnect provider Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko [not found] ` <20200607185530.18113-32-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-06-07 21:47 ` Dmitry Osipenko 2020-06-07 21:47 ` Dmitry Osipenko 2020-06-07 21:47 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 32/39] memory: tegra20-emc: Create tegra20-devfreq device Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 35/39] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 36/39] drm/tegra: dc: Tune up high priority request controls for Tegra20 Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 37/39] drm/tegra: dc: Extend debug stats with total number of events Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 39/39] ARM: multi_v7_defconfig: Enable interconnect API Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko 2020-06-07 18:55 ` [PATCH v3 38/39] ARM: tegra: Enable interconnect API in tegra_defconfig Dmitry Osipenko 2020-06-07 18:55 ` Dmitry Osipenko
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