From: Jim Quinlan <james.quinlan@broadcom.com>
To: linux-pci@vger.kernel.org,
Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
bcm-kernel-feedback-list@broadcom.com,
james.quinlan@broadcom.com
Cc: Jim Quinlan <james.quinlan@broadcom.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Rob Herring <robh@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Florian Fainelli <f.fainelli@gmail.com>,
linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM
BCM2711/BCM2835 ARM ARCHITECTURE),
linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM
BCM2711/BCM2835 ARM ARCHITECTURE),
linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v6 06/12] PCI: brcmstb: Add bcm7278 PERST# support
Date: Wed, 1 Jul 2020 17:21:36 -0400 [thread overview]
Message-ID: <20200701212155.37830-7-james.quinlan@broadcom.com> (raw)
In-Reply-To: <20200701212155.37830-1-james.quinlan@broadcom.com>
From: Jim Quinlan <jquinlan@broadcom.com>
The PERST# bit was moved to a different register in 7278-type STB chips.
In addition, the polarity of the bit was also changed; for other chips
writing a 1 specified assert; for 7278-type chips, writing a 0 specifies
assert.
Of course, PERST# is a PCIe asserted-low signal.
Signed-off-by: Jim Quinlan <jquinlan@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/pci/controller/pcie-brcmstb.c | 19 +++++++++++++++----
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index 7c148eb65170..e5e7f7d82eda 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -83,6 +83,7 @@
#define PCIE_MISC_PCIE_CTRL 0x4064
#define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK 0x1
+#define PCIE_MISC_PCIE_CTRL_PCIE_PERSTB_MASK 0x4
#define PCIE_MISC_PCIE_STATUS 0x4068
#define PCIE_MISC_PCIE_STATUS_PCIE_PORT_MASK 0x80
@@ -685,9 +686,16 @@ static inline void brcm_pcie_perst_set(struct brcm_pcie *pcie, u32 val)
{
u32 tmp;
- tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
- u32p_replace_bits(&tmp, val, PCIE_RGR1_SW_INIT_1_PERST_MASK);
- writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
+ if (pcie->type == BCM7278) {
+ /* Perst bit has moved and assert value is 0 */
+ tmp = readl(pcie->base + PCIE_MISC_PCIE_CTRL);
+ u32p_replace_bits(&tmp, !val, PCIE_MISC_PCIE_CTRL_PCIE_PERSTB_MASK);
+ writel(tmp, pcie->base + PCIE_MISC_PCIE_CTRL);
+ } else {
+ tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
+ u32p_replace_bits(&tmp, val, PCIE_RGR1_SW_INIT_1_PERST_MASK);
+ writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
+ }
}
static inline int brcm_pcie_get_rc_bar2_size_and_offset(struct brcm_pcie *pcie,
@@ -772,7 +780,10 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
/* Reset the bridge */
brcm_pcie_bridge_sw_init_set(pcie, 1);
- brcm_pcie_perst_set(pcie, 1);
+
+ /* BCM7278 fails when PERST# is set here */
+ if (pcie->type != BCM7278)
+ brcm_pcie_perst_set(pcie, 1);
usleep_range(100, 200);
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Jim Quinlan <james.quinlan@broadcom.com>
To: linux-pci@vger.kernel.org,
Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
bcm-kernel-feedback-list@broadcom.com,
james.quinlan@broadcom.com
Cc: Rob Herring <robh@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
open list <linux-kernel@vger.kernel.org>,
Florian Fainelli <f.fainelli@gmail.com>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@lists.infradead.org>,
Jim Quinlan <james.quinlan@broadcom.com>,
Bjorn Helgaas <bhelgaas@google.com>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH v6 06/12] PCI: brcmstb: Add bcm7278 PERST# support
Date: Wed, 1 Jul 2020 17:21:36 -0400 [thread overview]
Message-ID: <20200701212155.37830-7-james.quinlan@broadcom.com> (raw)
In-Reply-To: <20200701212155.37830-1-james.quinlan@broadcom.com>
From: Jim Quinlan <jquinlan@broadcom.com>
The PERST# bit was moved to a different register in 7278-type STB chips.
In addition, the polarity of the bit was also changed; for other chips
writing a 1 specified assert; for 7278-type chips, writing a 0 specifies
assert.
Of course, PERST# is a PCIe asserted-low signal.
Signed-off-by: Jim Quinlan <jquinlan@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/pci/controller/pcie-brcmstb.c | 19 +++++++++++++++----
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index 7c148eb65170..e5e7f7d82eda 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -83,6 +83,7 @@
#define PCIE_MISC_PCIE_CTRL 0x4064
#define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK 0x1
+#define PCIE_MISC_PCIE_CTRL_PCIE_PERSTB_MASK 0x4
#define PCIE_MISC_PCIE_STATUS 0x4068
#define PCIE_MISC_PCIE_STATUS_PCIE_PORT_MASK 0x80
@@ -685,9 +686,16 @@ static inline void brcm_pcie_perst_set(struct brcm_pcie *pcie, u32 val)
{
u32 tmp;
- tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
- u32p_replace_bits(&tmp, val, PCIE_RGR1_SW_INIT_1_PERST_MASK);
- writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
+ if (pcie->type == BCM7278) {
+ /* Perst bit has moved and assert value is 0 */
+ tmp = readl(pcie->base + PCIE_MISC_PCIE_CTRL);
+ u32p_replace_bits(&tmp, !val, PCIE_MISC_PCIE_CTRL_PCIE_PERSTB_MASK);
+ writel(tmp, pcie->base + PCIE_MISC_PCIE_CTRL);
+ } else {
+ tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
+ u32p_replace_bits(&tmp, val, PCIE_RGR1_SW_INIT_1_PERST_MASK);
+ writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
+ }
}
static inline int brcm_pcie_get_rc_bar2_size_and_offset(struct brcm_pcie *pcie,
@@ -772,7 +780,10 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
/* Reset the bridge */
brcm_pcie_bridge_sw_init_set(pcie, 1);
- brcm_pcie_perst_set(pcie, 1);
+
+ /* BCM7278 fails when PERST# is set here */
+ if (pcie->type != BCM7278)
+ brcm_pcie_perst_set(pcie, 1);
usleep_range(100, 200);
--
2.17.1
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next prev parent reply other threads:[~2020-07-01 21:22 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-01 21:21 [PATCH v6 00/12] PCI: brcmstb: enable PCIe for STB chips Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan via iommu
2020-07-01 21:21 ` Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan
2020-07-01 21:21 ` [PATCH v6 01/12] PCI: brcmstb: PCIE_BRCMSTB depends on ARCH_BRCMSTB Jim Quinlan
2020-07-01 21:21 ` [PATCH v6 02/12] ata: ahci_brcm: Fix use of BCM7216 reset controller Jim Quinlan
2020-07-02 9:32 ` Sergei Shtylyov
2020-07-06 14:31 ` Jim Quinlan
2020-07-01 21:21 ` [PATCH v6 03/12] dt-bindings: PCI: Add bindings for more Brcmstb chips Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan
2020-07-01 21:21 ` [PATCH v6 04/12] PCI: brcmstb: Add bcm7278 register info Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan
2020-07-01 21:21 ` [PATCH v6 05/12] PCI: brcmstb: Add suspend and resume pm_ops Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan [this message]
2020-07-01 21:21 ` [PATCH v6 06/12] PCI: brcmstb: Add bcm7278 PERST# support Jim Quinlan
2020-07-01 21:21 ` [PATCH v6 07/12] PCI: brcmstb: Add control of rescal reset Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan
2020-07-01 21:21 ` [PATCH v6 08/12] device core: Introduce DMA range map, supplanting dma_pfn_offset Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan via iommu
2020-07-02 5:21 ` kernel test robot
2020-07-02 8:42 ` Andy Shevchenko
2020-07-02 8:42 ` Andy Shevchenko
2020-07-02 8:42 ` Andy Shevchenko
2020-07-06 13:40 ` Jim Quinlan
2020-07-06 13:40 ` Jim Quinlan
2020-07-06 13:40 ` Jim Quinlan via iommu
2020-07-07 13:27 ` Dan Carpenter
2020-07-07 13:27 ` Dan Carpenter
2020-07-07 13:27 ` Dan Carpenter
2020-07-07 13:27 ` Dan Carpenter
2020-07-07 14:44 ` Jim Quinlan
2020-07-07 14:44 ` Jim Quinlan
2020-07-07 14:44 ` Jim Quinlan
2020-07-07 15:11 ` Dan Carpenter
2020-07-07 15:11 ` Dan Carpenter
2020-07-07 15:11 ` Dan Carpenter
2020-07-07 15:11 ` Dan Carpenter
2020-07-01 21:21 ` [PATCH v6 09/12] PCI: brcmstb: Set additional internal memory DMA viewport sizes Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan
2020-07-01 21:21 ` [PATCH v6 10/12] PCI: brcmstb: Accommodate MSI for older chips Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan
2020-07-01 21:21 ` [PATCH v6 11/12] PCI: brcmstb: Set bus max burst size by chip type Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan
2020-07-01 21:21 ` [PATCH v6 12/12] PCI: brcmstb: Add bcm7211, bcm7216, bcm7445, bcm7278 to match list Jim Quinlan
2020-07-01 21:21 ` Jim Quinlan
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