From: Bjorn Helgaas <helgaas@kernel.org> To: Ashok Raj <ashok.raj@intel.com> Cc: linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>, Joerg Roedel <joro@8bytes.org>, Lu Baolu <baolu.lu@intel.com>, stable@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Subject: Re: [PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled Date: Fri, 24 Jul 2020 09:51:39 -0500 [thread overview] Message-ID: <20200724145139.GA1518290@bjorn-Precision-5520> (raw) In-Reply-To: <1595543849-19692-1-git-send-email-ashok.raj@intel.com> On Thu, Jul 23, 2020 at 03:37:29PM -0700, Ashok Raj wrote: > PASID and PRI capabilities are only enumerated in PF devices. VF devices > do not enumerate these capabilites. IOMMU drivers also need to enumerate > them before enabling features in the IOMMU. Extending the same support as > PASID feature discovery (pci_pasid_features) for PRI. > > Fixes: b16d0cb9e2fc ("iommu/vt-d: Always enable PASID/PRI PCI capabilities before ATS") > Signed-off-by: Ashok Raj <ashok.raj@intel.com> Applied with Baolu's reviewed-by and Joerg's ack to pci/virtualization for v5.9, thanks! > To: Bjorn Helgaas <bhelgaas@google.com> > To: Joerg Roedel <joro@8bytes.com> > To: Lu Baolu <baolu.lu@intel.com> > Cc: stable@vger.kernel.org > Cc: linux-pci@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: Ashok Raj <ashok.raj@intel.com> > Cc: iommu@lists.linux-foundation.org > --- > v3: Added Fixes tag > v2: Fixed build failure reported from lkp when CONFIG_PRI=n > > drivers/iommu/intel/iommu.c | 2 +- > drivers/pci/ats.c | 13 +++++++++++++ > include/linux/pci-ats.h | 4 ++++ > 3 files changed, 18 insertions(+), 1 deletion(-) > > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > index d759e7234e98..276452f5e6a7 100644 > --- a/drivers/iommu/intel/iommu.c > +++ b/drivers/iommu/intel/iommu.c > @@ -2560,7 +2560,7 @@ static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu, > } > > if (info->ats_supported && ecap_prs(iommu->ecap) && > - pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI)) > + pci_pri_supported(pdev)) > info->pri_supported = 1; > } > } > diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c > index b761c1f72f67..2e6cf0c700f7 100644 > --- a/drivers/pci/ats.c > +++ b/drivers/pci/ats.c > @@ -325,6 +325,19 @@ int pci_prg_resp_pasid_required(struct pci_dev *pdev) > > return pdev->pasid_required; > } > + > +/** > + * pci_pri_supported - Check if PRI is supported. > + * @pdev: PCI device structure > + * > + * Returns true if PRI capability is present, false otherwise. > + */ > +bool pci_pri_supported(struct pci_dev *pdev) > +{ > + /* VFs share the PF PRI configuration */ > + return !!(pci_physfn(pdev)->pri_cap); > +} > +EXPORT_SYMBOL_GPL(pci_pri_supported); > #endif /* CONFIG_PCI_PRI */ > > #ifdef CONFIG_PCI_PASID > diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h > index f75c307f346d..df54cd5b15db 100644 > --- a/include/linux/pci-ats.h > +++ b/include/linux/pci-ats.h > @@ -28,6 +28,10 @@ int pci_enable_pri(struct pci_dev *pdev, u32 reqs); > void pci_disable_pri(struct pci_dev *pdev); > int pci_reset_pri(struct pci_dev *pdev); > int pci_prg_resp_pasid_required(struct pci_dev *pdev); > +bool pci_pri_supported(struct pci_dev *pdev); > +#else > +static inline bool pci_pri_supported(struct pci_dev *pdev) > +{ return false; } > #endif /* CONFIG_PCI_PRI */ > > #ifdef CONFIG_PCI_PASID > -- > 2.7.4 >
WARNING: multiple messages have this Message-ID (diff)
From: Bjorn Helgaas <helgaas@kernel.org> To: Ashok Raj <ashok.raj@intel.com> Cc: Lu Baolu <baolu.lu@intel.com>, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, iommu@lists.linux-foundation.org, Bjorn Helgaas <bhelgaas@google.com> Subject: Re: [PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled Date: Fri, 24 Jul 2020 09:51:39 -0500 [thread overview] Message-ID: <20200724145139.GA1518290@bjorn-Precision-5520> (raw) In-Reply-To: <1595543849-19692-1-git-send-email-ashok.raj@intel.com> On Thu, Jul 23, 2020 at 03:37:29PM -0700, Ashok Raj wrote: > PASID and PRI capabilities are only enumerated in PF devices. VF devices > do not enumerate these capabilites. IOMMU drivers also need to enumerate > them before enabling features in the IOMMU. Extending the same support as > PASID feature discovery (pci_pasid_features) for PRI. > > Fixes: b16d0cb9e2fc ("iommu/vt-d: Always enable PASID/PRI PCI capabilities before ATS") > Signed-off-by: Ashok Raj <ashok.raj@intel.com> Applied with Baolu's reviewed-by and Joerg's ack to pci/virtualization for v5.9, thanks! > To: Bjorn Helgaas <bhelgaas@google.com> > To: Joerg Roedel <joro@8bytes.com> > To: Lu Baolu <baolu.lu@intel.com> > Cc: stable@vger.kernel.org > Cc: linux-pci@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: Ashok Raj <ashok.raj@intel.com> > Cc: iommu@lists.linux-foundation.org > --- > v3: Added Fixes tag > v2: Fixed build failure reported from lkp when CONFIG_PRI=n > > drivers/iommu/intel/iommu.c | 2 +- > drivers/pci/ats.c | 13 +++++++++++++ > include/linux/pci-ats.h | 4 ++++ > 3 files changed, 18 insertions(+), 1 deletion(-) > > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > index d759e7234e98..276452f5e6a7 100644 > --- a/drivers/iommu/intel/iommu.c > +++ b/drivers/iommu/intel/iommu.c > @@ -2560,7 +2560,7 @@ static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu, > } > > if (info->ats_supported && ecap_prs(iommu->ecap) && > - pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI)) > + pci_pri_supported(pdev)) > info->pri_supported = 1; > } > } > diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c > index b761c1f72f67..2e6cf0c700f7 100644 > --- a/drivers/pci/ats.c > +++ b/drivers/pci/ats.c > @@ -325,6 +325,19 @@ int pci_prg_resp_pasid_required(struct pci_dev *pdev) > > return pdev->pasid_required; > } > + > +/** > + * pci_pri_supported - Check if PRI is supported. > + * @pdev: PCI device structure > + * > + * Returns true if PRI capability is present, false otherwise. > + */ > +bool pci_pri_supported(struct pci_dev *pdev) > +{ > + /* VFs share the PF PRI configuration */ > + return !!(pci_physfn(pdev)->pri_cap); > +} > +EXPORT_SYMBOL_GPL(pci_pri_supported); > #endif /* CONFIG_PCI_PRI */ > > #ifdef CONFIG_PCI_PASID > diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h > index f75c307f346d..df54cd5b15db 100644 > --- a/include/linux/pci-ats.h > +++ b/include/linux/pci-ats.h > @@ -28,6 +28,10 @@ int pci_enable_pri(struct pci_dev *pdev, u32 reqs); > void pci_disable_pri(struct pci_dev *pdev); > int pci_reset_pri(struct pci_dev *pdev); > int pci_prg_resp_pasid_required(struct pci_dev *pdev); > +bool pci_pri_supported(struct pci_dev *pdev); > +#else > +static inline bool pci_pri_supported(struct pci_dev *pdev) > +{ return false; } > #endif /* CONFIG_PCI_PRI */ > > #ifdef CONFIG_PCI_PASID > -- > 2.7.4 > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
next prev parent reply other threads:[~2020-07-24 14:51 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-07-23 22:37 [PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled Ashok Raj 2020-07-23 22:37 ` Ashok Raj 2020-07-23 23:54 ` Bjorn Helgaas 2020-07-23 23:54 ` Bjorn Helgaas 2020-07-24 2:32 ` Lu Baolu 2020-07-24 2:32 ` Lu Baolu 2020-07-24 8:48 ` Joerg Roedel 2020-07-24 8:48 ` Joerg Roedel 2020-07-24 14:51 ` Bjorn Helgaas [this message] 2020-07-24 14:51 ` Bjorn Helgaas 2020-07-27 21:24 ` Sasha Levin 2020-07-27 21:24 ` Sasha Levin 2020-07-28 16:31 ` Raj, Ashok 2020-07-28 16:31 ` Raj, Ashok
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