From: Andre Przywara <andre.przywara@arm.com>
To: Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Leo Yan <leo.yan@linaro.org>, Tan Xiaojun <tanxiaojun@huawei.com>,
James Clark <james.clark@arm.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 4/5] perf: arm_spe: Decode memory tagging properties
Date: Tue, 22 Sep 2020 11:12:24 +0100 [thread overview]
Message-ID: <20200922101225.183554-5-andre.przywara@arm.com> (raw)
In-Reply-To: <20200922101225.183554-1-andre.przywara@arm.com>
When SPE records a physical address, it can additionally tag the event
with information from the Memory Tagging architecture extension.
Decode the two additional fields in the SPE event payload.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 943e4155b246..a033f34846a6 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -8,13 +8,14 @@
#include <string.h>
#include <endian.h>
#include <byteswap.h>
+#include <linux/bits.h>
#include "arm-spe-pkt-decoder.h"
-#define BIT(n) (1ULL << (n))
-
#define NS_FLAG BIT(63)
#define EL_FLAG (BIT(62) | BIT(61))
+#define CH_FLAG BIT(62)
+#define PAT_FLAG GENMASK_ULL(59, 56)
#define SPE_HEADER0_PAD 0x0
#define SPE_HEADER0_END 0x1
@@ -447,10 +448,16 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf,
return snprintf(buf, buf_len, "%s 0x%llx el%d ns=%d",
(idx == 1) ? "TGT" : "PC", payload, el, ns);
case 2: return snprintf(buf, buf_len, "VA 0x%llx", payload);
- case 3: ns = !!(packet->payload & NS_FLAG);
+ case 3: {
+ int ch = !!(packet->payload & CH_FLAG);
+ int pat = (packet->payload & PAT_FLAG) >> 56;
+
+ ns = !!(packet->payload & NS_FLAG);
payload &= ~(0xffULL << 56);
- return snprintf(buf, buf_len, "PA 0x%llx ns=%d",
- payload, ns);
+ return snprintf(buf, buf_len,
+ "PA 0x%llx ns=%d ch=%d, pat=%x",
+ payload, ns, ch, pat);
+ }
default: return 0;
}
case ARM_SPE_CONTEXT:
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com>
To: Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
linux-kernel@vger.kernel.org, James Clark <james.clark@arm.com>,
Leo Yan <leo.yan@linaro.org>, Namhyung Kim <namhyung@kernel.org>,
Jiri Olsa <jolsa@redhat.com>, Tan Xiaojun <tanxiaojun@huawei.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/5] perf: arm_spe: Decode memory tagging properties
Date: Tue, 22 Sep 2020 11:12:24 +0100 [thread overview]
Message-ID: <20200922101225.183554-5-andre.przywara@arm.com> (raw)
In-Reply-To: <20200922101225.183554-1-andre.przywara@arm.com>
When SPE records a physical address, it can additionally tag the event
with information from the Memory Tagging architecture extension.
Decode the two additional fields in the SPE event payload.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 943e4155b246..a033f34846a6 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -8,13 +8,14 @@
#include <string.h>
#include <endian.h>
#include <byteswap.h>
+#include <linux/bits.h>
#include "arm-spe-pkt-decoder.h"
-#define BIT(n) (1ULL << (n))
-
#define NS_FLAG BIT(63)
#define EL_FLAG (BIT(62) | BIT(61))
+#define CH_FLAG BIT(62)
+#define PAT_FLAG GENMASK_ULL(59, 56)
#define SPE_HEADER0_PAD 0x0
#define SPE_HEADER0_END 0x1
@@ -447,10 +448,16 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf,
return snprintf(buf, buf_len, "%s 0x%llx el%d ns=%d",
(idx == 1) ? "TGT" : "PC", payload, el, ns);
case 2: return snprintf(buf, buf_len, "VA 0x%llx", payload);
- case 3: ns = !!(packet->payload & NS_FLAG);
+ case 3: {
+ int ch = !!(packet->payload & CH_FLAG);
+ int pat = (packet->payload & PAT_FLAG) >> 56;
+
+ ns = !!(packet->payload & NS_FLAG);
payload &= ~(0xffULL << 56);
- return snprintf(buf, buf_len, "PA 0x%llx ns=%d",
- payload, ns);
+ return snprintf(buf, buf_len,
+ "PA 0x%llx ns=%d ch=%d, pat=%x",
+ payload, ns, ch, pat);
+ }
default: return 0;
}
case ARM_SPE_CONTEXT:
--
2.17.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-09-22 10:12 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-22 10:12 [PATCH 0/5] perf: arm64: Support ARMv8.3-SPE extensions Andre Przywara
2020-09-22 10:12 ` Andre Przywara
2020-09-22 10:12 ` [PATCH 1/5] arm64: spe: Allow new bits in SPE filter register Andre Przywara
2020-09-22 10:12 ` Andre Przywara
2020-09-27 2:51 ` Leo Yan
2020-09-27 2:51 ` Leo Yan
2020-09-22 10:12 ` [PATCH 2/5] perf: arm_spe: Add new event packet bits Andre Przywara
2020-09-22 10:12 ` Andre Przywara
2020-09-27 3:03 ` Leo Yan
2020-09-27 3:03 ` Leo Yan
2020-09-22 10:12 ` [PATCH 3/5] perf: arm_spe: Add nested virt event decoding Andre Przywara
2020-09-22 10:12 ` Andre Przywara
2020-09-27 3:11 ` Leo Yan
2020-09-27 3:11 ` Leo Yan
2020-09-22 10:12 ` Andre Przywara [this message]
2020-09-22 10:12 ` [PATCH 4/5] perf: arm_spe: Decode memory tagging properties Andre Przywara
2020-09-27 3:19 ` Leo Yan
2020-09-27 3:19 ` Leo Yan
2020-10-13 14:51 ` Arnaldo Carvalho de Melo
2020-10-13 14:52 ` Arnaldo Carvalho de Melo
2020-10-13 14:52 ` Arnaldo Carvalho de Melo
2020-09-22 10:12 ` [PATCH 5/5] perf: arm_spe: Decode SVE events Andre Przywara
2020-09-22 10:12 ` Andre Przywara
2020-09-27 3:30 ` Leo Yan
2020-09-27 3:30 ` Leo Yan
2020-09-28 10:15 ` André Przywara
2020-09-28 10:15 ` André Przywara
2020-09-28 11:08 ` Leo Yan
2020-09-28 11:08 ` Leo Yan
2020-09-28 13:21 ` Dave Martin
2020-09-28 13:21 ` Dave Martin
2020-09-28 13:59 ` André Przywara
2020-09-28 13:59 ` André Przywara
2020-09-28 14:47 ` Dave Martin
2020-09-28 14:47 ` Dave Martin
2020-09-29 2:19 ` Leo Yan
2020-09-29 2:19 ` Leo Yan
2020-09-29 14:03 ` Dave Martin
2020-09-29 14:03 ` Dave Martin
2020-09-30 10:34 ` Dave Martin
2020-09-30 10:34 ` Dave Martin
2020-09-30 11:04 ` Leo Yan
2020-09-30 11:04 ` Leo Yan
2020-10-05 10:15 ` Dave Martin
2020-10-05 10:15 ` Dave Martin
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