Re: [Intel-gfx] [PATCH v6 22/24] drm/i915/dg1: DG1 does not support DC6

From: Matt Roper <matthew.d.roper@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v6 22/24] drm/i915/dg1: DG1 does not support DC6
Date: Wed, 30 Sep 2020 09:50:07 -0700	[thread overview]
Message-ID: <20200930165007.GA2245633@mdroper-desk1.amr.corp.intel.com> (raw)
In-Reply-To: <20200930064234.85769-23-lucas.demarchi@intel.com>

On Tue, Sep 29, 2020 at 11:42:32PM -0700, Lucas De Marchi wrote:
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> 
> DC6 is not supported on DG1, so change the allowed DC mask for DG1.
> 
> Cc: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>

Do we have a bspec reference for this?  I can't find anything specific
about this from a casual skim of the pages I'd expect it to be mentioned
on.

If we have a reference added (or a note clarifying that we have offline
confirmation from hardware architects),

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

At some point I think we should re-write this section of the code in
general.  The magic numbers used here are annoying, and a driver
modparam named 'enable_dc' really sounds like it should be a bitmask of
the exact DCs supported (rather than defining a combination of 'up to'
values + DC3CO and omitting DC9 completely).  But we don't need to do
that in a DG1 enabling patch.

Matt

> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 0827e68a9d89..7dfc697ccf78 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -4689,7 +4689,10 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
>  	int max_dc;
>  
>  	if (INTEL_GEN(dev_priv) >= 12) {
> -		max_dc = 4;
> +		if (IS_DG1(dev_priv))
> +			max_dc = 3;
> +		else
> +			max_dc = 4;
>  		/*
>  		 * DC9 has a separate HW flow from the rest of the DC states,
>  		 * not depending on the DMC firmware. It's needed by system
> -- 
> 2.28.0
> 
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-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
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