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From: Qais Yousef <qais.yousef@arm.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>,
	Morten Rasmussen <morten.rasmussen@arm.com>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	James Morse <james.morse@arm.com>,
	linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org
Subject: Re: [RFC PATCH v2 0/4] Add support for Asymmetric AArch32 systems
Date: Wed, 21 Oct 2020 14:15:04 +0100	[thread overview]
Message-ID: <20201021131504.vc3nbf2vt5dtiuva@e107158-lin> (raw)
In-Reply-To: <20201021112656.GB1141598@kroah.com>

Hi Greg

On 10/21/20 13:26, Greg Kroah-Hartman wrote:
> On Wed, Oct 21, 2020 at 11:46:07AM +0100, Qais Yousef wrote:
> > This series adds basic support for Asymmetric AArch32 systems. Full rationale
> > is in v1's cover letter.
> > 
> > 	https://lore.kernel.org/linux-arch/20201008181641.32767-1-qais.yousef@arm.com/
> 
> That is not good, provide full rational in each place, not everyone has
> web access at all time.

Sorry. I usually copy the whole thing but for the first time I do this as
I thought it'd be better to be less wordy. I'll copy the whole thing again next
time.

> Also, you forgot to document this in Documentation/ABI/ like is required
> for sysfs files, and I thought I asked for last time.

Last time there was no sysfs info. It's introduced for the first time here.
There's still no consensus on which direction to go, that is fix it in the
scheduler or let user space handle it all.

> > Changes in v2:
> > 
> > 	* We now reset vcpu->arch.target to force re-initialized for KVM patch.
> > 	  (Marc)
> > 
> > 	* Fix a bug where this_cpu_has_cap() must be called with preemption
> > 	  disabled in check_aarch32_cpumask().
> > 
> > 	* Add new sysctl.enable_asym_32bit. (Catalin)
> > 
> > 	* Export id_aar64fpr0 register in sysfs which allows user space to
> > 	  discover which cpus support 32bit@EL0. The sysctl must be enabled for
> > 	  the user space to discover the asymmetry. (Will/Catalin)
> > 
> > 	* Fixing up affinity in the kernel approach was dropped. The support
> > 	  assumes the user space that wants to enable this support knows how to
> > 	  guarantee correct affinities for 32bit apps by using cpusets.
> 
> I asked you to work with Intel to come up with an agreement of how this
> is going to be represented in userspace.  Why did you not do that?

I did chip in to that thread. AFAIU they're doing something completely
different and unrelated. Their goal is unclear too. They care about big.LITTLE
type of support for Intel and collating already existing information in
a different/new place. I don't see the point. I saw they had several similar
comments from others. They need to send a new version to see if anything
changes.

> Without even looking at the patch set, this is not ok...

Sorry about that. Please keep in mind we're still debating if we want to
support this upstream. And if we do, what shape this should take. My first
version highlighted how things could look like if scheduler took care of the
problem. Now this RFC tries to highlight how things could look like if we go
with pure user space based solution. It's to help maintainers get a better
appreciation of what implementation details incurred in either direction.

At least that was my intention.

I'll improve on the cover letter next time.

Thanks

--
Qais Yousef

WARNING: multiple messages have this Message-ID (diff)
From: Qais Yousef <qais.yousef@arm.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-arch@vger.kernel.org, Will Deacon <will@kernel.org>,
	"Peter Zijlstra \(Intel\)" <peterz@infradead.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	James Morse <james.morse@arm.com>, Marc Zyngier <maz@kernel.org>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Morten Rasmussen <morten.rasmussen@arm.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC PATCH v2 0/4] Add support for Asymmetric AArch32 systems
Date: Wed, 21 Oct 2020 14:15:04 +0100	[thread overview]
Message-ID: <20201021131504.vc3nbf2vt5dtiuva@e107158-lin> (raw)
In-Reply-To: <20201021112656.GB1141598@kroah.com>

Hi Greg

On 10/21/20 13:26, Greg Kroah-Hartman wrote:
> On Wed, Oct 21, 2020 at 11:46:07AM +0100, Qais Yousef wrote:
> > This series adds basic support for Asymmetric AArch32 systems. Full rationale
> > is in v1's cover letter.
> > 
> > 	https://lore.kernel.org/linux-arch/20201008181641.32767-1-qais.yousef@arm.com/
> 
> That is not good, provide full rational in each place, not everyone has
> web access at all time.

Sorry. I usually copy the whole thing but for the first time I do this as
I thought it'd be better to be less wordy. I'll copy the whole thing again next
time.

> Also, you forgot to document this in Documentation/ABI/ like is required
> for sysfs files, and I thought I asked for last time.

Last time there was no sysfs info. It's introduced for the first time here.
There's still no consensus on which direction to go, that is fix it in the
scheduler or let user space handle it all.

> > Changes in v2:
> > 
> > 	* We now reset vcpu->arch.target to force re-initialized for KVM patch.
> > 	  (Marc)
> > 
> > 	* Fix a bug where this_cpu_has_cap() must be called with preemption
> > 	  disabled in check_aarch32_cpumask().
> > 
> > 	* Add new sysctl.enable_asym_32bit. (Catalin)
> > 
> > 	* Export id_aar64fpr0 register in sysfs which allows user space to
> > 	  discover which cpus support 32bit@EL0. The sysctl must be enabled for
> > 	  the user space to discover the asymmetry. (Will/Catalin)
> > 
> > 	* Fixing up affinity in the kernel approach was dropped. The support
> > 	  assumes the user space that wants to enable this support knows how to
> > 	  guarantee correct affinities for 32bit apps by using cpusets.
> 
> I asked you to work with Intel to come up with an agreement of how this
> is going to be represented in userspace.  Why did you not do that?

I did chip in to that thread. AFAIU they're doing something completely
different and unrelated. Their goal is unclear too. They care about big.LITTLE
type of support for Intel and collating already existing information in
a different/new place. I don't see the point. I saw they had several similar
comments from others. They need to send a new version to see if anything
changes.

> Without even looking at the patch set, this is not ok...

Sorry about that. Please keep in mind we're still debating if we want to
support this upstream. And if we do, what shape this should take. My first
version highlighted how things could look like if scheduler took care of the
problem. Now this RFC tries to highlight how things could look like if we go
with pure user space based solution. It's to help maintainers get a better
appreciation of what implementation details incurred in either direction.

At least that was my intention.

I'll improve on the cover letter next time.

Thanks

--
Qais Yousef

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-10-21 13:15 UTC|newest]

Thread overview: 114+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-21 10:46 [RFC PATCH v2 0/4] Add support for Asymmetric AArch32 systems Qais Yousef
2020-10-21 10:46 ` Qais Yousef
2020-10-21 10:46 ` [RFC PATCH v2 1/4] arm64: kvm: Handle " Qais Yousef
2020-10-21 10:46   ` Qais Yousef
2020-10-21 12:02   ` Marc Zyngier
2020-10-21 12:02     ` Marc Zyngier
2020-10-21 13:35     ` Qais Yousef
2020-10-21 13:35       ` Qais Yousef
2020-10-21 13:51       ` Marc Zyngier
2020-10-21 13:51         ` Marc Zyngier
2020-10-21 14:38         ` Qais Yousef
2020-10-21 14:38           ` Qais Yousef
2020-11-02 17:58         ` Qais Yousef
2020-11-02 17:58           ` Qais Yousef
2020-10-21 10:46 ` [RFC PATCH v2 2/4] arm64: Add support for asymmetric AArch32 EL0 configurations Qais Yousef
2020-10-21 10:46   ` Qais Yousef
2020-10-21 15:39   ` Will Deacon
2020-10-21 15:39     ` Will Deacon
2020-10-21 16:21     ` Qais Yousef
2020-10-21 16:21       ` Qais Yousef
2020-10-21 16:52       ` Catalin Marinas
2020-10-21 16:52         ` Catalin Marinas
2020-10-21 17:39         ` Will Deacon
2020-10-21 17:39           ` Will Deacon
2020-10-22  9:53           ` Catalin Marinas
2020-10-22  9:53             ` Catalin Marinas
2020-10-21 10:46 ` [RFC PATCH v2 3/4] arm64: export emulate_sys_reg() Qais Yousef
2020-10-21 10:46   ` Qais Yousef
2020-10-21 10:46 ` [RFC PATCH v2 4/4] arm64: Export id_aar64fpr0 via sysfs Qais Yousef
2020-10-21 10:46   ` Qais Yousef
2020-10-21 11:09   ` Marc Zyngier
2020-10-21 11:09     ` Marc Zyngier
2020-10-21 11:25     ` Greg Kroah-Hartman
2020-10-21 11:25       ` Greg Kroah-Hartman
2020-10-21 11:46       ` Marc Zyngier
2020-10-21 11:46         ` Marc Zyngier
2020-10-21 12:11         ` Greg Kroah-Hartman
2020-10-21 12:11           ` Greg Kroah-Hartman
2020-10-21 13:18         ` Qais Yousef
2020-10-21 13:18           ` Qais Yousef
2020-10-21 12:15     ` Catalin Marinas
2020-10-21 12:15       ` Catalin Marinas
2020-10-21 13:20       ` Qais Yousef
2020-10-21 13:20         ` Qais Yousef
2020-10-21 13:33       ` Morten Rasmussen
2020-10-21 13:33         ` Morten Rasmussen
2020-10-21 14:09         ` Catalin Marinas
2020-10-21 14:09           ` Catalin Marinas
2020-10-21 14:41           ` Morten Rasmussen
2020-10-21 14:41             ` Morten Rasmussen
2020-10-21 14:45           ` Will Deacon
2020-10-21 14:45             ` Will Deacon
2020-10-21 15:10             ` Catalin Marinas
2020-10-21 15:10               ` Catalin Marinas
2020-10-21 15:37               ` Will Deacon
2020-10-21 15:37                 ` Will Deacon
2020-10-21 16:18                 ` Catalin Marinas
2020-10-21 16:18                   ` Catalin Marinas
2020-10-21 17:19                   ` Will Deacon
2020-10-21 17:19                     ` Will Deacon
2020-10-22  9:55                     ` Morten Rasmussen
2020-10-22  9:55                       ` Morten Rasmussen
2020-10-21 14:31         ` Qais Yousef
2020-10-21 14:31           ` Qais Yousef
2020-10-22 10:16           ` Morten Rasmussen
2020-10-22 10:16             ` Morten Rasmussen
2020-10-22 10:48             ` Qais Yousef
2020-10-22 10:48               ` Qais Yousef
2020-10-21 14:41       ` Will Deacon
2020-10-21 14:41         ` Will Deacon
2020-10-21 15:03         ` Qais Yousef
2020-10-21 15:03           ` Qais Yousef
2020-10-21 15:23           ` Will Deacon
2020-10-21 15:23             ` Will Deacon
2020-10-21 16:07             ` Qais Yousef
2020-10-21 16:07               ` Qais Yousef
2020-10-21 17:23               ` Will Deacon
2020-10-21 17:23                 ` Will Deacon
2020-10-21 19:57                 ` Qais Yousef
2020-10-21 19:57                   ` Qais Yousef
2020-10-21 20:26                   ` Will Deacon
2020-10-21 20:26                     ` Will Deacon
2020-10-22  8:16                     ` Catalin Marinas
2020-10-22  8:16                       ` Catalin Marinas
2020-10-22  9:58                       ` Qais Yousef
2020-10-22  9:58                         ` Qais Yousef
2020-10-22 13:47         ` Qais Yousef
2020-10-22 13:47           ` Qais Yousef
2020-10-22 13:55           ` Greg Kroah-Hartman
2020-10-22 13:55             ` Greg Kroah-Hartman
2020-10-22 14:31             ` Catalin Marinas
2020-10-22 14:31               ` Catalin Marinas
2020-10-22 14:34               ` Qais Yousef
2020-10-22 14:34                 ` Qais Yousef
2020-10-26 19:02             ` Qais Yousef
2020-10-26 19:02               ` Qais Yousef
2020-10-26 19:08               ` Greg Kroah-Hartman
2020-10-26 19:08                 ` Greg Kroah-Hartman
2020-10-26 19:18                 ` Qais Yousef
2020-10-26 19:18                   ` Qais Yousef
2020-10-21 11:28   ` Greg Kroah-Hartman
2020-10-21 11:28     ` Greg Kroah-Hartman
2020-10-21 13:22     ` Qais Yousef
2020-10-21 13:22       ` Qais Yousef
2020-10-21 11:26 ` [RFC PATCH v2 0/4] Add support for Asymmetric AArch32 systems Greg Kroah-Hartman
2020-10-21 11:26   ` Greg Kroah-Hartman
2020-10-21 13:15   ` Qais Yousef [this message]
2020-10-21 13:15     ` Qais Yousef
2020-10-21 13:31     ` Greg Kroah-Hartman
2020-10-21 13:31       ` Greg Kroah-Hartman
2020-10-21 13:55       ` Qais Yousef
2020-10-21 13:55         ` Qais Yousef
2020-10-21 14:35       ` Catalin Marinas
2020-10-21 14:35         ` Catalin Marinas

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