From: Biwen Li <biwen.li@oss.nxp.com>
To: linux@rasmusvillemoes.dk, shawnguo@kernel.org,
robh+dt@kernel.org, mark.rutland@arm.com, leoyang.li@nxp.com,
zhiqiang.hou@nxp.com, tglx@linutronix.de, jason@lakedaemon.net,
maz@kernel.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
jiafei.pan@nxp.com, xiaobo.xie@nxp.com,
linux-arm-kernel@lists.infradead.org, Biwen Li <biwen.li@nxp.com>
Subject: [v4 07/11] arm64: dts: ls208xa: add DT node for external interrupt lines
Date: Mon, 30 Nov 2020 18:15:11 +0800 [thread overview]
Message-ID: <20201130101515.27431-7-biwen.li@oss.nxp.com> (raw)
In-Reply-To: <20201130101515.27431-1-biwen.li@oss.nxp.com>
From: Biwen Li <biwen.li@nxp.com>
Add device-tree node for external interrupt lines IRQ0-IRQ11.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
Change in v4:
- none
Change in v3:
- none
Change in v2:
- none
.../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 33 ++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index bf72918fe545..4fdbc6468ce0 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -3,7 +3,7 @@
* Device Tree Include file for Freescale Layerscape-2080A family SoC.
*
* Copyright 2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017-2020 NXP
*
* Abhimanyu Saini <abhimanyu.saini@nxp.com>
*
@@ -277,6 +277,37 @@
little-endian;
};
+ isc: syscon@1f70000 {
+ compatible = "fsl,ls2080a-isc", "syscon";
+ reg = <0x0 0x1f70000 0x0 0x10000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x1f70000 0x10000>;
+
+ extirq: interrupt-controller@14 {
+ compatible = "fsl,ls2080a-extirq", "fsl,ls1088a-extirq";
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x14 4>;
+ interrupt-map =
+ <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0xffffffff 0x0>;
+ };
+ };
+
tmu: tmu@1f80000 {
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f80000 0x0 0x10000>;
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Biwen Li <biwen.li@oss.nxp.com>
To: linux@rasmusvillemoes.dk, shawnguo@kernel.org,
robh+dt@kernel.org, mark.rutland@arm.com, leoyang.li@nxp.com,
zhiqiang.hou@nxp.com, tglx@linutronix.de, jason@lakedaemon.net,
maz@kernel.org
Cc: Biwen Li <biwen.li@nxp.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
xiaobo.xie@nxp.com, jiafei.pan@nxp.com,
linux-arm-kernel@lists.infradead.org
Subject: [v4 07/11] arm64: dts: ls208xa: add DT node for external interrupt lines
Date: Mon, 30 Nov 2020 18:15:11 +0800 [thread overview]
Message-ID: <20201130101515.27431-7-biwen.li@oss.nxp.com> (raw)
In-Reply-To: <20201130101515.27431-1-biwen.li@oss.nxp.com>
From: Biwen Li <biwen.li@nxp.com>
Add device-tree node for external interrupt lines IRQ0-IRQ11.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
Change in v4:
- none
Change in v3:
- none
Change in v2:
- none
.../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 33 ++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index bf72918fe545..4fdbc6468ce0 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -3,7 +3,7 @@
* Device Tree Include file for Freescale Layerscape-2080A family SoC.
*
* Copyright 2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017-2020 NXP
*
* Abhimanyu Saini <abhimanyu.saini@nxp.com>
*
@@ -277,6 +277,37 @@
little-endian;
};
+ isc: syscon@1f70000 {
+ compatible = "fsl,ls2080a-isc", "syscon";
+ reg = <0x0 0x1f70000 0x0 0x10000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x1f70000 0x10000>;
+
+ extirq: interrupt-controller@14 {
+ compatible = "fsl,ls2080a-extirq", "fsl,ls1088a-extirq";
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x14 4>;
+ interrupt-map =
+ <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0xffffffff 0x0>;
+ };
+ };
+
tmu: tmu@1f80000 {
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f80000 0x0 0x10000>;
--
2.17.1
_______________________________________________
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next prev parent reply other threads:[~2020-11-30 10:08 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-30 10:15 [v4 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
2020-11-30 10:15 ` Biwen Li
2020-11-30 10:15 ` [v4 02/11] arm64: dts: ls1043a: add DT node for external interrupt lines Biwen Li
2020-11-30 10:15 ` Biwen Li
2021-01-05 1:45 ` Shawn Guo
2021-01-05 1:45 ` Shawn Guo
2020-11-30 10:15 ` [v4 03/11] arm64: dts: ls1046a: " Biwen Li
2020-11-30 10:15 ` Biwen Li
2020-11-30 10:15 ` [v4 04/11] arm64: dts: ls1046ardb: Add interrupt line for RTC node Biwen Li
2020-11-30 10:15 ` Biwen Li
2020-11-30 10:15 ` [v4 05/11] arm64: dts: ls1088a: add DT node for external interrupt lines Biwen Li
2020-11-30 10:15 ` Biwen Li
2020-11-30 10:15 ` [v4 06/11] arm64: dts: ls1088ardb: fix interrupt line for RTC node Biwen Li
2020-11-30 10:15 ` Biwen Li
2020-11-30 10:15 ` Biwen Li [this message]
2020-11-30 10:15 ` [v4 07/11] arm64: dts: ls208xa: add DT node for external interrupt lines Biwen Li
2020-11-30 10:15 ` [v4 08/11] arm64: dts: ls208xa-rdb: add interrupt line for RTC node Biwen Li
2020-11-30 10:15 ` Biwen Li
2020-11-30 10:15 ` [v4 09/11] arm64: dts: lx2160a: add DT node for external interrupt lines Biwen Li
2020-11-30 10:15 ` Biwen Li
2020-11-30 10:15 ` [v4 10/11] arm64: dts: lx2160ardb: fix interrupt line for RTC node Biwen Li
2020-11-30 10:15 ` Biwen Li
2020-11-30 10:15 ` [v4 11/11] dt-bindings: interrupt-controller: update bindings for supporting more SoCs Biwen Li
2020-11-30 10:15 ` Biwen Li
2020-12-01 2:09 ` Rob Herring
2020-12-01 2:09 ` Rob Herring
2020-12-11 14:58 ` [irqchip: irq/irqchip-next] " irqchip-bot for Biwen Li
2020-12-11 14:58 ` [irqchip: irq/irqchip-next] irqchip/ls-extirq: Add LS1043A, LS1088A external interrupt support irqchip-bot for Hou Zhiqiang
2020-12-11 15:01 ` [v4 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Marc Zyngier
2020-12-11 15:01 ` Marc Zyngier
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