From: Matthew Brost <matthew.brost@intel.com> To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org> Cc: daniele.ceraolospurio@intel.com, john.c.harrison@intel.com, Michal.Wajdeczko@intel.com Subject: [PATCH 13/13] drm/i915/guc: Update firmware to v62.0.0 Date: Wed, 9 Jun 2021 21:36:49 -0700 [thread overview] Message-ID: <20210610043649.144416-14-matthew.brost@intel.com> (raw) In-Reply-To: <20210610043649.144416-1-matthew.brost@intel.com> From: John Harrison <John.C.Harrison@Intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 26 ++++++++++++------------ 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c index df647c9a8d56..9f23e9de3237 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c @@ -48,19 +48,19 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, * firmware as TGL. */ #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \ - fw_def(ALDERLAKE_S, 0, guc_def(tgl, 49, 0, 1), huc_def(tgl, 7, 5, 0)) \ - fw_def(ROCKETLAKE, 0, guc_def(tgl, 49, 0, 1), huc_def(tgl, 7, 5, 0)) \ - fw_def(TIGERLAKE, 0, guc_def(tgl, 49, 0, 1), huc_def(tgl, 7, 5, 0)) \ - fw_def(JASPERLAKE, 0, guc_def(ehl, 49, 0, 1), huc_def(ehl, 9, 0, 0)) \ - fw_def(ELKHARTLAKE, 0, guc_def(ehl, 49, 0, 1), huc_def(ehl, 9, 0, 0)) \ - fw_def(ICELAKE, 0, guc_def(icl, 49, 0, 1), huc_def(icl, 9, 0, 0)) \ - fw_def(COMETLAKE, 5, guc_def(cml, 49, 0, 1), huc_def(cml, 4, 0, 0)) \ - fw_def(COMETLAKE, 0, guc_def(kbl, 49, 0, 1), huc_def(kbl, 4, 0, 0)) \ - fw_def(COFFEELAKE, 0, guc_def(kbl, 49, 0, 1), huc_def(kbl, 4, 0, 0)) \ - fw_def(GEMINILAKE, 0, guc_def(glk, 49, 0, 1), huc_def(glk, 4, 0, 0)) \ - fw_def(KABYLAKE, 0, guc_def(kbl, 49, 0, 1), huc_def(kbl, 4, 0, 0)) \ - fw_def(BROXTON, 0, guc_def(bxt, 49, 0, 1), huc_def(bxt, 2, 0, 0)) \ - fw_def(SKYLAKE, 0, guc_def(skl, 49, 0, 1), huc_def(skl, 2, 0, 0)) + fw_def(ALDERLAKE_S, 0, guc_def(tgl, 62, 0, 0), huc_def(tgl, 7, 5, 0)) \ + fw_def(ROCKETLAKE, 0, guc_def(tgl, 62, 0, 0), huc_def(tgl, 7, 5, 0)) \ + fw_def(TIGERLAKE, 0, guc_def(tgl, 62, 0, 0), huc_def(tgl, 7, 5, 0)) \ + fw_def(JASPERLAKE, 0, guc_def(ehl, 62, 0, 0), huc_def(ehl, 9, 0, 0)) \ + fw_def(ELKHARTLAKE, 0, guc_def(ehl, 62, 0, 0), huc_def(ehl, 9, 0, 0)) \ + fw_def(ICELAKE, 0, guc_def(icl, 62, 0, 0), huc_def(icl, 9, 0, 0)) \ + fw_def(COMETLAKE, 5, guc_def(cml, 62, 0, 0), huc_def(cml, 4, 0, 0)) \ + fw_def(COMETLAKE, 0, guc_def(kbl, 62, 0, 0), huc_def(kbl, 4, 0, 0)) \ + fw_def(COFFEELAKE, 0, guc_def(kbl, 62, 0, 0), huc_def(kbl, 4, 0, 0)) \ + fw_def(GEMINILAKE, 0, guc_def(glk, 62, 0, 0), huc_def(glk, 4, 0, 0)) \ + fw_def(KABYLAKE, 0, guc_def(kbl, 62, 0, 0), huc_def(kbl, 4, 0, 0)) \ + fw_def(BROXTON, 0, guc_def(bxt, 62, 0, 0), huc_def(bxt, 2, 0, 0)) \ + fw_def(SKYLAKE, 0, guc_def(skl, 62, 0, 0), huc_def(skl, 2, 0, 0)) #define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \ "i915/" \ -- 2.28.0
WARNING: multiple messages have this Message-ID (diff)
From: Matthew Brost <matthew.brost@intel.com> To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org> Subject: [Intel-gfx] [PATCH 13/13] drm/i915/guc: Update firmware to v62.0.0 Date: Wed, 9 Jun 2021 21:36:49 -0700 [thread overview] Message-ID: <20210610043649.144416-14-matthew.brost@intel.com> (raw) In-Reply-To: <20210610043649.144416-1-matthew.brost@intel.com> From: John Harrison <John.C.Harrison@Intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 26 ++++++++++++------------ 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c index df647c9a8d56..9f23e9de3237 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c @@ -48,19 +48,19 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, * firmware as TGL. */ #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \ - fw_def(ALDERLAKE_S, 0, guc_def(tgl, 49, 0, 1), huc_def(tgl, 7, 5, 0)) \ - fw_def(ROCKETLAKE, 0, guc_def(tgl, 49, 0, 1), huc_def(tgl, 7, 5, 0)) \ - fw_def(TIGERLAKE, 0, guc_def(tgl, 49, 0, 1), huc_def(tgl, 7, 5, 0)) \ - fw_def(JASPERLAKE, 0, guc_def(ehl, 49, 0, 1), huc_def(ehl, 9, 0, 0)) \ - fw_def(ELKHARTLAKE, 0, guc_def(ehl, 49, 0, 1), huc_def(ehl, 9, 0, 0)) \ - fw_def(ICELAKE, 0, guc_def(icl, 49, 0, 1), huc_def(icl, 9, 0, 0)) \ - fw_def(COMETLAKE, 5, guc_def(cml, 49, 0, 1), huc_def(cml, 4, 0, 0)) \ - fw_def(COMETLAKE, 0, guc_def(kbl, 49, 0, 1), huc_def(kbl, 4, 0, 0)) \ - fw_def(COFFEELAKE, 0, guc_def(kbl, 49, 0, 1), huc_def(kbl, 4, 0, 0)) \ - fw_def(GEMINILAKE, 0, guc_def(glk, 49, 0, 1), huc_def(glk, 4, 0, 0)) \ - fw_def(KABYLAKE, 0, guc_def(kbl, 49, 0, 1), huc_def(kbl, 4, 0, 0)) \ - fw_def(BROXTON, 0, guc_def(bxt, 49, 0, 1), huc_def(bxt, 2, 0, 0)) \ - fw_def(SKYLAKE, 0, guc_def(skl, 49, 0, 1), huc_def(skl, 2, 0, 0)) + fw_def(ALDERLAKE_S, 0, guc_def(tgl, 62, 0, 0), huc_def(tgl, 7, 5, 0)) \ + fw_def(ROCKETLAKE, 0, guc_def(tgl, 62, 0, 0), huc_def(tgl, 7, 5, 0)) \ + fw_def(TIGERLAKE, 0, guc_def(tgl, 62, 0, 0), huc_def(tgl, 7, 5, 0)) \ + fw_def(JASPERLAKE, 0, guc_def(ehl, 62, 0, 0), huc_def(ehl, 9, 0, 0)) \ + fw_def(ELKHARTLAKE, 0, guc_def(ehl, 62, 0, 0), huc_def(ehl, 9, 0, 0)) \ + fw_def(ICELAKE, 0, guc_def(icl, 62, 0, 0), huc_def(icl, 9, 0, 0)) \ + fw_def(COMETLAKE, 5, guc_def(cml, 62, 0, 0), huc_def(cml, 4, 0, 0)) \ + fw_def(COMETLAKE, 0, guc_def(kbl, 62, 0, 0), huc_def(kbl, 4, 0, 0)) \ + fw_def(COFFEELAKE, 0, guc_def(kbl, 62, 0, 0), huc_def(kbl, 4, 0, 0)) \ + fw_def(GEMINILAKE, 0, guc_def(glk, 62, 0, 0), huc_def(glk, 4, 0, 0)) \ + fw_def(KABYLAKE, 0, guc_def(kbl, 62, 0, 0), huc_def(kbl, 4, 0, 0)) \ + fw_def(BROXTON, 0, guc_def(bxt, 62, 0, 0), huc_def(bxt, 2, 0, 0)) \ + fw_def(SKYLAKE, 0, guc_def(skl, 62, 0, 0), huc_def(skl, 2, 0, 0)) #define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \ "i915/" \ -- 2.28.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-06-10 4:19 UTC|newest] Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-10 4:36 [PATCH 00/13] Update firmware to v62.0.0 Matthew Brost 2021-06-10 4:36 ` [Intel-gfx] " Matthew Brost 2021-06-10 4:16 ` Matthew Brost 2021-06-10 4:16 ` Matthew Brost 2021-06-10 4:36 ` [PATCH 01/13] drm/i915/guc: Introduce unified HXG messages Matthew Brost 2021-06-10 4:36 ` [Intel-gfx] " Matthew Brost 2021-06-14 17:04 ` Daniele Ceraolo Spurio 2021-06-14 17:04 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-06-10 4:36 ` [PATCH 02/13] drm/i915/guc: Update MMIO based communication Matthew Brost 2021-06-10 4:36 ` [Intel-gfx] " Matthew Brost 2021-06-14 18:11 ` Daniele Ceraolo Spurio 2021-06-14 18:11 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-06-10 4:36 ` [PATCH 03/13] drm/i915/guc: Update CTB response status definition Matthew Brost 2021-06-10 4:36 ` [Intel-gfx] " Matthew Brost 2021-06-10 4:36 ` [PATCH 04/13] drm/i915/guc: Support per context scheduling policies Matthew Brost 2021-06-10 4:36 ` [Intel-gfx] " Matthew Brost 2021-06-10 4:36 ` [PATCH 05/13] drm/i915/guc: Add flag for mark broken CTB Matthew Brost 2021-06-10 4:36 ` [Intel-gfx] " Matthew Brost 2021-06-10 4:36 ` [PATCH 06/13] drm/i915/guc: New definition of the CTB descriptor Matthew Brost 2021-06-10 4:36 ` [Intel-gfx] " Matthew Brost 2021-06-14 18:17 ` Daniele Ceraolo Spurio 2021-06-14 18:17 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-06-10 4:36 ` [PATCH 07/13] drm/i915/guc: New definition of the CTB registration action Matthew Brost 2021-06-10 4:36 ` [Intel-gfx] " Matthew Brost 2021-06-14 18:21 ` Daniele Ceraolo Spurio 2021-06-14 18:21 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-06-10 4:36 ` [PATCH 08/13] drm/i915/guc: New CTB based communication Matthew Brost 2021-06-10 4:36 ` [Intel-gfx] " Matthew Brost 2021-06-14 18:24 ` Daniele Ceraolo Spurio 2021-06-14 18:24 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-06-10 4:36 ` [PATCH 09/13] drm/i915/doc: Include GuC ABI documentation Matthew Brost 2021-06-10 4:36 ` [Intel-gfx] " Matthew Brost 2021-06-10 13:55 ` Piotr Piórkowski 2021-06-10 13:55 ` Piotr Piórkowski 2021-06-10 4:36 ` [PATCH 10/13] drm/i915/guc: Kill guc_clients.ct_pool Matthew Brost 2021-06-10 4:36 ` [Intel-gfx] " Matthew Brost 2021-06-10 4:36 ` [PATCH 11/13] drm/i915/guc: Kill ads.client_info Matthew Brost 2021-06-10 4:36 ` [Intel-gfx] " Matthew Brost 2021-06-10 4:36 ` [PATCH 12/13] drm/i915/guc: Unified GuC log Matthew Brost 2021-06-10 4:36 ` [Intel-gfx] " Matthew Brost 2021-06-10 4:36 ` Matthew Brost [this message] 2021-06-10 4:36 ` [Intel-gfx] [PATCH 13/13] drm/i915/guc: Update firmware to v62.0.0 Matthew Brost 2021-06-10 5:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Update firmware to v62.0.0 (rev2) Patchwork 2021-06-10 5:10 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-06-10 5:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-06-10 7:10 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2021-06-10 13:35 ` [PATCH 00/13] Update firmware to v62.0.0 Michal Wajdeczko 2021-06-10 13:35 ` [Intel-gfx] " Michal Wajdeczko 2021-06-11 18:46 ` Matthew Brost 2021-06-11 18:46 ` [Intel-gfx] " Matthew Brost -- strict thread matches above, loose matches on Subject: below -- 2021-06-07 18:03 Matthew Brost 2021-06-07 18:03 ` [PATCH 13/13] drm/i915/guc: " Matthew Brost
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210610043649.144416-14-matthew.brost@intel.com \ --to=matthew.brost@intel.com \ --cc=Michal.Wajdeczko@intel.com \ --cc=daniele.ceraolospurio@intel.com \ --cc=dri-devel@lists.freedesktop.org \ --cc=intel-gfx@lists.freedesktop.org \ --cc=john.c.harrison@intel.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.