From: Adam Ford <aford173@gmail.com>
To: linux-arm-kernel@lists.infradead.org
Cc: aford@beaconembedded.com, Adam Ford <aford173@gmail.com>,
Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
Lucas Stach <l.stach@pengutronix.de>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH V2 9/9] arm64: dts: imx8mn: Enable GPU
Date: Sat, 9 Oct 2021 11:26:59 -0500 [thread overview]
Message-ID: <20211009162700.1452857-10-aford173@gmail.com> (raw)
In-Reply-To: <20211009162700.1452857-1-aford173@gmail.com>
The i.MX8M-Nano features a GC7000. The Etnaviv driver detects it as:
etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6203
Signed-off-by: Adam Ford <aford173@gmail.com>
---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 25 +++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 6ac14903bcef..2aafc17d8aa3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -1089,6 +1089,31 @@ gpmi: nand-controller@33002000 {
status = "disabled";
};
+ gpu: gpu@38000000 {
+ compatible = "vivante,gc";
+ reg = <0x38000000 0x8000>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_GPU_AHB>,
+ <&clk IMX8MN_CLK_GPU_BUS_ROOT>,
+ <&clk IMX8MN_CLK_GPU_CORE_ROOT>,
+ <&clk IMX8MN_CLK_GPU_SHADER>;
+ clock-names = "reg", "bus", "core", "shader";
+ assigned-clocks = <&clk IMX8MN_CLK_GPU_CORE>,
+ <&clk IMX8MN_CLK_GPU_SHADER>,
+ <&clk IMX8MN_CLK_GPU_AXI>,
+ <&clk IMX8MN_CLK_GPU_AHB>,
+ <&clk IMX8MN_GPU_PLL>,
+ <&clk IMX8MN_CLK_GPU_CORE>,
+ <&clk IMX8MN_CLK_GPU_SHADER>;
+ assigned-clock-parents = <&clk IMX8MN_GPU_PLL_OUT>,
+ <&clk IMX8MN_GPU_PLL_OUT>,
+ <&clk IMX8MN_SYS_PLL1_800M>,
+ <&clk IMX8MN_SYS_PLL1_800M>;
+ assigned-clock-rates = <0>, <0>, <800000000>, <400000000>, <1200000000>,
+ <400000000>, <400000000>;
+ power-domains = <&pgc_gpumix>;
+ };
+
gic: interrupt-controller@38800000 {
compatible = "arm,gic-v3";
reg = <0x38800000 0x10000>,
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Adam Ford <aford173@gmail.com>
To: linux-arm-kernel@lists.infradead.org
Cc: aford@beaconembedded.com, Adam Ford <aford173@gmail.com>,
Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
Lucas Stach <l.stach@pengutronix.de>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH V2 9/9] arm64: dts: imx8mn: Enable GPU
Date: Sat, 9 Oct 2021 11:26:59 -0500 [thread overview]
Message-ID: <20211009162700.1452857-10-aford173@gmail.com> (raw)
In-Reply-To: <20211009162700.1452857-1-aford173@gmail.com>
The i.MX8M-Nano features a GC7000. The Etnaviv driver detects it as:
etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6203
Signed-off-by: Adam Ford <aford173@gmail.com>
---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 25 +++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 6ac14903bcef..2aafc17d8aa3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -1089,6 +1089,31 @@ gpmi: nand-controller@33002000 {
status = "disabled";
};
+ gpu: gpu@38000000 {
+ compatible = "vivante,gc";
+ reg = <0x38000000 0x8000>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_GPU_AHB>,
+ <&clk IMX8MN_CLK_GPU_BUS_ROOT>,
+ <&clk IMX8MN_CLK_GPU_CORE_ROOT>,
+ <&clk IMX8MN_CLK_GPU_SHADER>;
+ clock-names = "reg", "bus", "core", "shader";
+ assigned-clocks = <&clk IMX8MN_CLK_GPU_CORE>,
+ <&clk IMX8MN_CLK_GPU_SHADER>,
+ <&clk IMX8MN_CLK_GPU_AXI>,
+ <&clk IMX8MN_CLK_GPU_AHB>,
+ <&clk IMX8MN_GPU_PLL>,
+ <&clk IMX8MN_CLK_GPU_CORE>,
+ <&clk IMX8MN_CLK_GPU_SHADER>;
+ assigned-clock-parents = <&clk IMX8MN_GPU_PLL_OUT>,
+ <&clk IMX8MN_GPU_PLL_OUT>,
+ <&clk IMX8MN_SYS_PLL1_800M>,
+ <&clk IMX8MN_SYS_PLL1_800M>;
+ assigned-clock-rates = <0>, <0>, <800000000>, <400000000>, <1200000000>,
+ <400000000>, <400000000>;
+ power-domains = <&pgc_gpumix>;
+ };
+
gic: interrupt-controller@38800000 {
compatible = "arm,gic-v3";
reg = <0x38800000 0x10000>,
--
2.25.1
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next prev parent reply other threads:[~2021-10-09 16:27 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-09 16:26 [PATCH V2 0/9] arm64: imx8mn: Enable additional power domains and peripherals Adam Ford
2021-10-09 16:26 ` Adam Ford
2021-10-09 16:26 ` [PATCH V2 1/9] soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled Adam Ford
2021-10-09 16:26 ` Adam Ford
2021-10-09 16:26 ` [PATCH V2 2/9] soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn Adam Ford
2021-10-09 16:26 ` Adam Ford
2021-10-09 16:26 ` [PATCH V2 3/9] dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domains Adam Ford
2021-10-09 16:26 ` Adam Ford
2021-10-09 16:26 ` [PATCH V2 4/9] dt-bindings: soc: add binding for i.MX8MN DISP blk-ctrl Adam Ford
2021-10-09 16:26 ` Adam Ford
2021-10-10 19:31 ` Rob Herring
2021-10-10 19:31 ` Rob Herring
2021-10-09 16:26 ` [PATCH V2 5/9] soc: imx: imx8m-blk-ctrl: add " Adam Ford
2021-10-09 16:26 ` Adam Ford
2021-10-16 21:02 ` Adam Ford
2021-10-16 21:02 ` Adam Ford
2021-10-09 16:26 ` [PATCH V2 6/9] arm64: dts: imx8mn: add GPC node Adam Ford
2021-10-09 16:26 ` Adam Ford
2021-10-09 16:26 ` [PATCH V2 7/9] arm64: dts: imx8mn: put USB controller into power-domains Adam Ford
2021-10-09 16:26 ` Adam Ford
2021-10-09 16:26 ` [PATCH V2 8/9] arm64: dts: imx8mn: add DISP blk-ctrl Adam Ford
2021-10-09 16:26 ` Adam Ford
2021-10-09 16:26 ` Adam Ford [this message]
2021-10-09 16:26 ` [PATCH V2 9/9] arm64: dts: imx8mn: Enable GPU Adam Ford
2021-10-29 17:22 ` [PATCH V2 0/9] arm64: imx8mn: Enable additional power domains and peripherals Adam Ford
2021-10-29 17:22 ` Adam Ford
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