From: Tudor Ambarus <tudor.ambarus@microchip.com> To: <michael@walle.cc>, <vigneshr@ti.com>, <p.yadav@ti.com> Cc: macromorgan@hotmail.com, jaimeliao@mxic.com.tw, Tudor Ambarus <tudor.ambarus@microchip.com>, richard@nod.at, esben@geanix.com, linux@rasmusvillemoes.dk, knaerzche@gmail.com, nicolas.ferre@microchip.com, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, code@reto-schneider.ch, miquel.raynal@bootlin.com, heiko.thiery@gmail.com, sr@denx.de, mail@david-bauer.net, zhengxunli@mxic.com.tw Subject: [PATCH v3 15/25] mtd: spi-nor: Introduce spi_nor_nonsfdp_init_flags() Date: Fri, 29 Oct 2021 20:26:23 +0300 [thread overview] Message-ID: <20211029172633.886453-16-tudor.ambarus@microchip.com> (raw) In-Reply-To: <20211029172633.886453-1-tudor.ambarus@microchip.com> Used to initialize the NOR flags for settings that are not defined in the JESD216 SFDP standard, thus can not be retrieved when parsing SFDP. This moves the setting of SNOR_F_READY_XSR_RDY and SNOR_F_HAS_LOCK late in the init call, without any functional change expected. The rest of the flags were already set after the spi_nor_init_params(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> --- drivers/mtd/spi-nor/core.c | 88 ++++++++++++++++++++++---------------- 1 file changed, 52 insertions(+), 36 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 82cc56c9d09e..0e31f8a2457d 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2663,6 +2663,56 @@ static void spi_nor_info_init_params(struct spi_nor *nor) spi_nor_init_uniform_erase_map(map, erase_mask, params->size); } +/** + * spi_nor_nonsfdp_init_flags() - Initialize NOR flags for settings that are not + * defined in the JESD216 SFDP standard, thus can not be retrieved when parsing + * SFDP. + * @nor: pointer to a 'struct spi_nor' + */ +static void spi_nor_nonsfdp_init_flags(struct spi_nor *nor) +{ + struct device_node *np = spi_nor_get_flash_node(nor); + const u32 info_flags = nor->info->flags & NON_SFDP_FLAGS_MASK; + + if (of_property_read_bool(np, "broken-flash-reset")) + nor->flags |= SNOR_F_BROKEN_RESET; + + if (info_flags & SPI_NOR_SWP_IS_VOLATILE) + nor->flags |= SNOR_F_SWP_IS_VOLATILE; + + if (info_flags & SPI_NOR_HAS_LOCK) + nor->flags |= SNOR_F_HAS_LOCK; + + if (info_flags & SPI_NOR_HAS_TB) { + nor->flags |= SNOR_F_HAS_SR_TB; + if (info_flags & SPI_NOR_TB_SR_BIT6) + nor->flags |= SNOR_F_HAS_SR_TB_BIT6; + } + + if (info_flags & SPI_NOR_4BIT_BP) { + nor->flags |= SNOR_F_HAS_4BIT_BP; + if (info_flags & SPI_NOR_BP3_SR_BIT6) + nor->flags |= SNOR_F_HAS_SR_BP3_BIT6; + } + + if (info_flags & NO_CHIP_ERASE) + nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; + + if (info_flags & USE_CLSR) + nor->flags |= SNOR_F_USE_CLSR; + + if (info_flags & USE_FSR) + nor->flags |= SNOR_F_USE_FSR; + + /* + * Make sure the XSR_RDY flag is set before calling + * spi_nor_wait_till_ready(). Xilinx S3AN share MFR + * with Atmel SPI NOR. + */ + if (info_flags & SPI_NOR_XSR_RDY) + nor->flags |= SNOR_F_READY_XSR_RDY; +} + /** * spi_nor_late_init_params() - Late initialization of default flash parameters. * @nor: pointer to a 'struct spi_nor' @@ -2680,6 +2730,8 @@ static void spi_nor_late_init_params(struct spi_nor *nor) if (nor->info->fixups && nor->info->fixups->late_init) nor->info->fixups->late_init(nor); + spi_nor_nonsfdp_init_flags(nor); + /* * NOR protection support. When locking_ops are not provided, we pick * the default ones. @@ -3111,7 +3163,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, const struct flash_info *info; struct device *dev = nor->dev; struct mtd_info *mtd = &nor->mtd; - struct device_node *np = spi_nor_get_flash_node(nor); int ret; int i; @@ -3148,46 +3199,11 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, mutex_init(&nor->lock); - /* - * Make sure the XSR_RDY flag is set before calling - * spi_nor_wait_till_ready(). Xilinx S3AN share MFR - * with Atmel SPI NOR. - */ - if (info->flags & SPI_NOR_XSR_RDY) - nor->flags |= SNOR_F_READY_XSR_RDY; - - if (info->flags & SPI_NOR_HAS_LOCK) - nor->flags |= SNOR_F_HAS_LOCK; - /* Init flash parameters based on flash_info struct and SFDP */ ret = spi_nor_init_params(nor); if (ret) return ret; - if (info->flags & USE_FSR) - nor->flags |= SNOR_F_USE_FSR; - if (info->flags & SPI_NOR_HAS_TB) { - nor->flags |= SNOR_F_HAS_SR_TB; - if (info->flags & SPI_NOR_TB_SR_BIT6) - nor->flags |= SNOR_F_HAS_SR_TB_BIT6; - } - - if (info->flags & NO_CHIP_ERASE) - nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; - if (info->flags & USE_CLSR) - nor->flags |= SNOR_F_USE_CLSR; - if (info->flags & SPI_NOR_SWP_IS_VOLATILE) - nor->flags |= SNOR_F_SWP_IS_VOLATILE; - - if (info->flags & SPI_NOR_4BIT_BP) { - nor->flags |= SNOR_F_HAS_4BIT_BP; - if (info->flags & SPI_NOR_BP3_SR_BIT6) - nor->flags |= SNOR_F_HAS_SR_BP3_BIT6; - } - - if (of_property_read_bool(np, "broken-flash-reset")) - nor->flags |= SNOR_F_BROKEN_RESET; - /* * Configure the SPI memory: * - select op codes for (Fast) Read, Page Program and Sector Erase. -- 2.25.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Tudor Ambarus <tudor.ambarus@microchip.com> To: <michael@walle.cc>, <vigneshr@ti.com>, <p.yadav@ti.com> Cc: macromorgan@hotmail.com, jaimeliao@mxic.com.tw, Tudor Ambarus <tudor.ambarus@microchip.com>, richard@nod.at, esben@geanix.com, linux@rasmusvillemoes.dk, knaerzche@gmail.com, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, code@reto-schneider.ch, miquel.raynal@bootlin.com, heiko.thiery@gmail.com, sr@denx.de, figgyc@figgyc.uk, mail@david-bauer.net, zhengxunli@mxic.com.tw Subject: [PATCH v3 15/25] mtd: spi-nor: Introduce spi_nor_nonsfdp_init_flags() Date: Fri, 29 Oct 2021 20:26:23 +0300 [thread overview] Message-ID: <20211029172633.886453-16-tudor.ambarus@microchip.com> (raw) In-Reply-To: <20211029172633.886453-1-tudor.ambarus@microchip.com> Used to initialize the NOR flags for settings that are not defined in the JESD216 SFDP standard, thus can not be retrieved when parsing SFDP. This moves the setting of SNOR_F_READY_XSR_RDY and SNOR_F_HAS_LOCK late in the init call, without any functional change expected. The rest of the flags were already set after the spi_nor_init_params(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> --- drivers/mtd/spi-nor/core.c | 88 ++++++++++++++++++++++---------------- 1 file changed, 52 insertions(+), 36 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 82cc56c9d09e..0e31f8a2457d 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2663,6 +2663,56 @@ static void spi_nor_info_init_params(struct spi_nor *nor) spi_nor_init_uniform_erase_map(map, erase_mask, params->size); } +/** + * spi_nor_nonsfdp_init_flags() - Initialize NOR flags for settings that are not + * defined in the JESD216 SFDP standard, thus can not be retrieved when parsing + * SFDP. + * @nor: pointer to a 'struct spi_nor' + */ +static void spi_nor_nonsfdp_init_flags(struct spi_nor *nor) +{ + struct device_node *np = spi_nor_get_flash_node(nor); + const u32 info_flags = nor->info->flags & NON_SFDP_FLAGS_MASK; + + if (of_property_read_bool(np, "broken-flash-reset")) + nor->flags |= SNOR_F_BROKEN_RESET; + + if (info_flags & SPI_NOR_SWP_IS_VOLATILE) + nor->flags |= SNOR_F_SWP_IS_VOLATILE; + + if (info_flags & SPI_NOR_HAS_LOCK) + nor->flags |= SNOR_F_HAS_LOCK; + + if (info_flags & SPI_NOR_HAS_TB) { + nor->flags |= SNOR_F_HAS_SR_TB; + if (info_flags & SPI_NOR_TB_SR_BIT6) + nor->flags |= SNOR_F_HAS_SR_TB_BIT6; + } + + if (info_flags & SPI_NOR_4BIT_BP) { + nor->flags |= SNOR_F_HAS_4BIT_BP; + if (info_flags & SPI_NOR_BP3_SR_BIT6) + nor->flags |= SNOR_F_HAS_SR_BP3_BIT6; + } + + if (info_flags & NO_CHIP_ERASE) + nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; + + if (info_flags & USE_CLSR) + nor->flags |= SNOR_F_USE_CLSR; + + if (info_flags & USE_FSR) + nor->flags |= SNOR_F_USE_FSR; + + /* + * Make sure the XSR_RDY flag is set before calling + * spi_nor_wait_till_ready(). Xilinx S3AN share MFR + * with Atmel SPI NOR. + */ + if (info_flags & SPI_NOR_XSR_RDY) + nor->flags |= SNOR_F_READY_XSR_RDY; +} + /** * spi_nor_late_init_params() - Late initialization of default flash parameters. * @nor: pointer to a 'struct spi_nor' @@ -2680,6 +2730,8 @@ static void spi_nor_late_init_params(struct spi_nor *nor) if (nor->info->fixups && nor->info->fixups->late_init) nor->info->fixups->late_init(nor); + spi_nor_nonsfdp_init_flags(nor); + /* * NOR protection support. When locking_ops are not provided, we pick * the default ones. @@ -3111,7 +3163,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, const struct flash_info *info; struct device *dev = nor->dev; struct mtd_info *mtd = &nor->mtd; - struct device_node *np = spi_nor_get_flash_node(nor); int ret; int i; @@ -3148,46 +3199,11 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, mutex_init(&nor->lock); - /* - * Make sure the XSR_RDY flag is set before calling - * spi_nor_wait_till_ready(). Xilinx S3AN share MFR - * with Atmel SPI NOR. - */ - if (info->flags & SPI_NOR_XSR_RDY) - nor->flags |= SNOR_F_READY_XSR_RDY; - - if (info->flags & SPI_NOR_HAS_LOCK) - nor->flags |= SNOR_F_HAS_LOCK; - /* Init flash parameters based on flash_info struct and SFDP */ ret = spi_nor_init_params(nor); if (ret) return ret; - if (info->flags & USE_FSR) - nor->flags |= SNOR_F_USE_FSR; - if (info->flags & SPI_NOR_HAS_TB) { - nor->flags |= SNOR_F_HAS_SR_TB; - if (info->flags & SPI_NOR_TB_SR_BIT6) - nor->flags |= SNOR_F_HAS_SR_TB_BIT6; - } - - if (info->flags & NO_CHIP_ERASE) - nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; - if (info->flags & USE_CLSR) - nor->flags |= SNOR_F_USE_CLSR; - if (info->flags & SPI_NOR_SWP_IS_VOLATILE) - nor->flags |= SNOR_F_SWP_IS_VOLATILE; - - if (info->flags & SPI_NOR_4BIT_BP) { - nor->flags |= SNOR_F_HAS_4BIT_BP; - if (info->flags & SPI_NOR_BP3_SR_BIT6) - nor->flags |= SNOR_F_HAS_SR_BP3_BIT6; - } - - if (of_property_read_bool(np, "broken-flash-reset")) - nor->flags |= SNOR_F_BROKEN_RESET; - /* * Configure the SPI memory: * - select op codes for (Fast) Read, Page Program and Sector Erase. -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-10-29 18:07 UTC|newest] Thread overview: 156+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-10-29 17:26 [PATCH v3 00/25] mtd: spi-nor: Clean params init Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-10-29 17:26 ` [PATCH v3 01/25] mtd: spi-nor: core: Fix spi_nor_flash_parameter otp description Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-09 8:18 ` Michael Walle 2021-11-09 8:18 ` Michael Walle 2021-10-29 17:26 ` [PATCH v3 02/25] mtd: spi-nor: core: Use container_of to get the pointer to struct spi_nor Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-09 8:21 ` Michael Walle 2021-11-09 8:21 ` Michael Walle 2021-11-15 10:59 ` Pratyush Yadav 2021-11-15 10:59 ` Pratyush Yadav 2021-10-29 17:26 ` [PATCH v3 03/25] mtd: spi-nor: Introduce spi_nor_set_mtd_info() Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-09 8:22 ` Michael Walle 2021-11-09 8:22 ` Michael Walle 2021-11-15 18:52 ` Pratyush Yadav 2021-11-15 18:52 ` Pratyush Yadav 2021-11-16 14:25 ` Tudor.Ambarus 2021-11-16 14:25 ` Tudor.Ambarus 2021-11-16 18:11 ` Pratyush Yadav 2021-11-16 18:11 ` Pratyush Yadav 2021-11-17 14:36 ` Tudor.Ambarus 2021-11-17 14:36 ` Tudor.Ambarus 2021-11-19 18:23 ` Pratyush Yadav 2021-11-19 18:23 ` Pratyush Yadav 2021-11-22 8:38 ` Tudor.Ambarus 2021-11-22 8:38 ` Tudor.Ambarus 2021-10-29 17:26 ` [PATCH v3 04/25] mtd: spi-nor: Get rid of nor->page_size Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-09 8:24 ` Michael Walle 2021-11-09 8:24 ` Michael Walle 2021-11-09 8:34 ` Tudor.Ambarus 2021-11-09 8:34 ` Tudor.Ambarus 2021-10-29 17:26 ` [PATCH v3 05/25] mtd: spi-nor: core: Introduce the late_init() hook Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-09 9:31 ` Michael Walle 2021-11-09 9:31 ` Michael Walle 2021-11-15 18:56 ` Pratyush Yadav 2021-11-15 18:56 ` Pratyush Yadav 2021-10-29 17:26 ` [PATCH v3 06/25] mtd: spi-nor: atmel: Use flash late_init() for locking Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-09 9:31 ` Michael Walle 2021-11-09 9:31 ` Michael Walle 2021-11-15 18:59 ` Pratyush Yadav 2021-11-15 18:59 ` Pratyush Yadav 2021-10-29 17:26 ` [PATCH v3 07/25] mtd: spi-nor: sst: " Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-09 9:34 ` Michael Walle 2021-11-09 9:34 ` Michael Walle 2021-11-15 19:00 ` Pratyush Yadav 2021-11-15 19:00 ` Pratyush Yadav 2021-10-29 17:26 ` [PATCH v3 08/25] mtd: spi-nor: winbond: Use manufacturer late_init() for OTP ops Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-09 9:36 ` Michael Walle 2021-11-09 9:36 ` Michael Walle 2021-11-15 19:00 ` Pratyush Yadav 2021-11-15 19:00 ` Pratyush Yadav 2021-10-29 17:26 ` [PATCH v3 09/25] mtd: spi-nor: xilinx: Use manufacturer late_init() to set setup method Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-09 9:43 ` Michael Walle 2021-11-09 9:43 ` Michael Walle 2021-11-15 19:01 ` Pratyush Yadav 2021-11-15 19:01 ` Pratyush Yadav 2021-10-29 17:26 ` [PATCH v3 10/25] mtd: spi-nor: sst: Use manufacturer late_init() to set _write() Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-09 9:47 ` Michael Walle 2021-11-09 9:47 ` Michael Walle 2021-11-09 10:22 ` Tudor.Ambarus 2021-11-09 10:22 ` Tudor.Ambarus 2021-11-09 10:23 ` Tudor.Ambarus 2021-11-09 10:23 ` Tudor.Ambarus 2021-11-09 10:24 ` Michael Walle 2021-11-09 10:24 ` Michael Walle 2021-11-15 19:03 ` Pratyush Yadav 2021-11-15 19:03 ` Pratyush Yadav 2021-10-29 17:26 ` [PATCH v3 11/25] mtd: spi-nor: spansion: Use manufacturer late_init() Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-09 9:48 ` Michael Walle 2021-11-09 9:48 ` Michael Walle 2021-11-15 19:06 ` Pratyush Yadav 2021-11-15 19:06 ` Pratyush Yadav 2021-10-29 17:26 ` [PATCH v3 12/25] mtd: spi-nor: core: Call spi_nor_post_sfdp_fixups() only when SFDP is defined Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-09 10:18 ` Michael Walle 2021-11-09 10:18 ` Michael Walle 2021-10-29 17:26 ` [PATCH v3 13/25] mtd: spi-nor: sst: Get rid of SST_WRITE flash_info flag Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-09 12:21 ` Michael Walle 2021-11-09 12:21 ` Michael Walle 2021-11-09 12:31 ` Tudor.Ambarus 2021-11-09 12:31 ` Tudor.Ambarus 2021-11-12 21:28 ` Michael Walle 2021-11-12 21:28 ` Michael Walle 2021-10-29 17:26 ` [PATCH v3 14/25] mtd: spi-nor: Introduce flash_info flags masks Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-12 21:50 ` Michael Walle 2021-11-12 21:50 ` Michael Walle 2021-11-15 4:55 ` Tudor.Ambarus 2021-11-15 4:55 ` Tudor.Ambarus 2021-10-29 17:26 ` Tudor Ambarus [this message] 2021-10-29 17:26 ` [PATCH v3 15/25] mtd: spi-nor: Introduce spi_nor_nonsfdp_init_flags() Tudor Ambarus 2021-11-15 19:12 ` Pratyush Yadav 2021-11-15 19:12 ` Pratyush Yadav 2021-10-29 17:26 ` [PATCH v3 16/25] mtd: spi-nor: Introduce spi_nor_init_fixup_flags() Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-16 10:57 ` Pratyush Yadav 2021-11-16 10:57 ` Pratyush Yadav 2021-10-29 17:26 ` [PATCH v3 17/25] mtd: spi-nor: core: Introduce SPI_NOR_PARSE_SFDP Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-10-29 17:26 ` [PATCH v3 18/25] mtd: spi-nor: core: Init flash params based on SFDP first for new flash additions Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-16 11:07 ` Pratyush Yadav 2021-11-16 11:07 ` Pratyush Yadav 2021-10-29 17:26 ` [PATCH v3 19/25] mtd: spi-nor: core: Move spi_nor_set_addr_width() in spi_nor_setup() Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-11-12 21:53 ` Michael Walle 2021-11-12 21:53 ` Michael Walle 2021-10-29 17:26 ` [PATCH v3 20/25] mtd: spi-nor: sst: sst26vf064b: Init flash based on SFDP Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-10-29 17:31 ` Tudor.Ambarus 2021-10-29 17:31 ` Tudor.Ambarus 2021-11-09 12:25 ` Michael Walle 2021-11-09 12:25 ` Michael Walle 2021-11-09 12:33 ` Tudor.Ambarus 2021-11-09 12:33 ` Tudor.Ambarus 2021-11-09 12:37 ` Michael Walle 2021-11-09 12:37 ` Michael Walle 2021-10-29 17:26 ` [PATCH v3 21/25] mtd: spi-nor: winbond: w25q256jvm: " Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-10-29 17:31 ` Tudor.Ambarus 2021-10-29 17:31 ` Tudor.Ambarus 2021-10-29 17:26 ` [PATCH v3 22/25] mtd: spi-nor: spansion: s25fl256s0: Skip SFDP parsing Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-10-29 17:26 ` [PATCH v3 23/25] mtd: spi-nor: gigadevice: gd25q256: Init flash based on SFDP Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-10-29 17:33 ` Tudor.Ambarus 2021-10-29 17:33 ` Tudor.Ambarus 2021-10-29 17:26 ` [PATCH v3 24/25] mtd: spi-nor: issi: is25lp256: " Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-10-29 17:33 ` Tudor.Ambarus 2021-10-29 17:33 ` Tudor.Ambarus 2021-10-29 17:26 ` [PATCH v3 25/25] mtd: spi-nor: macronix: mx25l25635e: " Tudor Ambarus 2021-10-29 17:26 ` Tudor Ambarus 2021-10-29 17:34 ` Tudor.Ambarus 2021-10-29 17:34 ` Tudor.Ambarus 2021-11-08 10:15 ` [PATCH v3 00/25] mtd: spi-nor: Clean params init Tudor.Ambarus 2021-11-08 10:15 ` Tudor.Ambarus 2021-11-08 10:31 ` Michael Walle 2021-11-08 10:31 ` Michael Walle 2021-11-16 11:36 ` Pratyush Yadav 2021-11-16 11:36 ` Pratyush Yadav 2021-11-16 11:56 ` Michael Walle 2021-11-16 11:56 ` Michael Walle 2021-11-17 13:17 ` (subset)[PATCH " Tudor Ambarus 2021-11-17 13:17 ` Tudor Ambarus
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