From: Sean Paul <sean@poorly.run>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
freedreno@lists.freedesktop.org
Cc: devicetree@vger.kernel.org, jani.nikula@intel.com,
linux-arm-msm@vger.kernel.org, abhinavk@codeaurora.org,
swboyd@chromium.org, khsieh@codeaurora.org,
David Airlie <airlied@linux.ie>,
robh+dt@kernel.org, seanpaul@chromium.org,
bjorn.andersson@linaro.org, Sean Paul <sean@poorly.run>
Subject: [PATCH v4.5 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
Date: Mon, 15 Nov 2021 20:21:48 +0000 [thread overview]
Message-ID: <20211115202153.117244-1-sean@poorly.run> (raw)
In-Reply-To: <YY7lb9k2UArZf7I/@robh.at.kernel.org>
From: Sean Paul <seanpaul@chromium.org>
This patch adds the bindings for the MSM DisplayPort HDCP registers
which are required to write the HDCP key into the display controller as
well as the registers to enable HDCP authentication/key
exchange/encryption.
We'll use a new compatible string for this since the fields are optional.
Cc: Rob Herring <robh@kernel.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
Link: https://patchwork.freedesktop.org/patch/msgid/20211105030434.2828845-13-sean@poorly.run #v4
Changes in v2:
-Drop register range names (Stephen)
-Fix yaml errors (Rob)
Changes in v3:
-Add new compatible string for dp-hdcp
-Add descriptions to reg
-Add minItems/maxItems to reg
-Make reg depend on the new hdcp compatible string
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
Changes in v4.5:
-Remove maxItems from reg (Rob)
-Remove leading zeros in example (Rob)
---
.../devicetree/bindings/display/msm/dp-controller.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index b36d74c1da7c..aff7d45ba6ed 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -21,12 +21,15 @@ properties:
- qcom,sc8180x-edp
reg:
+ minItems: 5
items:
- description: ahb register block
- description: aux register block
- description: link register block
- description: p0 register block
- description: p1 register block
+ - description: (Optional) Registers for HDCP device key injection
+ - description: (Optional) Registers for HDCP TrustZone interaction
interrupts:
maxItems: 1
@@ -111,7 +114,9 @@ examples:
<0xae90200 0x200>,
<0xae90400 0xc00>,
<0xae91000 0x400>,
- <0xae91400 0x400>;
+ <0xae91400 0x400>,
+ <0xaed1000 0x174>,
+ <0xaee1000 0x2c>;
interrupt-parent = <&mdss>;
interrupts = <12>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
--
Sean Paul, Software Engineer, Google / Chromium OS
WARNING: multiple messages have this Message-ID (diff)
From: Sean Paul <sean@poorly.run>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
freedreno@lists.freedesktop.org
Cc: robh@kernel.org, devicetree@vger.kernel.org,
jani.nikula@intel.com, linux-arm-msm@vger.kernel.org,
abhinavk@codeaurora.org, swboyd@chromium.org,
khsieh@codeaurora.org, David Airlie <airlied@linux.ie>,
robh+dt@kernel.org, seanpaul@chromium.org,
bjorn.andersson@linaro.org
Subject: [Intel-gfx] [PATCH v4.5 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
Date: Mon, 15 Nov 2021 20:21:48 +0000 [thread overview]
Message-ID: <20211115202153.117244-1-sean@poorly.run> (raw)
In-Reply-To: <YY7lb9k2UArZf7I/@robh.at.kernel.org>
From: Sean Paul <seanpaul@chromium.org>
This patch adds the bindings for the MSM DisplayPort HDCP registers
which are required to write the HDCP key into the display controller as
well as the registers to enable HDCP authentication/key
exchange/encryption.
We'll use a new compatible string for this since the fields are optional.
Cc: Rob Herring <robh@kernel.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
Link: https://patchwork.freedesktop.org/patch/msgid/20211105030434.2828845-13-sean@poorly.run #v4
Changes in v2:
-Drop register range names (Stephen)
-Fix yaml errors (Rob)
Changes in v3:
-Add new compatible string for dp-hdcp
-Add descriptions to reg
-Add minItems/maxItems to reg
-Make reg depend on the new hdcp compatible string
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
Changes in v4.5:
-Remove maxItems from reg (Rob)
-Remove leading zeros in example (Rob)
---
.../devicetree/bindings/display/msm/dp-controller.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index b36d74c1da7c..aff7d45ba6ed 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -21,12 +21,15 @@ properties:
- qcom,sc8180x-edp
reg:
+ minItems: 5
items:
- description: ahb register block
- description: aux register block
- description: link register block
- description: p0 register block
- description: p1 register block
+ - description: (Optional) Registers for HDCP device key injection
+ - description: (Optional) Registers for HDCP TrustZone interaction
interrupts:
maxItems: 1
@@ -111,7 +114,9 @@ examples:
<0xae90200 0x200>,
<0xae90400 0xc00>,
<0xae91000 0x400>,
- <0xae91400 0x400>;
+ <0xae91400 0x400>,
+ <0xaed1000 0x174>,
+ <0xaee1000 0x2c>;
interrupt-parent = <&mdss>;
interrupts = <12>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
--
Sean Paul, Software Engineer, Google / Chromium OS
WARNING: multiple messages have this Message-ID (diff)
From: Sean Paul <sean@poorly.run>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
freedreno@lists.freedesktop.org
Cc: bjorn.andersson@linaro.org, swboyd@chromium.org,
jani.nikula@intel.com, abhinavk@codeaurora.org,
seanpaul@chromium.org, robh@kernel.org, robh+dt@kernel.org,
khsieh@codeaurora.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, Rob Clark <robdclark@gmail.com>,
Sean Paul <sean@poorly.run>, David Airlie <airlied@linux.ie>,
Daniel Vetter <daniel@ffwll.ch>
Subject: [PATCH v4.5 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
Date: Mon, 15 Nov 2021 20:21:48 +0000 [thread overview]
Message-ID: <20211115202153.117244-1-sean@poorly.run> (raw)
In-Reply-To: <YY7lb9k2UArZf7I/@robh.at.kernel.org>
From: Sean Paul <seanpaul@chromium.org>
This patch adds the bindings for the MSM DisplayPort HDCP registers
which are required to write the HDCP key into the display controller as
well as the registers to enable HDCP authentication/key
exchange/encryption.
We'll use a new compatible string for this since the fields are optional.
Cc: Rob Herring <robh@kernel.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
Link: https://patchwork.freedesktop.org/patch/msgid/20211105030434.2828845-13-sean@poorly.run #v4
Changes in v2:
-Drop register range names (Stephen)
-Fix yaml errors (Rob)
Changes in v3:
-Add new compatible string for dp-hdcp
-Add descriptions to reg
-Add minItems/maxItems to reg
-Make reg depend on the new hdcp compatible string
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
Changes in v4.5:
-Remove maxItems from reg (Rob)
-Remove leading zeros in example (Rob)
---
.../devicetree/bindings/display/msm/dp-controller.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index b36d74c1da7c..aff7d45ba6ed 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -21,12 +21,15 @@ properties:
- qcom,sc8180x-edp
reg:
+ minItems: 5
items:
- description: ahb register block
- description: aux register block
- description: link register block
- description: p0 register block
- description: p1 register block
+ - description: (Optional) Registers for HDCP device key injection
+ - description: (Optional) Registers for HDCP TrustZone interaction
interrupts:
maxItems: 1
@@ -111,7 +114,9 @@ examples:
<0xae90200 0x200>,
<0xae90400 0xc00>,
<0xae91000 0x400>,
- <0xae91400 0x400>;
+ <0xae91400 0x400>,
+ <0xaed1000 0x174>,
+ <0xaee1000 0x2c>;
interrupt-parent = <&mdss>;
interrupts = <12>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
--
Sean Paul, Software Engineer, Google / Chromium OS
next prev parent reply other threads:[~2021-11-15 20:21 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-05 3:04 [PATCH v4 00/14] drm/hdcp: Pull HDCP auth/exchange/check into helpers Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` [PATCH v4 01/14] drm/hdcp: Add drm_hdcp_atomic_check() Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` [PATCH v4 02/14] drm/hdcp: Avoid changing crtc state in hdcp atomic check Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` [PATCH v4 03/14] drm/hdcp: Update property value on content type and user changes Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` [PATCH v4 04/14] drm/hdcp: Expand HDCP helper library for enable/disable/check Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` [PATCH v4 05/14] drm/i915/hdcp: Consolidate HDCP setup/state cache Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` [PATCH v4 06/14] drm/i915/hdcp: Retain hdcp_capable return codes Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` [PATCH v4 07/14] drm/i915/hdcp: Use HDCP helpers for i915 Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` [PATCH v4 08/14] drm/msm/dpu_kms: Re-order dpu includes Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` Sean Paul
2021-11-05 3:04 ` [PATCH v4 09/14] drm/msm/dpu: Remove useless checks in dpu_encoder Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` Sean Paul
2021-11-05 3:04 ` [PATCH v4 10/14] drm/msm/dpu: Remove encoder->enable() hack Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` Sean Paul
2021-11-05 3:04 ` [PATCH v4 11/14] drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` Sean Paul
2021-11-05 3:04 ` [PATCH v4 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` Sean Paul
2021-11-12 22:06 ` Rob Herring
2021-11-12 22:06 ` [Intel-gfx] " Rob Herring
2021-11-12 22:06 ` Rob Herring
2021-11-15 20:21 ` Sean Paul [this message]
2021-11-15 20:21 ` [PATCH v4.5 " Sean Paul
2021-11-15 20:21 ` [Intel-gfx] " Sean Paul
2021-11-29 22:03 ` Rob Herring
2021-11-29 22:03 ` Rob Herring
2021-11-29 22:03 ` [Intel-gfx] " Rob Herring
2021-11-05 3:04 ` [PATCH v4 13/14] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` Sean Paul
2021-12-08 22:06 ` [Freedreno] " Rob Clark
2021-12-08 22:06 ` [Intel-gfx] " Rob Clark
2021-12-08 22:06 ` Rob Clark
2021-11-05 3:04 ` [PATCH v4 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers Sean Paul
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
2021-11-05 3:04 ` Sean Paul
2021-12-09 3:31 ` Stephen Boyd
2021-12-09 3:31 ` Stephen Boyd
2021-12-09 3:31 ` [Intel-gfx] " Stephen Boyd
2022-02-09 21:41 ` Dmitry Baryshkov
2022-02-09 21:41 ` [Intel-gfx] " Dmitry Baryshkov
2022-02-09 21:41 ` Dmitry Baryshkov
2021-11-05 3:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev3) Patchwork
2021-11-05 3:22 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-11-05 3:52 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-11-15 20:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev4) Patchwork
2021-11-15 20:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-11-15 20:37 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-11-15 20:58 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-12-08 20:55 ` [Freedreno] [PATCH v4 00/14] drm/hdcp: Pull HDCP auth/exchange/check into helpers Rob Clark
2021-12-08 20:55 ` [Intel-gfx] " Rob Clark
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