From: Dmitry Osipenko <digetx@gmail.com> To: "Thierry Reding" <thierry.reding@gmail.com>, "Jonathan Hunter" <jonathanh@nvidia.com>, "Ulf Hansson" <ulf.hansson@linaro.org>, "Viresh Kumar" <vireshk@kernel.org>, "Stephen Boyd" <sboyd@kernel.org>, "Peter De Schrijver" <pdeschrijver@nvidia.com>, "Mikko Perttunen" <mperttunen@nvidia.com>, "Lee Jones" <lee.jones@linaro.org>, "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>, "Nishanth Menon" <nm@ti.com>, "Adrian Hunter" <adrian.hunter@intel.com>, "Michael Turquette" <mturquette@baylibre.com> Cc: linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-pwm@vger.kernel.org, linux-mmc@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, David Heidelberg <david@ixit.cz> Subject: [PATCH v16 28/40] soc/tegra: fuse: Reset hardware Date: Wed, 1 Dec 2021 02:23:35 +0300 [thread overview] Message-ID: <20211130232347.950-29-digetx@gmail.com> (raw) In-Reply-To: <20211130232347.950-1-digetx@gmail.com> The FUSE controller is enabled at a boot time. Reset it in order to put hardware and clock into clean and disabled state. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- drivers/soc/tegra/fuse/fuse-tegra.c | 25 +++++++++++++++++++++++++ drivers/soc/tegra/fuse/fuse.h | 1 + 2 files changed, 26 insertions(+) diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c index f2151815db58..cc032729a143 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra.c +++ b/drivers/soc/tegra/fuse/fuse-tegra.c @@ -14,6 +14,7 @@ #include <linux/of_address.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> +#include <linux/reset.h> #include <linux/slab.h> #include <linux/sys_soc.h> @@ -243,6 +244,30 @@ static int tegra_fuse_probe(struct platform_device *pdev) goto restore; } + fuse->rst = devm_reset_control_get_optional(&pdev->dev, "fuse"); + if (IS_ERR(fuse->rst)) { + err = PTR_ERR(fuse->rst); + dev_err(&pdev->dev, "failed to get FUSE reset: %pe\n", + fuse->rst); + goto restore; + } + + /* + * FUSE clock is enabled at a boot time, hence this resume/suspend + * disables the clock besides the h/w resetting. + */ + err = pm_runtime_resume_and_get(&pdev->dev); + if (err) + goto restore; + + err = reset_control_reset(fuse->rst); + pm_runtime_put(&pdev->dev); + + if (err < 0) { + dev_err(&pdev->dev, "failed to reset FUSE: %d\n", err); + goto restore; + } + /* release the early I/O memory mapping */ iounmap(base); diff --git a/drivers/soc/tegra/fuse/fuse.h b/drivers/soc/tegra/fuse/fuse.h index de58feba0435..1b719d85bd04 100644 --- a/drivers/soc/tegra/fuse/fuse.h +++ b/drivers/soc/tegra/fuse/fuse.h @@ -43,6 +43,7 @@ struct tegra_fuse { void __iomem *base; phys_addr_t phys; struct clk *clk; + struct reset_control *rst; u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset); u32 (*read)(struct tegra_fuse *fuse, unsigned int offset); -- 2.33.1
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com> To: "Thierry Reding" <thierry.reding@gmail.com>, "Jonathan Hunter" <jonathanh@nvidia.com>, "Ulf Hansson" <ulf.hansson@linaro.org>, "Viresh Kumar" <vireshk@kernel.org>, "Stephen Boyd" <sboyd@kernel.org>, "Peter De Schrijver" <pdeschrijver@nvidia.com>, "Mikko Perttunen" <mperttunen@nvidia.com>, "Lee Jones" <lee.jones@linaro.org>, "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>, "Nishanth Menon" <nm@ti.com>, "Adrian Hunter" <adrian.hunter@intel.com>, "Michael Turquette" <mturquette@baylibre.com> Cc: linux-pwm@vger.kernel.org, linux-pm@vger.kernel.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, David Heidelberg <david@ixit.cz>, linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v16 28/40] soc/tegra: fuse: Reset hardware Date: Wed, 1 Dec 2021 02:23:35 +0300 [thread overview] Message-ID: <20211130232347.950-29-digetx@gmail.com> (raw) In-Reply-To: <20211130232347.950-1-digetx@gmail.com> The FUSE controller is enabled at a boot time. Reset it in order to put hardware and clock into clean and disabled state. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- drivers/soc/tegra/fuse/fuse-tegra.c | 25 +++++++++++++++++++++++++ drivers/soc/tegra/fuse/fuse.h | 1 + 2 files changed, 26 insertions(+) diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c index f2151815db58..cc032729a143 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra.c +++ b/drivers/soc/tegra/fuse/fuse-tegra.c @@ -14,6 +14,7 @@ #include <linux/of_address.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> +#include <linux/reset.h> #include <linux/slab.h> #include <linux/sys_soc.h> @@ -243,6 +244,30 @@ static int tegra_fuse_probe(struct platform_device *pdev) goto restore; } + fuse->rst = devm_reset_control_get_optional(&pdev->dev, "fuse"); + if (IS_ERR(fuse->rst)) { + err = PTR_ERR(fuse->rst); + dev_err(&pdev->dev, "failed to get FUSE reset: %pe\n", + fuse->rst); + goto restore; + } + + /* + * FUSE clock is enabled at a boot time, hence this resume/suspend + * disables the clock besides the h/w resetting. + */ + err = pm_runtime_resume_and_get(&pdev->dev); + if (err) + goto restore; + + err = reset_control_reset(fuse->rst); + pm_runtime_put(&pdev->dev); + + if (err < 0) { + dev_err(&pdev->dev, "failed to reset FUSE: %d\n", err); + goto restore; + } + /* release the early I/O memory mapping */ iounmap(base); diff --git a/drivers/soc/tegra/fuse/fuse.h b/drivers/soc/tegra/fuse/fuse.h index de58feba0435..1b719d85bd04 100644 --- a/drivers/soc/tegra/fuse/fuse.h +++ b/drivers/soc/tegra/fuse/fuse.h @@ -43,6 +43,7 @@ struct tegra_fuse { void __iomem *base; phys_addr_t phys; struct clk *clk; + struct reset_control *rst; u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset); u32 (*read)(struct tegra_fuse *fuse, unsigned int offset); -- 2.33.1
next prev parent reply other threads:[~2021-11-30 23:25 UTC|newest] Thread overview: 118+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-11-30 23:23 [PATCH v16 00/40] NVIDIA Tegra power management patches for 5.17 Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 01/40] soc/tegra: Enable runtime PM during OPP state-syncing Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 02/40] soc/tegra: Add devm_tegra_core_dev_init_opp_table_common() Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 03/40] soc/tegra: Don't print error message when OPPs not available Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 04/40] dt-bindings: clock: tegra-car: Document new clock sub-nodes Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 05/40] clk: tegra: Support runtime PM and power domain Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 06/40] dt-bindings: host1x: Document OPP and power domain properties Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 07/40] dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 08/40] gpu: host1x: Add initial runtime PM and OPP support Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-12-21 18:55 ` Jon Hunter 2021-12-21 18:55 ` Jon Hunter 2021-12-21 20:58 ` Dmitry Osipenko 2021-12-21 20:58 ` Dmitry Osipenko 2021-12-22 9:47 ` Jon Hunter 2021-12-22 9:47 ` Jon Hunter 2021-12-22 18:41 ` Jon Hunter 2021-12-22 18:41 ` Jon Hunter 2021-12-22 19:01 ` Dmitry Osipenko 2021-12-22 19:01 ` Dmitry Osipenko 2021-12-22 19:30 ` Jon Hunter 2021-12-22 19:30 ` Jon Hunter 2021-12-22 19:31 ` Dmitry Osipenko 2021-12-22 19:31 ` Dmitry Osipenko 2022-01-31 20:39 ` Marc Zyngier 2022-01-31 20:39 ` Marc Zyngier 2021-11-30 23:23 ` [PATCH v16 09/40] gpu: host1x: Add host1x_channel_stop() Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 10/40] drm/tegra: submit: Add missing pm_runtime_mark_last_busy() Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 11/40] drm/tegra: dc: Support OPP and SoC core voltage scaling Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 12/40] drm/tegra: hdmi: Add OPP support Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 13/40] drm/tegra: gr2d: Support generic power domain and runtime PM Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 14/40] drm/tegra: gr3d: " Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 15/40] drm/tegra: vic: Stop channel on suspend Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 16/40] drm/tegra: nvdec: " Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 17/40] drm/tegra: submit: Remove pm_runtime_enabled() checks Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 18/40] drm/tegra: Consolidate runtime PM management of older UAPI codepath Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 19/40] usb: chipidea: tegra: Add runtime PM and OPP support Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 20/40] bus: tegra-gmi: " Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 21/40] pwm: tegra: " Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2022-02-21 8:17 ` Uwe Kleine-König 2022-02-21 8:17 ` Uwe Kleine-König 2022-02-21 9:53 ` Dmitry Osipenko 2022-02-21 9:53 ` Dmitry Osipenko 2022-02-21 13:37 ` Uwe Kleine-König 2022-02-21 13:37 ` Uwe Kleine-König 2021-11-30 23:23 ` [PATCH v16 22/40] mmc: sdhci-tegra: " Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-12-02 8:16 ` Adrian Hunter 2021-12-02 8:16 ` Adrian Hunter 2021-11-30 23:23 ` [PATCH v16 23/40] mtd: rawnand: tegra: " Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 24/40] spi: tegra20-slink: Add " Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 25/40] media: dt: bindings: tegra-vde: Convert to schema Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 26/40] media: dt: bindings: tegra-vde: Document OPP and power domain Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 27/40] media: staging: tegra-vde: Support generic " Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko [this message] 2021-11-30 23:23 ` [PATCH v16 28/40] soc/tegra: fuse: Reset hardware Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 29/40] soc/tegra: fuse: Use resource-managed helpers Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-12-16 12:59 ` Thierry Reding 2021-12-16 12:59 ` Thierry Reding 2021-11-30 23:23 ` [PATCH v16 30/40] soc/tegra: regulators: Prepare for suspend Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 31/40] soc/tegra: pmc: Rename 3d power domains Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 32/40] soc/tegra: pmc: Rename core power domain Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 33/40] soc/tegra: pmc: Enable core domain support for Tegra20 and Tegra30 Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2022-02-03 17:51 ` Thierry Reding 2022-02-03 17:51 ` Thierry Reding 2021-11-30 23:23 ` [PATCH v16 34/40] ARM: tegra: Rename CPU and EMC OPP table device-tree nodes Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 35/40] ARM: tegra: Add 500MHz entry to Tegra30 memory OPP table Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 36/40] ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 37/40] ARM: tegra: Add OPP tables and power domains to Tegra30 device-trees Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 38/40] ARM: tegra: Add Memory Client resets to Tegra20 GR2D, GR3D and Host1x Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 39/40] ARM: tegra: Add Memory Client resets to Tegra30 " Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-11-30 23:23 ` [PATCH v16 40/40] ARM: tegra20/30: Disable unused host1x hardware Dmitry Osipenko 2021-11-30 23:23 ` Dmitry Osipenko 2021-12-15 15:55 ` [PATCH v16 00/40] NVIDIA Tegra power management patches for 5.17 Thierry Reding 2021-12-15 15:55 ` Thierry Reding 2021-12-15 16:11 ` Dmitry Osipenko 2021-12-15 16:11 ` Dmitry Osipenko 2021-12-16 13:14 ` Thierry Reding 2021-12-16 13:14 ` Thierry Reding 2021-12-16 14:19 ` Dmitry Osipenko 2021-12-16 14:19 ` Dmitry Osipenko
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