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From: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
To: Andrew Jeffery <andrew@aj.id.au>,
	Linus Walleij <linus.walleij@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	Joel Stanley <joel@jms.id.au>, Arnd Bergmann <arnd@arndb.de>
Cc: Jamie Iles <quic_jiles@quicinc.com>,
	Graeme Gregory <quic_ggregory@quicinc.com>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-aspeed@lists.ozlabs.org>,
	"Jae Hyun Yoo" <quic_jaehyoo@quicinc.com>
Subject: [PATCH v3 0/7] Fix AST2600 quad mode SPI pinmux settings
Date: Tue, 29 Mar 2022 10:39:25 -0700	[thread overview]
Message-ID: <20220329173932.2588289-1-quic_jaehyoo@quicinc.com> (raw)

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="UTF-8", Size: 1610 bytes --]

I’m sending this patch series to fix current issues in AST2600 pinmux
settings while enabling quad mode SPI support.

FWSPI18 pins are basically 1.8v logic pins that are different from the
dedicated FWSPI pins that provide 3.3v logic level, so FWSPI18 pins can’t
be grouped with FWSPIDQ2 and FWSPIDQ3, so this series fix the issue.

Also, fixes QSPI1 and QSPI2 function settings in AST2600 pinctrl dtsi to
make it able to enable quad mode on SPI1 and SPI2 interfaces.

With this series, quad mode pinmux can be set like below.

FW SPI:
&fmc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_fwqspi_default>;
}

SPI1:
&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_qspi1_default>;
}

SPI2:
&spi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_qspi2_default>;
}

Please review.

Thanks,
Jae

Changes in v3:
 * Added bindings patches. (Andrew)

Changes in v2:
 * Rebased it on the latest.

Jae Hyun Yoo (5):
  ARM: dts: aspeed-g6: remove FWQSPID group in pinctrl dtsi
  pinctrl: pinctrl-aspeed-g6: remove FWQSPID group in pinctrl
  dt-bindings: pinctrl: aspeed-g6: remove FWQSPID group
  dt-bindings: pinctrl: aspeed-g6: add FWQSPI function/group
  ARM: dts: aspeed-g6: fix SPI1/SPI2 quad pin group

Johnny Huang (2):
  pinctrl: pinctrl-aspeed-g6: add FWQSPI function-group
  ARM: dts: aspeed-g6: add FWQSPI group in pinctrl dtsi

 .../pinctrl/aspeed,ast2600-pinctrl.yaml         |  4 ++--
 arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi        | 10 +++++-----
 drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c      | 17 ++++++++---------
 3 files changed, 15 insertions(+), 16 deletions(-)

-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
To: Andrew Jeffery <andrew@aj.id.au>,
	Linus Walleij <linus.walleij@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	Joel Stanley <joel@jms.id.au>, Arnd Bergmann <arnd@arndb.de>
Cc: Jamie Iles <quic_jiles@quicinc.com>,
	Graeme Gregory <quic_ggregory@quicinc.com>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-aspeed@lists.ozlabs.org>,
	"Jae Hyun Yoo" <quic_jaehyoo@quicinc.com>
Subject: [PATCH v3 0/7] Fix AST2600 quad mode SPI pinmux settings
Date: Tue, 29 Mar 2022 10:39:25 -0700	[thread overview]
Message-ID: <20220329173932.2588289-1-quic_jaehyoo@quicinc.com> (raw)

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="UTF-8", Size: 1611 bytes --]

I’m sending this patch series to fix current issues in AST2600 pinmux
settings while enabling quad mode SPI support.

FWSPI18 pins are basically 1.8v logic pins that are different from the
dedicated FWSPI pins that provide 3.3v logic level, so FWSPI18 pins can’t
be grouped with FWSPIDQ2 and FWSPIDQ3, so this series fix the issue.

Also, fixes QSPI1 and QSPI2 function settings in AST2600 pinctrl dtsi to
make it able to enable quad mode on SPI1 and SPI2 interfaces.

With this series, quad mode pinmux can be set like below.

FW SPI:
&fmc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_fwqspi_default>;
}

SPI1:
&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_qspi1_default>;
}

SPI2:
&spi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_qspi2_default>;
}

Please review.

Thanks,
Jae

Changes in v3:
 * Added bindings patches. (Andrew)

Changes in v2:
 * Rebased it on the latest.

Jae Hyun Yoo (5):
  ARM: dts: aspeed-g6: remove FWQSPID group in pinctrl dtsi
  pinctrl: pinctrl-aspeed-g6: remove FWQSPID group in pinctrl
  dt-bindings: pinctrl: aspeed-g6: remove FWQSPID group
  dt-bindings: pinctrl: aspeed-g6: add FWQSPI function/group
  ARM: dts: aspeed-g6: fix SPI1/SPI2 quad pin group

Johnny Huang (2):
  pinctrl: pinctrl-aspeed-g6: add FWQSPI function-group
  ARM: dts: aspeed-g6: add FWQSPI group in pinctrl dtsi

 .../pinctrl/aspeed,ast2600-pinctrl.yaml         |  4 ++--
 arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi        | 10 +++++-----
 drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c      | 17 ++++++++---------
 3 files changed, 15 insertions(+), 16 deletions(-)

-- 
2.25.1



[-- Attachment #2: Type: text/plain, Size: 176 bytes --]

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             reply	other threads:[~2022-03-29 17:40 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-29 17:39 Jae Hyun Yoo [this message]
2022-03-29 17:39 ` [PATCH v3 0/7] Fix AST2600 quad mode SPI pinmux settings Jae Hyun Yoo
2022-03-29 17:39 ` [PATCH v3 1/7] ARM: dts: aspeed-g6: remove FWQSPID group in pinctrl dtsi Jae Hyun Yoo
2022-03-29 17:39   ` Jae Hyun Yoo
2022-03-29 17:39 ` [PATCH v3 2/7] pinctrl: pinctrl-aspeed-g6: remove FWQSPID group in pinctrl Jae Hyun Yoo
2022-03-29 17:39   ` Jae Hyun Yoo
2022-03-30  2:00   ` Andrew Jeffery
2022-03-30  2:00     ` Andrew Jeffery
2022-03-29 17:39 ` [PATCH v3 3/7] dt-bindings: pinctrl: aspeed-g6: remove FWQSPID group Jae Hyun Yoo
2022-03-29 17:39   ` Jae Hyun Yoo
2022-03-29 23:38   ` Rob Herring
2022-03-29 23:38     ` Rob Herring
2022-03-30  2:01   ` Andrew Jeffery
2022-03-30  2:01     ` Andrew Jeffery
2022-03-29 17:39 ` [PATCH v3 4/7] pinctrl: pinctrl-aspeed-g6: add FWQSPI function-group Jae Hyun Yoo
2022-03-29 17:39   ` Jae Hyun Yoo
2022-03-30  2:02   ` Andrew Jeffery
2022-03-30  2:02     ` Andrew Jeffery
2022-03-29 17:39 ` [PATCH v3 5/7] dt-bindings: pinctrl: aspeed-g6: add FWQSPI function/group Jae Hyun Yoo
2022-03-29 17:39   ` Jae Hyun Yoo
2022-03-29 23:38   ` Rob Herring
2022-03-29 23:38     ` Rob Herring
2022-03-30  2:03   ` Andrew Jeffery
2022-03-30  2:03     ` Andrew Jeffery
2022-03-29 17:39 ` [PATCH v3 6/7] ARM: dts: aspeed-g6: add FWQSPI group in pinctrl dtsi Jae Hyun Yoo
2022-03-29 17:39   ` Jae Hyun Yoo
2022-03-30  2:03   ` Andrew Jeffery
2022-03-30  2:03     ` Andrew Jeffery
2022-03-29 17:39 ` [PATCH v3 7/7] ARM: dts: aspeed-g6: fix SPI1/SPI2 quad pin group Jae Hyun Yoo
2022-03-29 17:39   ` Jae Hyun Yoo
2022-03-31  5:50 ` [PATCH v3 0/7] Fix AST2600 quad mode SPI pinmux settings Joel Stanley
2022-03-31  5:50   ` Joel Stanley
2022-03-31 15:44   ` Jae Hyun Yoo
2022-03-31 15:44     ` Jae Hyun Yoo
2022-03-31 15:56     ` Cédric Le Goater
2022-03-31 15:56       ` Cédric Le Goater
2022-03-31 16:06       ` Jae Hyun Yoo
2022-03-31 16:06         ` Jae Hyun Yoo
2022-04-01 14:10         ` Jae Hyun Yoo
2022-04-01 14:10           ` Jae Hyun Yoo
2022-04-01 22:07           ` Cédric Le Goater
2022-04-01 22:07             ` Cédric Le Goater
2022-04-01 22:25             ` Jae Hyun Yoo
2022-04-01 22:25               ` Jae Hyun Yoo
2022-04-17 23:28 ` Linus Walleij
2022-04-17 23:28   ` Linus Walleij
2022-04-18 14:07   ` Jae Hyun Yoo
2022-04-18 14:07     ` Jae Hyun Yoo

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