From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <rafael@kernel.org>, <viresh.kumar@linaro.org>,
<robh+dt@kernel.org>, <krzk+dt@kernel.org>,
<matthias.bgg@gmail.com>
Cc: <jia-wei.chang@mediatek.com>, <roger.lu@mediatek.com>,
<hsinyi@google.com>, <khilman@baylibre.com>,
<angelogioacchino.delregno@collabora.com>,
<linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [PATCH v5 9/9] arm64: dts: mediatek: Add mediatek,cci property for MT8183 cpufreq
Date: Wed, 4 May 2022 21:05:40 +0800 [thread overview]
Message-ID: <20220504130540.5902-10-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220504130540.5902-1-rex-bc.chen@mediatek.com>
Add mediatek,cci property to support MediaTek CCI feature.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 11caf3dd85cd..e5d4a8e0c545 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -336,6 +336,7 @@
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu1: cpu@1 {
@@ -351,6 +352,7 @@
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu2: cpu@2 {
@@ -366,6 +368,7 @@
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu3: cpu@3 {
@@ -381,6 +384,7 @@
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu4: cpu@100 {
@@ -396,6 +400,7 @@
operating-points-v2 = <&cluster1_opp>;
dynamic-power-coefficient = <211>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu5: cpu@101 {
@@ -411,6 +416,7 @@
operating-points-v2 = <&cluster1_opp>;
dynamic-power-coefficient = <211>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu6: cpu@102 {
@@ -426,6 +432,7 @@
operating-points-v2 = <&cluster1_opp>;
dynamic-power-coefficient = <211>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu7: cpu@103 {
@@ -441,6 +448,7 @@
operating-points-v2 = <&cluster1_opp>;
dynamic-power-coefficient = <211>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
idle-states {
--
2.18.0
WARNING: multiple messages have this Message-ID (diff)
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <rafael@kernel.org>, <viresh.kumar@linaro.org>,
<robh+dt@kernel.org>, <krzk+dt@kernel.org>,
<matthias.bgg@gmail.com>
Cc: <jia-wei.chang@mediatek.com>, <roger.lu@mediatek.com>,
<hsinyi@google.com>, <khilman@baylibre.com>,
<angelogioacchino.delregno@collabora.com>,
<linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [PATCH v5 9/9] arm64: dts: mediatek: Add mediatek, cci property for MT8183 cpufreq
Date: Wed, 4 May 2022 21:05:40 +0800 [thread overview]
Message-ID: <20220504130540.5902-10-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220504130540.5902-1-rex-bc.chen@mediatek.com>
Add mediatek,cci property to support MediaTek CCI feature.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 11caf3dd85cd..e5d4a8e0c545 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -336,6 +336,7 @@
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu1: cpu@1 {
@@ -351,6 +352,7 @@
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu2: cpu@2 {
@@ -366,6 +368,7 @@
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu3: cpu@3 {
@@ -381,6 +384,7 @@
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu4: cpu@100 {
@@ -396,6 +400,7 @@
operating-points-v2 = <&cluster1_opp>;
dynamic-power-coefficient = <211>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu5: cpu@101 {
@@ -411,6 +416,7 @@
operating-points-v2 = <&cluster1_opp>;
dynamic-power-coefficient = <211>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu6: cpu@102 {
@@ -426,6 +432,7 @@
operating-points-v2 = <&cluster1_opp>;
dynamic-power-coefficient = <211>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu7: cpu@103 {
@@ -441,6 +448,7 @@
operating-points-v2 = <&cluster1_opp>;
dynamic-power-coefficient = <211>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
idle-states {
--
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <rafael@kernel.org>, <viresh.kumar@linaro.org>,
<robh+dt@kernel.org>, <krzk+dt@kernel.org>,
<matthias.bgg@gmail.com>
Cc: <jia-wei.chang@mediatek.com>, <roger.lu@mediatek.com>,
<hsinyi@google.com>, <khilman@baylibre.com>,
<angelogioacchino.delregno@collabora.com>,
<linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [PATCH v5 9/9] arm64: dts: mediatek: Add mediatek, cci property for MT8183 cpufreq
Date: Wed, 4 May 2022 21:05:40 +0800 [thread overview]
Message-ID: <20220504130540.5902-10-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220504130540.5902-1-rex-bc.chen@mediatek.com>
Add mediatek,cci property to support MediaTek CCI feature.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 11caf3dd85cd..e5d4a8e0c545 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -336,6 +336,7 @@
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu1: cpu@1 {
@@ -351,6 +352,7 @@
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu2: cpu@2 {
@@ -366,6 +368,7 @@
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu3: cpu@3 {
@@ -381,6 +384,7 @@
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu4: cpu@100 {
@@ -396,6 +400,7 @@
operating-points-v2 = <&cluster1_opp>;
dynamic-power-coefficient = <211>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu5: cpu@101 {
@@ -411,6 +416,7 @@
operating-points-v2 = <&cluster1_opp>;
dynamic-power-coefficient = <211>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu6: cpu@102 {
@@ -426,6 +432,7 @@
operating-points-v2 = <&cluster1_opp>;
dynamic-power-coefficient = <211>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
cpu7: cpu@103 {
@@ -441,6 +448,7 @@
operating-points-v2 = <&cluster1_opp>;
dynamic-power-coefficient = <211>;
#cooling-cells = <2>;
+ mediatek,cci = <&cci>;
};
idle-states {
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-05-04 13:06 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-04 13:05 [PATCH v5 0/9] cpufreq: mediatek: Cleanup and support MT8183 and MT8186 Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-04 13:05 ` [PATCH v5 1/9] dt-bindings: cpufreq: mediatek: Add MediaTek CCI property Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-05 8:41 ` AngeloGioacchino Del Regno
2022-05-05 8:41 ` AngeloGioacchino Del Regno
2022-05-05 8:41 ` AngeloGioacchino Del Regno
2022-05-04 13:05 ` [PATCH v5 2/9] cpufreq: mediatek: Add opp notification support Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-05 8:43 ` Viresh Kumar
2022-05-05 8:43 ` Viresh Kumar
2022-05-05 8:43 ` Viresh Kumar
2022-05-05 9:44 ` Rex-BC Chen
2022-05-05 9:44 ` Rex-BC Chen
2022-05-04 13:05 ` [PATCH v5 3/9] cpufreq: mediatek: Move voltage limits to platform data Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-05 8:52 ` Viresh Kumar
2022-05-05 8:52 ` Viresh Kumar
2022-05-05 8:52 ` Viresh Kumar
2022-05-05 10:29 ` Rex-BC Chen
2022-05-05 10:29 ` Rex-BC Chen
2022-05-05 10:29 ` Rex-BC Chen
2022-05-04 13:05 ` [PATCH v5 4/9] cpufreq: mediatek: Refine mtk_cpufreq_voltage_tracking() Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-04 13:05 ` [PATCH v5 5/9] cpufreq: mediatek: Link CCI device to CPU Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-04 13:05 ` [PATCH v5 6/9] cpufreq: mediatek: Add support for MT8186 Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-04 13:05 ` [PATCH v5 7/9] arm64: dts: mediatek: Add opp table and clock property for MT8183 cpufreq Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-04 13:05 ` [PATCH v5 8/9] arm64: dts: mediatek: Add MediaTek CCI node for MT8183 Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen [this message]
2022-05-04 13:05 ` [PATCH v5 9/9] arm64: dts: mediatek: Add mediatek, cci property for MT8183 cpufreq Rex-BC Chen
2022-05-04 13:05 ` Rex-BC Chen
2022-05-05 8:53 ` [PATCH v5 0/9] cpufreq: mediatek: Cleanup and support MT8183 and MT8186 Viresh Kumar
2022-05-05 8:53 ` Viresh Kumar
2022-05-05 8:53 ` Viresh Kumar
2022-05-05 9:47 ` Rex-BC Chen
2022-05-05 9:47 ` Rex-BC Chen
2022-05-05 9:47 ` Rex-BC Chen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220504130540.5902-10-rex-bc.chen@mediatek.com \
--to=rex-bc.chen@mediatek.com \
--cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
--cc=angelogioacchino.delregno@collabora.com \
--cc=devicetree@vger.kernel.org \
--cc=hsinyi@google.com \
--cc=jia-wei.chang@mediatek.com \
--cc=khilman@baylibre.com \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=linux-pm@vger.kernel.org \
--cc=matthias.bgg@gmail.com \
--cc=rafael@kernel.org \
--cc=robh+dt@kernel.org \
--cc=roger.lu@mediatek.com \
--cc=viresh.kumar@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.